[libunwind] [libunwind][RISCV] Make asm statement volatile (PR #130286)

https://github.com/futog updated https://github.com/llvm/llvm-project/pull/130286 >From ef22b36c6aa53566554b0f58bd2b90432f9a5f5a Mon Sep 17 00:00:00 2001 From: Gergely Futo Date: Thu, 10 Oct 2024 08:36:50 +0200 Subject: [PATCH] [libunwind][RISCV] Make asm statement volatile Compiling with `O3`

[libunwind] [libunwind][RISCV] Make asm statement volatile (PR #130286)

https://github.com/futog created https://github.com/llvm/llvm-project/pull/130286 Compiling with `O3`, the `early-machinelicm` pass hoisted the asm statement to a path that has been executed unconditionally during stack unwinding. On hardware without vector extension support, this resulted in

[libunwind] [libunwind][RISCV] Make asm statement volatile (PR #130286)

https://github.com/futog closed https://github.com/llvm/llvm-project/pull/130286 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Support resumable non-maskable interrupt handlers (PR #148134)

futog wrote: > This needs a proposal against the specification here: > https://github.com/riscv-non-isa/riscv-c-api-doc/blob/main/src/c-api.adoc#__attribute__interrupt-__attribute__interruptsupervisor-__attribute__interruptmachine https://github.com/riscv-non-isa/riscv-c-api-doc/pull/116 https