@@ -5241,8 +5241,8 @@ bool CheckVectorElementCallArgs(Sema *S, CallExpr
*TheCall) {
// Note: if we get here one of the args is a scalar which
// requires a VectorSplat on Arg0 or Arg1
- S->Diag(BuiltinLoc, diag::err_vec_builtin_non_vector_all)
- << TheCall->getDirec
@@ -5218,15 +5218,15 @@ bool CheckVectorElementCallArgs(Sema *S, CallExpr
*TheCall) {
// Note: type promotion is intended to be handeled via the intrinsics
// and not the builtin itself.
S->Diag(TheCall->getBeginLoc(),
-diag::err_vec_bu
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/83609
>From bfd8afd06400bc936c13d2138576bb0bb51960e9 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Fri, 1 Mar 2024 14:21:17 -0500
Subject: [PATCH 1/2] [clang][sema] consolidate diags
---
.../clang/Basic/Diagnosti
https://github.com/farzonl closed
https://github.com/llvm/llvm-project/pull/83609
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https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/83826
This change implements #83736
The dot product lowering needs a tertiary multipy add operation. DXIL has three
mad opcodes for `fmad`(46), `imad`(48), and `umad`(49). Dot product in DXIL
only uses `imad`\ `umad`,
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/83826
>From 410a00aa96f23e99727b2d6b8aa0fa02441d5ecc Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Sat, 2 Mar 2024 16:40:39 -0500
Subject: [PATCH 1/2] [HLSL] implement mad intrinsic This change implements
#83736 T
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/83832
This change implements: #70072
- `hlsl_intrinsics.h` - add the `exp` api
- `DXIL.td` - add the llvm intrinsic to DXIL opcode lowering mapping.
- This change reuses llvm's existing intrinsic `__builtin_elementwis
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/83857
This PR implements the frontend for llvm#70100
This PR is part 1 of 2.
Part 2 depends on `DXILIntrinsicExpansion.cpp` in [dixl-lerp-intrinsic-lowering
PR](https://github.com/llvm/llvm-project/compare/main...farzo
@@ -218,6 +218,9 @@ class DXILOpMapping;
+def Exp : DXILOpMapping<21, unary, int_exp,
+ "Returns the base-e exponential of the x parameter."
farzonl wrote:
I'm confused by this answer opcode 21 is `exp` not` exp2`
https://godbolt.org/z/Me
@@ -218,6 +218,9 @@ class DXILOpMapping;
+def Exp : DXILOpMapping<21, unary, int_exp,
+ "Returns the base-e exponential of the x parameter."
farzonl wrote:
ok I see whats going on. seems like we should make exp2 the intrinsic then do
exp
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@@ -0,0 +1,27 @@
+
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -verify -verify-ignore-unexpected
farzonl wrote:
not a bad idea, it shares the same sema checks as frac
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/83832
>From 57abc69dd57580361d3805b44317c6e597d9ffba Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Mon, 4 Mar 2024 00:19:51 -0500
Subject: [PATCH 1/2] [HLSL] implement exp intrinsic This change implements:
#70072
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/83826
>From 6aa6d2cd8b999a0173130f7675f561595ed65d8d Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Sat, 2 Mar 2024 16:40:39 -0500
Subject: [PATCH 1/3] [HLSL] implement mad intrinsic This change implements
#83736 T
@@ -5298,6 +5298,14 @@ bool Sema::CheckHLSLBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
return true;
break;
}
+ case Builtin::BI__builtin_hlsl_mad: {
+if (checkArgCount(*this, TheCall, 3))
+ return true;
+if (CheckVectorElementCallArgs
@@ -19812,11 +19821,13 @@ bool Sema::SemaBuiltinElementwiseTernaryMath(CallExpr
*TheCall) {
Args[I] = Converted.get();
}
- int ArgOrdinal = 1;
- for (Expr *Arg : Args) {
-if (checkFPMathBuiltinElementType(*this, Arg->getBeginLoc(),
Arg->getType(),
-
@@ -19800,7 +19808,8 @@ bool Sema::SemaBuiltinVectorMath(CallExpr *TheCall,
QualType &Res) {
return false;
}
-bool Sema::SemaBuiltinElementwiseTernaryMath(CallExpr *TheCall) {
+bool Sema::SemaBuiltinElementwiseTernaryMath(CallExpr *TheCall,
+
@@ -19812,11 +19821,13 @@ bool Sema::SemaBuiltinElementwiseTernaryMath(CallExpr
*TheCall) {
Args[I] = Converted.get();
}
- int ArgOrdinal = 1;
- for (Expr *Arg : Args) {
-if (checkFPMathBuiltinElementType(*this, Arg->getBeginLoc(),
Arg->getType(),
-
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/83826
>From 6aa6d2cd8b999a0173130f7675f561595ed65d8d Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Sat, 2 Mar 2024 16:40:39 -0500
Subject: [PATCH 1/4] [HLSL] implement mad intrinsic This change implements
#83736 T
@@ -19812,11 +19821,13 @@ bool Sema::SemaBuiltinElementwiseTernaryMath(CallExpr
*TheCall) {
Args[I] = Converted.get();
}
- int ArgOrdinal = 1;
- for (Expr *Arg : Args) {
-if (checkFPMathBuiltinElementType(*this, Arg->getBeginLoc(),
Arg->getType(),
-
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https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/83903
This PR implements the frontend for #70076
This PR is part 1 of 2.
Part 2 depends on `DXILIntrinsicExpansion.cpp` in [dixl-lerp-intrinsic-lowering
PR](https://github.com/llvm/llvm-project/compare/main...farzonl:l
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/83826
>From 6aa6d2cd8b999a0173130f7675f561595ed65d8d Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Sat, 2 Mar 2024 16:40:39 -0500
Subject: [PATCH 1/4] [HLSL] implement mad intrinsic This change implements
#83736 T
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farzonl wrote:
> For these intrinsic addition changes, do we need to add a note to
> "clang\docs\ReleaseNotes.rst"?
So for anything in `llvm/include/llvm/IR/IntrinsicsDirectX.td` I'm pretty sure
that is a no because DirectX is an experimental target you have to explicitly
enable via `-DLLVM_E
@@ -1010,6 +1010,7 @@ let IntrProperties = [IntrNoMem, IntrSpeculatable,
IntrWillReturn] in {
def int_powi : DefaultAttrsIntrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>,
llvm_anyint_ty]>;
def int_sin : DefaultAttrsIntrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>;
def
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https://github.com/llvm/llvm-project/pull/79948
HLSL has a tan builtin defined here:
https://learn.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-tan
Currently HLSL builtins redirect to clang builtins. However there is no
tan clang builtin tod
farzonl wrote:
Test results:
```
Total Discovered Tests: 93648
Skipped :56 (0.06%)
Unsupported : 2502 (2.67%)
Passed : 90779 (96.94%)
Expectedly Failed: 204 (0.22%)
Failed : 107 (0.11%)
```
Of the test I added all are passing:
https://github.c
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/81902
1. This change moves hlsl specific builtins from Builtins.td to BuiltinsHLSL.td.
2. Adds changes to the build system to build BuiltinsHLSL.td.
3. Setups HLSL builtins as TargetBuiltins.
>From 1c86da726134e9d4a659
farzonl wrote:
create handle test:
```
D:\projects\llvm-project>python ..\directx-llvm-build\bin\llvm-lit.py -sv
clang\test\CodeGenHLSL\builtins\create_handle.hlsl
llvm-lit.py: D:\projects\llvm-project\llvm\utils\lit\lit\llvm\config.py:57:
note: using lit tools: C:\Program Files\Git\usr\bin
llv
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>From 97022e196fdad0f4aff9e628607e3c24bef863df Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 15 Feb 2024 13:46:55 -0500
Subject: [PATCH] [HLSL] add BuiltinsHLSL and set it up as target builtins.
1. This
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>From 23c277da327c595633d159c13bc710f413024cb2 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 8 Feb 2024 11:08:59 -0500
Subject: [PATCH] [HLSL] Implementation of dot intrinsic This change implements
#700
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>From 2baaf5b41d80639fa7dfe739ad5501d2f5359bfa Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 8 Feb 2024 11:08:59 -0500
Subject: [PATCH] [HLSL] Implementation of dot intrinsic This change implements
#700
@@ -0,0 +1,202 @@
+// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
+// RUN: -emit-llvm -disable-llvm-passes -O3 -o - | FileCheck %s
+// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-h
@@ -0,0 +1,43 @@
+// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
+// RUN: -emit-llvm -disable-llvm-passes -verify -verify-ignore-unexpected
+
+float test_first_arg_is_not_vector ( floa
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/81190
>From f6dbbfbf6b8aa221035e39735c5c6e2d0936219c Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 8 Feb 2024 11:08:59 -0500
Subject: [PATCH] [HLSL] Implementation of dot intrinsic This change implements
#700
@@ -144,6 +144,92 @@ double3 cos(double3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_cos)
double4 cos(double4);
+//===--===//
+// dot product builtins
+//===
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@@ -19,4 +19,9 @@ def int_dx_flattened_thread_id_in_group :
Intrinsic<[llvm_i32_ty], [], [IntrNoMe
def int_dx_create_handle : ClangBuiltin<"__builtin_hlsl_create_handle">,
Intrinsic<[ llvm_ptr_ty ], [llvm_i8_ty], [IntrWillReturn]>;
-}
+
+def int_dx_dot :
+Intrinsic<[
https://github.com/farzonl updated
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>From bebb3ad19cc1793090265e68b25c282f90b35227 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 8 Feb 2024 11:08:59 -0500
Subject: [PATCH] [HLSL] Implementation of dot intrinsic This change implements
#700
https://github.com/farzonl ready_for_review
https://github.com/llvm/llvm-project/pull/81190
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>From 586ee65c5e820365a6fd150d7f246fbfa679ec3e Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 8 Feb 2024 11:08:59 -0500
Subject: [PATCH] [HLSL] Implementation of dot intrinsic This change implements
#700
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/81190
>From 595ce41f71bd9e0f83679bd5c742b3015bf30626 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 8 Feb 2024 11:08:59 -0500
Subject: [PATCH 1/2] [HLSL] Implementation of dot intrinsic This change
implements
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>From 595ce41f71bd9e0f83679bd5c742b3015bf30626 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 8 Feb 2024 11:08:59 -0500
Subject: [PATCH 1/2] [HLSL] Implementation of dot intrinsic This change
implements
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/81190
>From fad7e6eac6a1a65ce00ab3e4f64d5774b426c91d Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 8 Feb 2024 11:08:59 -0500
Subject: [PATCH 1/3] [HLSL] Implementation of dot intrinsic This change
implements
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https://github.com/llvm/llvm-project/pull/81190
>From fad7e6eac6a1a65ce00ab3e4f64d5774b426c91d Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 8 Feb 2024 11:08:59 -0500
Subject: [PATCH 1/3] [HLSL] Implementation of dot intrinsic This change
implements
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>From fad7e6eac6a1a65ce00ab3e4f64d5774b426c91d Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 8 Feb 2024 11:08:59 -0500
Subject: [PATCH 1/3] [HLSL] Implementation of dot intrinsic This change
implements
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/81190
>From fad7e6eac6a1a65ce00ab3e4f64d5774b426c91d Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 8 Feb 2024 11:08:59 -0500
Subject: [PATCH 1/3] [HLSL] Implementation of dot intrinsic This change
implements
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/81190
>From fad7e6eac6a1a65ce00ab3e4f64d5774b426c91d Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 8 Feb 2024 11:08:59 -0500
Subject: [PATCH 1/3] [HLSL] Implementation of dot intrinsic This change
implements
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@@ -18695,6 +18695,48 @@ case Builtin::BI__builtin_hlsl_elementwise_isinf: {
CGM.getHLSLRuntime().getSaturateIntrinsic(), ArrayRef{Op0},
nullptr, "hlsl.saturate");
}
+ case Builtin::BI__builtin_hlsl_select: {
+Value *OpCond = EmitScalarExpr(E->getArg(0));
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@@ -0,0 +1,45 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK
+
+// CHECK: %hlsl.select = select i1
+// CHECK: ret i32 %hlsl.selec
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@@ -0,0 +1,45 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
farzonl wrote:
This might be a DXism that doesn't apply going forward with upstream, but
select is an HLSL 2021 and above feature. It doesn't seem like we have the
proper gating if
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@@ -0,0 +1,129 @@
+// RUN: %clang_cc1 -finclude-default-header
+// -triple dxil-pc-shadermodel6.6-library %s -emit-llvm-only
+// -disable-llvm-passes -verify -verify-ignore-unexpected
+
+int test_no_arg() {
+ return select();
+ // expected-error@-1 {{no matching function for cal
@@ -0,0 +1,129 @@
+// RUN: %clang_cc1 -finclude-default-header
+// -triple dxil-pc-shadermodel6.6-library %s -emit-llvm-only
+// -disable-llvm-passes -verify -verify-ignore-unexpected
+
+int test_no_arg() {
+ return select();
+ // expected-error@-1 {{no matching function for cal
@@ -1512,6 +1512,83 @@ void SetElementTypeAsReturnType(Sema *S, CallExpr
*TheCall,
TheCall->setType(ReturnType);
}
+static bool CheckScalarOrVector(Sema *S, CallExpr *TheCall, QualType Scalar,
+ unsigned ArgIndex) {
+ assert(TheCall->getNumArg
@@ -1512,6 +1512,83 @@ void SetElementTypeAsReturnType(Sema *S, CallExpr
*TheCall,
TheCall->setType(ReturnType);
}
+static bool CheckScalarOrVector(Sema *S, CallExpr *TheCall, QualType Scalar,
+ unsigned ArgIndex) {
+ assert(TheCall->getNumArg
@@ -0,0 +1,129 @@
+// RUN: %clang_cc1 -finclude-default-header
+// -triple dxil-pc-shadermodel6.6-library %s -emit-llvm-only
+// -disable-llvm-passes -verify -verify-ignore-unexpected
+
+int test_no_arg() {
+ return select();
+ // expected-error@-1 {{no matching function for cal
@@ -387,6 +387,23 @@ float3 asin(float3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_asin)
float4 asin(float4);
+//===--===//
+// asuint builtins
+//===--
@@ -387,6 +387,23 @@ float3 asin(float3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_asin)
float4 asin(float4);
+//===--===//
+// asuint builtins
+//===--
@@ -1427,6 +1447,14 @@ bool CheckAllArgsHaveFloatRepresentation(Sema *S,
CallExpr *TheCall) {
checkAllFloatTypes);
}
+bool CheckArgIsFloatOrIntWithoutImplicits(Sema *S, Expr *Arg) {
+ auto checkFloat = [](clang::QualType PassedType) -> bool
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@@ -1427,6 +1447,14 @@ bool CheckAllArgsHaveFloatRepresentation(Sema *S,
CallExpr *TheCall) {
checkAllFloatTypes);
}
+bool CheckArgIsFloatOrIntWithoutImplicits(Sema *S, Expr *Arg) {
+ auto checkFloat = [](clang::QualType PassedType) -> bool
@@ -0,0 +1,26 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple
dxil-pc-shadermodel6.3-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -o - | FileCheck %s
+
+
+// CHECK-LABEL: test_asuint4_uint
+// CHECK: ret i32 %0
+export uint test_asuint4_uint(uint
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https://github.com/farzonl approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/107292
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@@ -0,0 +1,45 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
farzonl wrote:
nevermind, this isn't something the team is conserned about.
https://github.com/llvm/llvm-project/pull/107129
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@@ -1512,6 +1512,83 @@ void SetElementTypeAsReturnType(Sema *S, CallExpr
*TheCall,
TheCall->setType(ReturnType);
}
+static bool CheckScalarOrVector(Sema *S, CallExpr *TheCall, QualType Scalar,
+ unsigned ArgIndex) {
+ assert(TheCall->getNumArg
https://github.com/farzonl edited
https://github.com/llvm/llvm-project/pull/107129
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https://github.com/farzonl approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/107129
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@@ -387,6 +387,23 @@ float3 asin(float3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_asin)
float4 asin(float4);
+//===--===//
+// asuint builtins
+//===--
farzonl wrote:
> @llvm-beanz I've implemented your suggestions. One issue I found is that the
> code generation will work with half types, which are not supported in the
> current implementation. Any suggestions into how to approach this?
is there a way to know if the use of `__builtin_bit_cas
@@ -0,0 +1,41 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple
dxil-pc-shadermodel6.3-library %s -fnative-half-type -emit-llvm -O1 -o - |
FileCheck %s
+
+// CHECK: define {{.*}}test_uint{{.*}}(i32 {{.*}} [[VAL:%.*]]){{.*}}
+// CHECK-NOT: bitcast
+// CHECK: ret i3
@@ -387,6 +387,65 @@ float3 asin(float3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_asin)
float4 asin(float4);
+//===--===//
+// asuint builtins
+//===--
farzonl wrote:
@tgymnich with part 1 and 2 merged I think we are ready for this. If you fix
the conflicts in the PR i'll merge it for you.
https://github.com/llvm/llvm-project/pull/101989
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farzonl wrote:
since this is a new builtin it would make sense to add it to
`clang/docs/ReleaseNotes.rst`. There should be some examples from Josh's PRs.
https://github.com/llvm/llvm-project/pull/107923
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@@ -1244,6 +1244,12 @@ def ElementwiseATan : Builtin {
let Prototype = "void(...)";
}
+def ElementwiseATan2 : Builtin {
+ let Spellings = ["__builtin_elementwise_atan2"];
+ let Attributes = [NoThrow, Const, CustomTypeChecking];
farzonl wrote:
This is more
https://github.com/farzonl edited
https://github.com/llvm/llvm-project/pull/107923
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https://github.com/farzonl approved this pull request.
https://github.com/llvm/llvm-project/pull/107923
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https://github.com/farzonl closed
https://github.com/llvm/llvm-project/pull/101989
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@@ -387,6 +387,65 @@ float3 asin(float3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_asin)
float4 asin(float4);
+//===--===//
+// asuint builtins
+//===--
https://github.com/farzonl edited
https://github.com/llvm/llvm-project/pull/107292
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https://github.com/farzonl approved this pull request.
https://github.com/llvm/llvm-project/pull/108097
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@@ -0,0 +1,10 @@
+; RUN: not opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s
2>&1 | FileCheck %s
+
+; DXIL operation ctpop does not support double overload type
+; CHECK: invalid intrinsic signature
+
+define noundef double @countbits_double(double noundef %a) {
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