[clang] dbf149c - [RISCV] Properly diagnose mixing RVV scalable vectors with GNU vectors.

Author: Craig Topper Date: 2023-02-23T09:00:32-08:00 New Revision: dbf149c91b7bdf08b2d4dd94ab76f3209af4c6d4 URL: https://github.com/llvm/llvm-project/commit/dbf149c91b7bdf08b2d4dd94ab76f3209af4c6d4 DIFF: https://github.com/llvm/llvm-project/commit/dbf149c91b7bdf08b2d4dd94ab76f3209af4c6d4.diff

[clang] 83cd4be - [Clang] Teach buildFMulAdd to peek through fneg to find fmul.

Author: Craig Topper Date: 2023-02-23T09:05:59-08:00 New Revision: 83cd4bea015feb5729871832784c424b0743a803 URL: https://github.com/llvm/llvm-project/commit/83cd4bea015feb5729871832784c424b0743a803 DIFF: https://github.com/llvm/llvm-project/commit/83cd4bea015feb5729871832784c424b0743a803.diff

[clang] 728b8a1 - [RISCV] Make zve32f imply F and zve64d imply D.

Author: Craig Topper Date: 2023-05-06T23:17:16-07:00 New Revision: 728b8a139804db4fd9bce1ac7fa3dcbaf4dc316c URL: https://github.com/llvm/llvm-project/commit/728b8a139804db4fd9bce1ac7fa3dcbaf4dc316c DIFF: https://github.com/llvm/llvm-project/commit/728b8a139804db4fd9bce1ac7fa3dcbaf4dc316c.diff

[clang] 77f38e1 - [RISCV] Use IRBuilder::CreateInsertVector/CreateExtractVector to simplify code. NFC

Author: Craig Topper Date: 2023-05-17T21:31:51-07:00 New Revision: 77f38e1325a251623ec39a0d9ffa718e80436f94 URL: https://github.com/llvm/llvm-project/commit/77f38e1325a251623ec39a0d9ffa718e80436f94 DIFF: https://github.com/llvm/llvm-project/commit/77f38e1325a251623ec39a0d9ffa718e80436f94.diff

[clang] 7bbe512 - [RISCV] Remove unneedded comment. NFC

Author: Craig Topper Date: 2023-05-17T22:49:28-07:00 New Revision: 7bbe512362edd1dbd3947ff71212f3ae815a0836 URL: https://github.com/llvm/llvm-project/commit/7bbe512362edd1dbd3947ff71212f3ae815a0836 DIFF: https://github.com/llvm/llvm-project/commit/7bbe512362edd1dbd3947ff71212f3ae815a0836.diff

[clang] ac70712 - [RISCV] Replace 'sve' with 'rvv' in some test file names. NFC

Author: Craig Topper Date: 2023-05-17T23:32:31-07:00 New Revision: ac70712d5f1b466886dfcf14734fb7cc0d131d99 URL: https://github.com/llvm/llvm-project/commit/ac70712d5f1b466886dfcf14734fb7cc0d131d99 DIFF: https://github.com/llvm/llvm-project/commit/ac70712d5f1b466886dfcf14734fb7cc0d131d99.diff

[clang] fa0a391 - [RISCV] Fix assertion when casting LMUL!=1 RVV types to GNU types with -mrvv-vector-bits.

Author: Craig Topper Date: 2023-05-18T09:21:38-07:00 New Revision: fa0a39113a28448529f62d3ea30a7b7a8066f231 URL: https://github.com/llvm/llvm-project/commit/fa0a39113a28448529f62d3ea30a7b7a8066f231 DIFF: https://github.com/llvm/llvm-project/commit/fa0a39113a28448529f62d3ea30a7b7a8066f231.diff

[clang] 3f43abc - [RISCV] Reduce dependency on RISCV::RVVBitsPerBlock for calculating vector size for -mrvv-vector-bits.

Author: Craig Topper Date: 2023-05-18T10:09:50-07:00 New Revision: 3f43abc9e78cce99741f7c8cf54552c95cc98d9f URL: https://github.com/llvm/llvm-project/commit/3f43abc9e78cce99741f7c8cf54552c95cc98d9f DIFF: https://github.com/llvm/llvm-project/commit/3f43abc9e78cce99741f7c8cf54552c95cc98d9f.diff

[clang] e8b15c4 - [RISCV] Fix test that was still using __RISCV_RVV_VLEN_BITS. NFC

Author: Craig Topper Date: 2023-05-18T13:25:28-07:00 New Revision: e8b15c4eb28d56e9dd1ad792c32c5158080ec639 URL: https://github.com/llvm/llvm-project/commit/e8b15c4eb28d56e9dd1ad792c32c5158080ec639 DIFF: https://github.com/llvm/llvm-project/commit/e8b15c4eb28d56e9dd1ad792c32c5158080ec639.diff

[clang] c51fceb - [RISCV] Remove unused CHECK-ILP lines from attr-riscv-rvv-vector-bits-types.c. NFC

Author: Craig Topper Date: 2023-05-18T15:47:29-07:00 New Revision: c51fcebbbfd389e5dd8c6437da169c46dedfe51d URL: https://github.com/llvm/llvm-project/commit/c51fcebbbfd389e5dd8c6437da169c46dedfe51d DIFF: https://github.com/llvm/llvm-project/commit/c51fcebbbfd389e5dd8c6437da169c46dedfe51d.diff

[clang] 5070b55 - [RISCV] Fix incorrect check-prefixes in attr-riscv-rvv-vector-bits-types.c. NFC

Author: Craig Topper Date: 2023-05-18T17:10:22-07:00 New Revision: 5070b55df9116a77967f11d346d0b338b793ab2f URL: https://github.com/llvm/llvm-project/commit/5070b55df9116a77967f11d346d0b338b793ab2f DIFF: https://github.com/llvm/llvm-project/commit/5070b55df9116a77967f11d346d0b338b793ab2f.diff

[clang] ea0dae0 - [RISCV] Add Tag_RISCV_arch attribute by default when using clang as an assembler.

Author: Craig Topper Date: 2023-04-21T10:54:24-07:00 New Revision: ea0dae0961897da69b960caf68063db86312674d URL: https://github.com/llvm/llvm-project/commit/ea0dae0961897da69b960caf68063db86312674d DIFF: https://github.com/llvm/llvm-project/commit/ea0dae0961897da69b960caf68063db86312674d.diff

[clang] 05d0cae - [RISCV] Remove support for attribute interrupt("user").

Author: Craig Topper Date: 2023-04-27T08:21:36-07:00 New Revision: 05d0caef6081e1a6cb23a5a5afe43dc82e8ca558 URL: https://github.com/llvm/llvm-project/commit/05d0caef6081e1a6cb23a5a5afe43dc82e8ca558 DIFF: https://github.com/llvm/llvm-project/commit/05d0caef6081e1a6cb23a5a5afe43dc82e8ca558.diff

[clang] 0e02e5d - [RISCV] Add a release note for the removal of __attribute__((interrupt("user"))). NFC

Author: Craig Topper Date: 2023-04-27T11:22:21-07:00 New Revision: 0e02e5decc732155d8dc4b63ecccbb1477603ecd URL: https://github.com/llvm/llvm-project/commit/0e02e5decc732155d8dc4b63ecccbb1477603ecd DIFF: https://github.com/llvm/llvm-project/commit/0e02e5decc732155d8dc4b63ecccbb1477603ecd.diff

[clang] a479786 - [RISCV][Sema] Add a build dependency on RISCVTargetParserTableGen after D145088.

Author: Craig Topper Date: 2023-04-29T13:33:54-07:00 New Revision: a4797869e73355209206a5175c11bedb14013211 URL: https://github.com/llvm/llvm-project/commit/a4797869e73355209206a5175c11bedb14013211 DIFF: https://github.com/llvm/llvm-project/commit/a4797869e73355209206a5175c11bedb14013211.diff

[clang] ee9cbe3 - [RISCV] Move RISCV::RVVBitsPerBlock from TargetParser to Support/RISCVISAInfo.h.

Author: Craig Topper Date: 2023-04-29T15:04:55-07:00 New Revision: ee9cbe3548cded885c6409d6dd8a616b515a06d3 URL: https://github.com/llvm/llvm-project/commit/ee9cbe3548cded885c6409d6dd8a616b515a06d3 DIFF: https://github.com/llvm/llvm-project/commit/ee9cbe3548cded885c6409d6dd8a616b515a06d3.diff

[clang] 9b1aaaf - Revert "[RISCV] Move RISCV::RVVBitsPerBlock from TargetParser to Support/RISCVISAInfo.h."

Author: Craig Topper Date: 2023-04-29T18:05:56-07:00 New Revision: 9b1aaaf933cfbd1f3061cf9954d50672600b0c8b URL: https://github.com/llvm/llvm-project/commit/9b1aaaf933cfbd1f3061cf9954d50672600b0c8b DIFF: https://github.com/llvm/llvm-project/commit/9b1aaaf933cfbd1f3061cf9954d50672600b0c8b.diff

[clang] fa42e7b - [RISCV] Merge RISCV::parseCPUKind and RISCV::checkCPUKind.

Author: Craig Topper Date: 2023-05-01T13:00:05-07:00 New Revision: fa42e7b6bc430941f42cf50b5c4e55b3c19ccc08 URL: https://github.com/llvm/llvm-project/commit/fa42e7b6bc430941f42cf50b5c4e55b3c19ccc08 DIFF: https://github.com/llvm/llvm-project/commit/fa42e7b6bc430941f42cf50b5c4e55b3c19ccc08.diff

[clang] e4c1fa7 - [RISCV] Add test cases to show that rvv_vector_bits attribute is not accepted for vbool or LMUL!=1 RVV types. NFC

Author: Craig Topper Date: 2023-06-08T08:47:59-07:00 New Revision: e4c1fa734ea7cd8f76f221e99cc727c18858183e URL: https://github.com/llvm/llvm-project/commit/e4c1fa734ea7cd8f76f221e99cc727c18858183e DIFF: https://github.com/llvm/llvm-project/commit/e4c1fa734ea7cd8f76f221e99cc727c18858183e.diff

[clang] e12aee2 - [RISCV] Update documentation for -mvscale-min/max options to mention RISC-V. NFC

Author: Craig Topper Date: 2023-06-08T09:16:01-07:00 New Revision: e12aee2afeabdba3fa2229b616c3aab48e6f2a54 URL: https://github.com/llvm/llvm-project/commit/e12aee2afeabdba3fa2229b616c3aab48e6f2a54 DIFF: https://github.com/llvm/llvm-project/commit/e12aee2afeabdba3fa2229b616c3aab48e6f2a54.diff

[clang] c5a88fe - [RISC-V] Zvk update to 0.9.7, Zvknc/Zvksc

Author: Eric Gouriou Date: 2023-06-12T15:43:08-07:00 New Revision: c5a88fe3d071b9f120541b56b0e3e78bca4feea0 URL: https://github.com/llvm/llvm-project/commit/c5a88fe3d071b9f120541b56b0e3e78bca4feea0 DIFF: https://github.com/llvm/llvm-project/commit/c5a88fe3d071b9f120541b56b0e3e78bca4feea0.diff

[clang] 2f2af2d - [RISCV] Change the immediate argument to Zk* intrinsics/builtins from i8 to i32.

Author: Craig Topper Date: 2023-06-13T10:39:43-07:00 New Revision: 2f2af2d01763374ed55f5fb598e5005c1b9af957 URL: https://github.com/llvm/llvm-project/commit/2f2af2d01763374ed55f5fb598e5005c1b9af957 DIFF: https://github.com/llvm/llvm-project/commit/2f2af2d01763374ed55f5fb598e5005c1b9af957.diff

[clang] 3ab9d4f - [RISCV] Reduce alignment for __attribute__((riscv_rvv_vector_bits)) for LMUL<1 types.

Author: Craig Topper Date: 2023-06-16T16:41:15-07:00 New Revision: 3ab9d4f479aa3deb63500b7dba55c9d6715208b6 URL: https://github.com/llvm/llvm-project/commit/3ab9d4f479aa3deb63500b7dba55c9d6715208b6 DIFF: https://github.com/llvm/llvm-project/commit/3ab9d4f479aa3deb63500b7dba55c9d6715208b6.diff

[clang] 8971fe2 - [RISCV] Remove Group from mcmodel_EQ_medlow/mcmodel_EQ_medany. NFCI

Author: Craig Topper Date: 2022-12-14T15:58:04-08:00 New Revision: 8971fe2b89793ea2c1c969882a539a04485c780c URL: https://github.com/llvm/llvm-project/commit/8971fe2b89793ea2c1c969882a539a04485c780c DIFF: https://github.com/llvm/llvm-project/commit/8971fe2b89793ea2c1c969882a539a04485c780c.diff

r290575 - [AVX-512] Replace masked 512-bit pmuldq and pmuludq builtins with the newly added unmasked versions and selects.

Author: ctopper Date: Mon Dec 26 21:46:16 2016 New Revision: 290575 URL: http://llvm.org/viewvc/llvm-project?rev=290575&view=rev Log: [AVX-512] Replace masked 512-bit pmuldq and pmuludq builtins with the newly added unmasked versions and selects. Modified: cfe/trunk/lib/Headers/avx512fintrin

r290574 - foo

Author: ctopper Date: Mon Dec 26 21:46:13 2016 New Revision: 290574 URL: http://llvm.org/viewvc/llvm-project?rev=290574&view=rev Log: foo Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def cfe/trunk/lib/Headers/avx512fintrin.h Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def

Re: r290574 - foo

Oops. I failed to squash this into another commit properly. Reverting momentarily. ~Craig On Mon, Dec 26, 2016 at 7:46 PM, Craig Topper via cfe-commits < cfe-commits@lists.llvm.org> wrote: > Author: ctopper > Date: Mon Dec 26 21:46:13 2016 > New Revision: 290574 > > URL: h

r290579 - Revert r290574 "foo"

Author: ctopper Date: Mon Dec 26 22:03:29 2016 New Revision: 290579 URL: http://llvm.org/viewvc/llvm-project?rev=290579&view=rev Log: Revert r290574 "foo" This was supposed to be merged with another commit with a real commit message. Sorry. Modified: cfe/trunk/include/clang/Basic/BuiltinsX8

r290578 - Revert r290575 "[AVX-512] Replace masked 512-bit pmuldq and pmuludq builtins with the newly added unmasked versions and selects."

Author: ctopper Date: Mon Dec 26 22:03:25 2016 New Revision: 290578 URL: http://llvm.org/viewvc/llvm-project?rev=290578&view=rev Log: Revert r290575 "[AVX-512] Replace masked 512-bit pmuldq and pmuludq builtins with the newly added unmasked versions and selects." I failed to merge this with r290

r290580 - [AVX-512] Replace masked 512-bit pmuldq and pmuludq builtins with the newly added unmasked versions and selects.

Author: ctopper Date: Mon Dec 26 22:04:57 2016 New Revision: 290580 URL: http://llvm.org/viewvc/llvm-project?rev=290580&view=rev Log: [AVX-512] Replace masked 512-bit pmuldq and pmuludq builtins with the newly added unmasked versions and selects. Modified: cfe/trunk/include/clang/Basic/Built

r291544 - AMD family 17h (znver1) enablement

Author: ctopper Date: Tue Jan 10 00:02:12 2017 New Revision: 291544 URL: http://llvm.org/viewvc/llvm-project?rev=291544&view=rev Log: AMD family 17h (znver1) enablement Summary: This patch enables the following 1. AMD family 17h architecture using "znver1" tune flag (-march, -mcpu). 2. ISAs that

r291545 - [X86] Add recent CPU strings to some of the tests that check other cpu names.

Author: ctopper Date: Tue Jan 10 00:02:16 2017 New Revision: 291545 URL: http://llvm.org/viewvc/llvm-project?rev=291545&view=rev Log: [X86] Add recent CPU strings to some of the tests that check other cpu names. Modified: cfe/trunk/test/Driver/x86-march.c cfe/trunk/test/Frontend/x86-targe

r280196 - [X86] Use v2i64 vectors to implement _mm_and/andn/or/xor_pd.

Author: ctopper Date: Wed Aug 31 00:38:55 2016 New Revision: 280196 URL: http://llvm.org/viewvc/llvm-project?rev=280196&view=rev Log: [X86] Use v2i64 vectors to implement _mm_and/andn/or/xor_pd. These will be reused when removing some builtins from avx512vldqintrin.h and this will make the tests

r280197 - [AVX-512] Implement masked floating point logical operations with native IR and remove the builtins.

Author: ctopper Date: Wed Aug 31 00:38:58 2016 New Revision: 280197 URL: http://llvm.org/viewvc/llvm-project?rev=280197&view=rev Log: [AVX-512] Implement masked floating point logical operations with native IR and remove the builtins. Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def

r280596 - [AVX-512] Remove masked integer add/sub builtins and replace with native IR.

Author: ctopper Date: Sat Sep 3 13:29:35 2016 New Revision: 280596 URL: http://llvm.org/viewvc/llvm-project?rev=280596&view=rev Log: [AVX-512] Remove masked integer add/sub builtins and replace with native IR. Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def cfe/trunk/lib/Headers/

r280597 - [AVX-512] Remove masked integer mullo builtins and replace with native IR.

Author: ctopper Date: Sat Sep 3 14:19:49 2016 New Revision: 280597 URL: http://llvm.org/viewvc/llvm-project?rev=280597&view=rev Log: [AVX-512] Remove masked integer mullo builtins and replace with native IR. Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def cfe/trunk/lib/Headers/av

r280635 - [AVX-512] Remove 128-bit and 256-bit masked floating point add/sub/mul/div builtins and replace with native operations.

Author: ctopper Date: Sun Sep 4 13:30:17 2016 New Revision: 280635 URL: http://llvm.org/viewvc/llvm-project?rev=280635&view=rev Log: [AVX-512] Remove 128-bit and 256-bit masked floating point add/sub/mul/div builtins and replace with native operations. We can't do the 512-bit ones because they

Re: r280597 - [AVX-512] Remove masked integer mullo builtins and replace with native IR.

^ /home/linaro/buildbot/clang-cmake-armv7-a15-full/llvm/tools/clang/test/CodeGen/avx512vlbw-builtins.c:747:11: error: expected string not found in input //CHECK: add <32 x i8> %{{.*}}, %{{.*}} ~Craig On Mon, Sep 5, 2016 at 3:53 PM, Renato Golin wrote: > O

Re: r280597 - [AVX-512] Remove masked integer mullo builtins and replace with native IR.

This error makes even less sense. Nothing about __builtin_ia32_selectd_512 requires a constant integer. /home/linaro/buildbot/clang-cmake-thumbv7-a15/stage1/bin/../lib/clang/4.0.0/include/avx512fintrin.h:223:19: error: argument to '__builtin_ia32_selectd_512' must be a constant integer return (_

r298040 - [AVX-512] Add missing typecasts and parentheses to _mm512_mask_i64gather_ps. My macro cleanup script I used on the others last year must have missed it.

Author: ctopper Date: Fri Mar 17 00:14:37 2017 New Revision: 298040 URL: http://llvm.org/viewvc/llvm-project?rev=298040&view=rev Log: [AVX-512] Add missing typecasts and parentheses to _mm512_mask_i64gather_ps. My macro cleanup script I used on the others last year must have missed it. Modified:

r298041 - [AVX-512] Fix test cases that were using the builtins directly without typecasts instead of the intrinsic header.

Author: ctopper Date: Fri Mar 17 00:59:22 2017 New Revision: 298041 URL: http://llvm.org/viewvc/llvm-project?rev=298041&view=rev Log: [AVX-512] Fix test cases that were using the builtins directly without typecasts instead of the intrinsic header. Modified: cfe/trunk/test/CodeGen/avx512bw-bu

r298042 - [AVX-512] Change the input type for some load intrinsics to take void type like the spec (and the test cases say).

Author: ctopper Date: Fri Mar 17 00:59:25 2017 New Revision: 298042 URL: http://llvm.org/viewvc/llvm-project?rev=298042&view=rev Log: [AVX-512] Change the input type for some load intrinsics to take void type like the spec (and the test cases say). Modified: cfe/trunk/lib/Headers/avx512fintr

Re: r298956 - Default enable the rtm feature only on skylake and later for now because Intel disabled the feature on some haswell and broadwell processors:

So if you use -march=hsw the backend will think rtm is enabled, but clang will block the intrinsics in the frontend? Not sure what you mean by split the haswell and broadwell cpu. ~Craig On Tue, Mar 28, 2017 at 4:18 PM, Eric Christopher wrote: > Hi Craig, Quentin, Jim, > > Just bringing this p

Re: r298956 - Default enable the rtm feature only on skylake and later for now because Intel disabled the feature on some haswell and broadwell processors:

Thanks, Eric. ~Craig On Wed, Mar 29, 2017 at 10:19 AM, Eric Christopher wrote: > OK, I went ahead and did this in the backend as well in: > > echristo@athyra ~/s/llvm> git svn dcommit > Committing to https://llvm.org/svn/llvm-project/llvm/trunk ... > M lib/Target/X86/X86.td > Committed r298986

r299058 - [APInt] Remove references to integerPartWidth and integerPart outside of APFloat implentation.

Author: ctopper Date: Thu Mar 30 00:48:58 2017 New Revision: 299058 URL: http://llvm.org/viewvc/llvm-project?rev=299058&view=rev Log: [APInt] Remove references to integerPartWidth and integerPart outside of APFloat implentation. Turns out integerPartWidth only explicitly defines the width of the

r299233 - [Sema][X86] Update immediate check for gather/scatter prefetch instructions to match the _MM_HINT_T0/T1 constant definitions

Author: ctopper Date: Fri Mar 31 12:22:30 2017 New Revision: 299233 URL: http://llvm.org/viewvc/llvm-project?rev=299233&view=rev Log: [Sema][X86] Update immediate check for gather/scatter prefetch instructions to match the _MM_HINT_T0/T1 constant definitions Our _MM_HINT_T0/T1 constant values ar

r299321 - [X86] Add __extension__ to f16c macro intrinsics to suppress warnings about compound literals when compiled for with earlier language standards enabled.

Author: ctopper Date: Sat Apr 1 22:02:53 2017 New Revision: 299321 URL: http://llvm.org/viewvc/llvm-project?rev=299321&view=rev Log: [X86] Add __extension__ to f16c macro intrinsics to suppress warnings about compound literals when compiled for with earlier language standards enabled. Fixes PR3

r299346 - [AVX-512] Fix some intrinsic macros that use the wrong macro parameter names and don't have parentheses around them.

Author: ctopper Date: Sun Apr 2 22:41:29 2017 New Revision: 299346 URL: http://llvm.org/viewvc/llvm-project?rev=299346&view=rev Log: [AVX-512] Fix some intrinsic macros that use the wrong macro parameter names and don't have parentheses around them. Thanks to Matthew Barr for reporting this iss

r299347 - [AVX-512] Fix a couple more intrinsic macros I missed in r299346.

Author: ctopper Date: Sun Apr 2 22:51:57 2017 New Revision: 299347 URL: http://llvm.org/viewvc/llvm-project?rev=299347&view=rev Log: [AVX-512] Fix a couple more intrinsic macros I missed in r299346. Modified: cfe/trunk/lib/Headers/avx512fintrin.h Modified: cfe/trunk/lib/Headers/avx512fintri

r299382 - Revert r299321 '[X86] Add __extension__ to f16c macro intrinsics to suppress warnings about compound literals when compiled for with earlier language standards enabled.' to see if recovers a

Author: ctopper Date: Mon Apr 3 14:43:47 2017 New Revision: 299382 URL: http://llvm.org/viewvc/llvm-project?rev=299382&view=rev Log: Revert r299321 '[X86] Add __extension__ to f16c macro intrinsics to suppress warnings about compound literals when compiled for with earlier language standards en

r299397 - Recommit r299321 '[X86] Add __extension__ to f16c macro intrinsics to suppress warnings about compound literals when compiled for with earlier language standards enabled.'

Author: ctopper Date: Mon Apr 3 17:59:30 2017 New Revision: 299397 URL: http://llvm.org/viewvc/llvm-project?rev=299397&view=rev Log: Recommit r299321 '[X86] Add __extension__ to f16c macro intrinsics to suppress warnings about compound literals when compiled for with earlier language standards

r299416 - [X86] Remove some code that tries to disable HLE feature. This feature flag was removed from the backend.

Author: ctopper Date: Tue Apr 4 01:38:44 2017 New Revision: 299416 URL: http://llvm.org/viewvc/llvm-project?rev=299416&view=rev Log: [X86] Remove some code that tries to disable HLE feature. This feature flag was removed from the backend. Modified: cfe/trunk/lib/Driver/ToolChains/Arch/X86.c

r300658 - [CodeGen] Use APInt::lshrInPlace instead of APInt::lshr. NFC

Author: ctopper Date: Wed Apr 19 00:17:33 2017 New Revision: 300658 URL: http://llvm.org/viewvc/llvm-project?rev=300658&view=rev Log: [CodeGen] Use APInt::lshrInPlace instead of APInt::lshr. NFC Modified: cfe/trunk/lib/CodeGen/CGExprConstant.cpp Modified: cfe/trunk/lib/CodeGen/CGExprConstant

r292329 - [AVX-512] Replace subvector broadcast builtins with shufflevectors and selects.

Author: ctopper Date: Tue Jan 17 20:17:10 2017 New Revision: 292329 URL: http://llvm.org/viewvc/llvm-project?rev=292329&view=rev Log: [AVX-512] Replace subvector broadcast builtins with shufflevectors and selects. Verified that the backend codegens this equally well. Modified: cfe/trunk/incl

r294403 - [X86] Remove PCOMMIT feature support since Intel has deprecated this instruction with no plans to release products with it.

Author: ctopper Date: Tue Feb 7 23:44:28 2017 New Revision: 294403 URL: http://llvm.org/viewvc/llvm-project?rev=294403&view=rev Log: [X86] Remove PCOMMIT feature support since Intel has deprecated this instruction with no plans to release products with it. Intel's documentation for the deprecat

r294404 - Use LLVM_FALLTHROUGH instead of FALLTHROUGH comments.

Author: ctopper Date: Tue Feb 7 23:44:30 2017 New Revision: 294404 URL: http://llvm.org/viewvc/llvm-project?rev=294404&view=rev Log: Use LLVM_FALLTHROUGH instead of FALLTHROUGH comments. Modified: cfe/trunk/lib/Basic/Targets.cpp Modified: cfe/trunk/lib/Basic/Targets.cpp URL: http://llvm.or

r294411 - [X86] Add -mclflushopt/-mno-clflushopt command line support and __CLFLUSHOPT__ define to match gcc.

Author: ctopper Date: Wed Feb 8 00:48:58 2017 New Revision: 294411 URL: http://llvm.org/viewvc/llvm-project?rev=294411&view=rev Log: [X86] Add -mclflushopt/-mno-clflushopt command line support and __CLFLUSHOPT__ define to match gcc. Modified: cfe/trunk/docs/ClangCommandLineReference.rst

r294414 - [X86] Remove 'umip' feature flag.

Author: ctopper Date: Wed Feb 8 01:13:22 2017 New Revision: 294414 URL: http://llvm.org/viewvc/llvm-project?rev=294414&view=rev Log: [X86] Remove 'umip' feature flag. This feature flag indicates that the processor has support for removing certain instructions from user mode software. But the fe

r294413 - [X86] Add -mmovbe/-mno-movbe command line options to match gcc.

Author: ctopper Date: Wed Feb 8 01:13:19 2017 New Revision: 294413 URL: http://llvm.org/viewvc/llvm-project?rev=294413&view=rev Log: [X86] Add -mmovbe/-mno-movbe command line options to match gcc. Modified: cfe/trunk/include/clang/Driver/Options.td cfe/trunk/test/Driver/x86-target-featur

r294416 - [X86] Add -mclwb/-mno-clwb command line arguments and __CLWB__ define to match gcc.

Author: ctopper Date: Wed Feb 8 01:36:58 2017 New Revision: 294416 URL: http://llvm.org/viewvc/llvm-project?rev=294416&view=rev Log: [X86] Add -mclwb/-mno-clwb command line arguments and __CLWB__ define to match gcc. In the future, we should also add a clwb intrinsic to the backend, a frontend

r294419 - [X86] Add -mmpx/-mno-mpx command line options and __MPX__ define to match gcc.

Author: ctopper Date: Wed Feb 8 01:56:42 2017 New Revision: 294419 URL: http://llvm.org/viewvc/llvm-project?rev=294419&view=rev Log: [X86] Add -mmpx/-mno-mpx command line options and __MPX__ define to match gcc. Modified: cfe/trunk/docs/ClangCommandLineReference.rst cfe/trunk/include/cla

r294420 - [X86] Update command line documentation for -mclwb and -mmovbe which I forgot in my previous commits.

Author: ctopper Date: Wed Feb 8 01:57:01 2017 New Revision: 294420 URL: http://llvm.org/viewvc/llvm-project?rev=294420&view=rev Log: [X86] Update command line documentation for -mclwb and -mmovbe which I forgot in my previous commits. Modified: cfe/trunk/docs/ClangCommandLineReference.rst

r294423 - [X86] Add -msgx/-mno-sgx command line options and __SGX__ define to match gcc.

Author: ctopper Date: Wed Feb 8 02:23:17 2017 New Revision: 294423 URL: http://llvm.org/viewvc/llvm-project?rev=294423&view=rev Log: [X86] Add -msgx/-mno-sgx command line options and __SGX__ define to match gcc. Modified: cfe/trunk/docs/ClangCommandLineReference.rst cfe/trunk/include/cla

r294424 - [X86] Add -mprefetchwt1/-mno-prefetchwt1 command line options and __PREFETCHWT1__ define to match gcc.

Author: ctopper Date: Wed Feb 8 02:23:40 2017 New Revision: 294424 URL: http://llvm.org/viewvc/llvm-project?rev=294424&view=rev Log: [X86] Add -mprefetchwt1/-mno-prefetchwt1 command line options and __PREFETCHWT1__ define to match gcc. Modified: cfe/trunk/docs/ClangCommandLineReference.rst

r294559 - [X86] Clzero flag addition and inclusion under znver1

Author: ctopper Date: Thu Feb 9 00:10:14 2017 New Revision: 294559 URL: http://llvm.org/viewvc/llvm-project?rev=294559&view=rev Log: [X86] Clzero flag addition and inclusion under znver1 1. Adds the command line flag for clzero. 2. Includes the clzero flag under znver1. 3. Defines the macro for

r294560 - [X86] Fix copy and paste bug in clzero test from r294559.

Author: ctopper Date: Thu Feb 9 00:22:43 2017 New Revision: 294560 URL: http://llvm.org/viewvc/llvm-project?rev=294560&view=rev Log: [X86] Fix copy and paste bug in clzero test from r294559. Modified: cfe/trunk/test/CodeGen/builtin-clzero.c Modified: cfe/trunk/test/CodeGen/builtin-clzero.c

r306850 - [X86] Add a break to the last case of a few switches to prevent accidents in the future. NFC

Author: ctopper Date: Fri Jun 30 11:14:02 2017 New Revision: 306850 URL: http://llvm.org/viewvc/llvm-project?rev=306850&view=rev Log: [X86] Add a break to the last case of a few switches to prevent accidents in the future. NFC Modified: cfe/trunk/lib/Basic/Targets.cpp Modified: cfe/trunk/li

r306849 - [X86] Move all atom CPUs to the same section of the switch and use fallthroughs like we do for other CPU generations. NFC

Author: ctopper Date: Fri Jun 30 11:14:01 2017 New Revision: 306849 URL: http://llvm.org/viewvc/llvm-project?rev=306849&view=rev Log: [X86] Move all atom CPUs to the same section of the switch and use fallthroughs like we do for other CPU generations. NFC This is prep work to add MOVBE to all At

r306851 - [X86] Add RDRND feature to Goldmont. Add MOVBE to all Atom CPUs.

Author: ctopper Date: Fri Jun 30 11:14:04 2017 New Revision: 306851 URL: http://llvm.org/viewvc/llvm-project?rev=306851&view=rev Log: [X86] Add RDRND feature to Goldmont. Add MOVBE to all Atom CPUs. Diffential Revision: https://reviews.llvm.org/D34842 Modified: cfe/trunk/lib/Basic/Targets.cp

r307420 - [X86] Replace 'fallthrough' comments with LLVM_FALLTHROUGH.

Author: ctopper Date: Fri Jul 7 11:41:09 2017 New Revision: 307420 URL: http://llvm.org/viewvc/llvm-project?rev=307420&view=rev Log: [X86] Replace 'fallthrough' comments with LLVM_FALLTHROUGH. Modified: cfe/trunk/lib/Basic/Targets.cpp Modified: cfe/trunk/lib/Basic/Targets.cpp URL: http://l

r307456 - [X86] Move AVX512VPOPCNTDQ in __builtin_cpu_support's enum to match trunk gcc.

Author: ctopper Date: Fri Jul 7 17:47:44 2017 New Revision: 307456 URL: http://llvm.org/viewvc/llvm-project?rev=307456&view=rev Log: [X86] Move AVX512VPOPCNTDQ in __builtin_cpu_support's enum to match trunk gcc. There are two other features before it that we don't currently support in the the f

r307506 - [X86] Add __get_cpuid_count to cpuid.h. Update __get_cpuid to check the maximum level support before accessing the leaf. Rename level to leaf everywhere.

Author: ctopper Date: Sun Jul 9 10:43:10 2017 New Revision: 307506 URL: http://llvm.org/viewvc/llvm-project?rev=307506&view=rev Log: [X86] Add __get_cpuid_count to cpuid.h. Update __get_cpuid to check the maximum level support before accessing the leaf. Rename level to leaf everywhere. This mat

r307507 - [X86] Add more feature flag bit defines to cpuid.h for gcc compatibility.

Author: ctopper Date: Sun Jul 9 10:43:11 2017 New Revision: 307507 URL: http://llvm.org/viewvc/llvm-project?rev=307507&view=rev Log: [X86] Add more feature flag bit defines to cpuid.h for gcc compatibility. Modified: cfe/trunk/lib/Headers/cpuid.h Modified: cfe/trunk/lib/Headers/cpuid.h URL:

r308002 - [X86] Add 'movbe' to btver2 CPU.

Author: ctopper Date: Thu Jul 13 23:36:17 2017 New Revision: 308002 URL: http://llvm.org/viewvc/llvm-project?rev=308002&view=rev Log: [X86] Add 'movbe' to btver2 CPU. This probably doesn't change anything because the frotend doesn't do anything with this feature and the backend will infer from t

r308546 - [X86] Put avx512vpopcntdq in the right spot in the validateCpuSupports string switch.

Author: ctopper Date: Wed Jul 19 15:58:58 2017 New Revision: 308546 URL: http://llvm.org/viewvc/llvm-project?rev=308546&view=rev Log: [X86] Put avx512vpopcntdq in the right spot in the validateCpuSupports string switch. The validateCpuSupports switch is in the order of the enum defined in CGBui

r308641 - [Docs] Regenerate the command line option reference.

Author: ctopper Date: Thu Jul 20 10:52:48 2017 New Revision: 308641 URL: http://llvm.org/viewvc/llvm-project?rev=308641&view=rev Log: [Docs] Regenerate the command line option reference. Modified: cfe/trunk/docs/ClangCommandLineReference.rst Modified: cfe/trunk/docs/ClangCommandLineReference

Re: r308641 - [Docs] Regenerate the command line option reference.

Hans, This needs to be ported to the 5.0 branch. Not sure if any new options have been added to 6.0 since the branch that would make this patch not correct. Probably safest to just regenerate it in the 5.0 branch. ~Craig On Thu, Jul 20, 2017 at 10:52 AM, Craig Topper via cfe-commits <

r322347 - [Docs] Fix typo in toolchain documentation

Author: ctopper Date: Thu Jan 11 18:57:02 2018 New Revision: 322347 URL: http://llvm.org/viewvc/llvm-project?rev=322347&view=rev Log: [Docs] Fix typo in toolchain documentation Modified: cfe/trunk/docs/Toolchain.rst Modified: cfe/trunk/docs/Toolchain.rst URL: http://llvm.org/viewvc/llvm-pro

r322461 - [X86] Implement old kunpck intrinsics using vector ops on vXi1 instead of integer shift/and/or

Author: ctopper Date: Sun Jan 14 11:23:50 2018 New Revision: 322461 URL: http://llvm.org/viewvc/llvm-project?rev=322461&view=rev Log: [X86] Implement old kunpck intrinsics using vector ops on vXi1 instead of integer shift/and/or Summary: kunpck intrinsics were removed in favor of native IR a few

r322912 - [X86] Add missing check for RDSEED to ICL, CNL, SKX sections of test/Preprocessor/predefined-arch-macros.c

Author: ctopper Date: Thu Jan 18 16:28:42 2018 New Revision: 322912 URL: http://llvm.org/viewvc/llvm-project?rev=322912&view=rev Log: [X86] Add missing check for RDSEED to ICL, CNL, SKX sections of test/Preprocessor/predefined-arch-macros.c Modified: cfe/trunk/test/Preprocessor/predefined-ar

r322982 - [X86] Add goldmont to test/Driver/x86-march.c

Author: ctopper Date: Fri Jan 19 11:43:36 2018 New Revision: 322982 URL: http://llvm.org/viewvc/llvm-project?rev=322982&view=rev Log: [X86] Add goldmont to test/Driver/x86-march.c Modified: cfe/trunk/test/Driver/x86-march.c Modified: cfe/trunk/test/Driver/x86-march.c URL: http://llvm.org/vi

r323046 - [X86] Put the code that defines __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 for the preprocessor with the other __GCC_HAVE_SYNC_COMPARE_AND_SWAP_* defines. NFC

Author: ctopper Date: Sat Jan 20 10:36:06 2018 New Revision: 323046 URL: http://llvm.org/viewvc/llvm-project?rev=323046&view=rev Log: [X86] Put the code that defines __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 for the preprocessor with the other __GCC_HAVE_SYNC_COMPARE_AND_SWAP_* defines. NFC Modified:

r323047 - [X86] Add rdpid command line option and intrinsics.

Author: ctopper Date: Sat Jan 20 10:36:52 2018 New Revision: 323047 URL: http://llvm.org/viewvc/llvm-project?rev=323047&view=rev Log: [X86] Add rdpid command line option and intrinsics. Summary: This patch adds -mrdpid/-mno-rdpid and the rdpid intrinsic. The corresponding LLVM commit has already

r323235 - [Docs] Re-generate command line documentation.

Author: ctopper Date: Tue Jan 23 10:40:15 2018 New Revision: 323235 URL: http://llvm.org/viewvc/llvm-project?rev=323235&view=rev Log: [Docs] Re-generate command line documentation. Modified: cfe/trunk/docs/ClangCommandLineReference.rst Modified: cfe/trunk/docs/ClangCommandLineReference.rst U

r323543 - [X86] Define __IBT__ when -mibt is specified.

Author: ctopper Date: Fri Jan 26 10:31:14 2018 New Revision: 323543 URL: http://llvm.org/viewvc/llvm-project?rev=323543&view=rev Log: [X86] Define __IBT__ when -mibt is specified. Modified: cfe/trunk/lib/Basic/Targets/X86.cpp cfe/trunk/test/Preprocessor/x86_target_features.c Modified: cf

r323552 - [X86] Add 'rdrnd' feature to silvermont to match recent gcc bug fix.

Author: ctopper Date: Fri Jan 26 11:34:45 2018 New Revision: 323552 URL: http://llvm.org/viewvc/llvm-project?rev=323552&view=rev Log: [X86] Add 'rdrnd' feature to silvermont to match recent gcc bug fix. gcc recently fixed this bug https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83546 Modified:

Re: r295279 - [cxx1z-constexpr-lambda] Implement captures - thus completing implementation of constexpr lambdas.

The assert below is throwing a -Wsign-compare warning because std::distance returns a signed type. + const size_t NumFields = + std::distance(ClosureClass->field_begin(), ClosureClass->field_end()); + + assert(NumFields == +std::distance(E->capture_init_begin(), E->capture_init_end()) &

r295291 - [AVX-512] Replace 512-bit masked packss/packus builtins and replace with new unmasked builtins.

Author: ctopper Date: Thu Feb 16 00:32:07 2017 New Revision: 295291 URL: http://llvm.org/viewvc/llvm-project?rev=295291&view=rev Log: [AVX-512] Replace 512-bit masked packss/packus builtins and replace with new unmasked builtins. These new unmasked builtins will enable us to easily support optim

r295570 - [X86] Replace XOP vpcmov builtins with native vector logical operations.

Author: ctopper Date: Sat Feb 18 15:15:30 2017 New Revision: 295570 URL: http://llvm.org/viewvc/llvm-project?rev=295570&view=rev Log: [X86] Replace XOP vpcmov builtins with native vector logical operations. Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def cfe/trunk/lib/Headers/xopi

Re: r296296 - [X86] DAZ Macros Relocation

Doesn't Intel's own documentation say these are in pmmintrin.h? gcc has them there as well. https://software.intel.com/en-us/node/683881 ~Craig On Sun, Feb 26, 2017 at 3:58 AM, Oren Ben Simhon via cfe-commits < cfe-commits@lists.llvm.org> wrote: > Author: orenb > Date: Sun Feb 26 05:58:15 2017

r297584 - [AVX-512] Fix avx512vl gather builtins to require the scale argument to be an ICE like the rest of the gather builtins.

Author: ctopper Date: Sun Mar 12 12:58:12 2017 New Revision: 297584 URL: http://llvm.org/viewvc/llvm-project?rev=297584&view=rev Log: [AVX-512] Fix avx512vl gather builtins to require the scale argument to be an ICE like the rest of the gather builtins. Modified: cfe/trunk/include/clang/Basi

r297590 - [AVX-512] Add range check for locality hint immediate on scatter/gather prefetch builtins.

Author: ctopper Date: Sun Mar 12 17:19:10 2017 New Revision: 297590 URL: http://llvm.org/viewvc/llvm-project?rev=297590&view=rev Log: [AVX-512] Add range check for locality hint immediate on scatter/gather prefetch builtins. Modified: cfe/trunk/lib/Sema/SemaChecking.cpp Modified: cfe/trunk/

r297642 - [X86] Add checking of the scale argument to scatter/gather builtins

Author: ctopper Date: Mon Mar 13 12:16:50 2017 New Revision: 297642 URL: http://llvm.org/viewvc/llvm-project?rev=297642&view=rev Log: [X86] Add checking of the scale argument to scatter/gather builtins The only valid values for scale immediate of scatter/gather builtins are 1, 2, 4, or 8. This p

[PATCH] D26686: [X86][AVX512] Replace lossless i32/u32 to f64 conversion intrinsics with generic IR

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM. Always nice to see more builtins go away. Repository: rL LLVM https://reviews.llvm.org/D26686 ___ cfe-commits mailing list c

r287313 - [AVX-512] Replace masked 16-bit element variable shift builtins with new unmasked versions and selects.

Author: ctopper Date: Thu Nov 17 23:04:51 2016 New Revision: 287313 URL: http://llvm.org/viewvc/llvm-project?rev=287313&view=rev Log: [AVX-512] Replace masked 16-bit element variable shift builtins with new unmasked versions and selects. Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.de

r287733 - [X86] Replace valignd/q builtins with appropriate __builtin_shufflevector.

Author: ctopper Date: Tue Nov 22 19:47:12 2016 New Revision: 287733 URL: http://llvm.org/viewvc/llvm-project?rev=287733&view=rev Log: [X86] Replace valignd/q builtins with appropriate __builtin_shufflevector. Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def cfe/trunk/lib/Headers/av

Re: r287755 - [X86][AVX512VL] Add missing _mm256_maskz_alignr_epi64 shufflevector check

Thanks! ~Craig On Wed, Nov 23, 2016 at 3:38 AM, Simon Pilgrim via cfe-commits < cfe-commits@lists.llvm.org> wrote: > Author: rksimon > Date: Wed Nov 23 05:38:52 2016 > New Revision: 287755 > > URL: http://llvm.org/viewvc/llvm-project?rev=287755&view=rev > Log: > [X86][AVX512VL] Add missing _mm25

r289338 - [AVX-512] Remove 128/256-bit masked vpermilvar builtins and replace with select and the avx unmasked builtins.

Author: ctopper Date: Sat Dec 10 14:27:39 2016 New Revision: 289338 URL: http://llvm.org/viewvc/llvm-project?rev=289338&view=rev Log: [AVX-512] Remove 128/256-bit masked vpermilvar builtins and replace with select and the avx unmasked builtins. Modified: cfe/trunk/include/clang/Basic/Builtin

r289345 - [AVX-512] Remove masking from 512-bit pshufb builtin. The backend now has a version without masking so wrap it with select.

Author: ctopper Date: Sat Dec 10 17:09:52 2016 New Revision: 289345 URL: http://llvm.org/viewvc/llvm-project?rev=289345&view=rev Log: [AVX-512] Remove masking from 512-bit pshufb builtin. The backend now has a version without masking so wrap it with select. This will allow the backend to constan

r289351 - [AVX-512] Remove masking from 512-bit vpermil builtins. The backend now has versions without masking so wrap it with select.

Author: ctopper Date: Sat Dec 10 19:26:52 2016 New Revision: 289351 URL: http://llvm.org/viewvc/llvm-project?rev=289351&view=rev Log: [AVX-512] Remove masking from 512-bit vpermil builtins. The backend now has versions without masking so wrap it with select. This will allow the backend to consta

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