vitalybuka wrote:
> > > Based on my rough understanding, this is expected?
> >
> >
> > What do you mean?
> > Isn't this test needs to be updated or disabled?
>
> I think this ASAN failure is not caused by this PR because these memorys are
> allocated/deallocated by
100% sure by this PR
https
vitalybuka wrote:
Internally ::allocate uses sided new:
```
void*
allocate(size_t __bytes, size_t __alignment = _S_max_align)
__attribute__((__returns_nonnull__,__alloc_size__(2),__alloc_align__(3)))
{ return ::operator new(__bytes, do_allocate(__bytes, __alignment)); }
```
https:
https://github.com/delcypher updated
https://github.com/llvm/llvm-project/pull/93121
>From 7f5af7cc180825e07b5f5292e3f6b860c8e8591e Mon Sep 17 00:00:00 2001
From: Dan Liew
Date: Fri, 17 May 2024 12:07:40 -0700
Subject: [PATCH 1/6] [BoundsSafety] Allow 'counted_by' attribute on pointers
in stru
https://github.com/delcypher updated
https://github.com/llvm/llvm-project/pull/93121
>From 7f5af7cc180825e07b5f5292e3f6b860c8e8591e Mon Sep 17 00:00:00 2001
From: Dan Liew
Date: Fri, 17 May 2024 12:07:40 -0700
Subject: [PATCH 1/7] [BoundsSafety] Allow 'counted_by' attribute on pointers
in stru
Author: Timm Bäder
Date: 2024-05-23T09:17:56+02:00
New Revision: af6812085cc7a7251a3095acbc96343ce660f135
URL:
https://github.com/llvm/llvm-project/commit/af6812085cc7a7251a3095acbc96343ce660f135
DIFF:
https://github.com/llvm/llvm-project/commit/af6812085cc7a7251a3095acbc96343ce660f135.diff
LO
https://github.com/delcypher edited
https://github.com/llvm/llvm-project/pull/93121
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@@ -4993,20 +4993,8 @@ void Parser::ParseLexedCAttribute(LateParsedAttribute
&LA,
"late field attribute expects to have at most one declaration.");
// Dispatch based on the attribute and parse it
- const AttributeCommonInfo::Form ParsedForm = ParsedAttr::Form::GNU
nikic wrote:
Unfortunately this is a Darwin-only test, and I don't have access to any MacOS
systems.
@JDevlieghere Could you please help me debug this issue? The test fails when
trying to evaluate this expression:
https://github.com/llvm/llvm-project/blob/58ddf3a0c6b6bbdf682ef3421d05e846a6e00
https://github.com/balazske edited
https://github.com/llvm/llvm-project/pull/92424
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https://github.com/Endilll commented:
Sema.h changes look good.
https://github.com/llvm/llvm-project/pull/70024
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wangpc-pp wrote:
Thanks @vitalybuka! After some investigations, I think this PR just uncovered
the existed ASAN problem.
```cpp
#if !defined(__cpp_sized_deallocation) || __cpp_sized_deallocation < 201309L
# define _LIBCPP_HAS_NO_LANGUAGE_SIZED_DEALLOCATION
#endif
#if !defined(_LIBCPP_BUILDING_
https://github.com/Endilll closed
https://github.com/llvm/llvm-project/pull/93098
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Author: Vlad Serebrennikov
Date: 2024-05-23T12:11:15+04:00
New Revision: 781b13538e55a42b2d02bb4d21779f15ff8a640c
URL:
https://github.com/llvm/llvm-project/commit/781b13538e55a42b2d02bb4d21779f15ff8a640c
DIFF:
https://github.com/llvm/llvm-project/commit/781b13538e55a42b2d02bb4d21779f15ff8a640c.
@@ -6086,6 +6086,62 @@ static SDValue lowerBALLOTIntrinsic(const
SITargetLowering &TLI, SDNode *N,
DAG.getConstant(0, SL, MVT::i32), DAG.getCondCode(ISD::SETNE));
}
+static SDValue lowerLaneOp(const SITargetLowering &TLI, SDNode *N,
+ Selection
https://github.com/vikramRH edited
https://github.com/llvm/llvm-project/pull/89217
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https://github.com/Endilll commented:
`Sema.h` changes look good.
https://github.com/llvm/llvm-project/pull/93121
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https://github.com/dkrupp updated
https://github.com/llvm/llvm-project/pull/92420
>From 80767176cbe8e5717c5f42b113f305d81b635cb9 Mon Sep 17 00:00:00 2001
From: Daniel Krupp
Date: Tue, 30 Apr 2024 15:20:52 +0200
Subject: [PATCH 1/2] [analyzer] Adding taint analysis capability to
unix.Malloc che
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 1cde1240ed6e45012d7510f4aa39badbdb4a4721
b31ec694c88635404b252f00472140e83083fd02 --
Author: Timm Bäder
Date: 2024-05-23T10:21:02+02:00
New Revision: 951b13d9a7220d761b1ee0dc09a50b635692ecf8
URL:
https://github.com/llvm/llvm-project/commit/951b13d9a7220d761b1ee0dc09a50b635692ecf8
DIFF:
https://github.com/llvm/llvm-project/commit/951b13d9a7220d761b1ee0dc09a50b635692ecf8.diff
LO
Author: Timm Bäder
Date: 2024-05-23T10:21:02+02:00
New Revision: 335e00faaf74f3f7463b32a415d39af0973f521f
URL:
https://github.com/llvm/llvm-project/commit/335e00faaf74f3f7463b32a415d39af0973f521f
DIFF:
https://github.com/llvm/llvm-project/commit/335e00faaf74f3f7463b32a415d39af0973f521f.diff
LO
@@ -11868,8 +11868,10 @@ static bool CheckMultiVersionFunction(Sema &S,
FunctionDecl *NewFD,
return false;
if (!OldDecl || !OldDecl->getAsFunction() ||
- OldDecl->getDeclContext()->getRedeclContext() !=
- NewFD->getDeclContext()->getRedeclContext()) {
+
https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/93044
>From 730c8c5081862b330d66455a0495e9d317da1795 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Wed, 22 May 2024 15:55:58 +0100
Subject: [PATCH] [clang][FMV] Allow declaration of function versions in
https://github.com/labrinea updated
https://github.com/llvm/llvm-project/pull/93044
>From ba2b8b53d80e17b1477a7d6fed51f0450bc539a3 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas
Date: Wed, 22 May 2024 15:55:58 +0100
Subject: [PATCH] [clang][FMV] Allow declaration of function versions in
@@ -5387,6 +5387,192 @@ bool
AMDGPULegalizerInfo::legalizeDSAtomicFPIntrinsic(LegalizerHelper &Helper,
return true;
}
+bool AMDGPULegalizerInfo::legalizeLaneOp(LegalizerHelper &Helper,
+ MachineInstr &MI,
+
https://github.com/balazske updated
https://github.com/llvm/llvm-project/pull/92424
From 769523d392204eac6c48cb80a2282212f3edbbe4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bal=C3=A1zs=20K=C3=A9ri?=
Date: Fri, 10 May 2024 17:30:23 +0200
Subject: [PATCH 1/4] [clang][analyzer] Move checker
alpha.s
=?utf-8?b?R8OhYm9yIFTDs3RodsOhcmk=?=
Message-ID:
In-Reply-To:
https://github.com/whisperity requested changes to this pull request.
https://github.com/llvm/llvm-project/pull/89925
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=?utf-8?b?R8OhYm9yIFTDs3RodsOhcmk=?=
Message-ID:
In-Reply-To:
@@ -0,0 +1,150 @@
+// RUN: %check_clang_tidy -std=c++98-or-later %s
bugprone-tagged-union-member-count %t \
+// RUN: -config='{CheckOptions: { \
+// RUN: bugprone-tagged-union-member-count.StrictMode: 1, \
+//
=?utf-8?b?R8OhYm9yIFTDs3RodsOhcmk=?=
Message-ID:
In-Reply-To:
https://github.com/whisperity edited
https://github.com/llvm/llvm-project/pull/89925
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=?utf-8?b?R8OhYm9yIFTDs3RodsOhcmk=?=
Message-ID:
In-Reply-To:
@@ -0,0 +1,37 @@
+//===--- TaggedUnionMemberCountCheck.h - clang-tidy -*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICE
=?utf-8?b?R8OhYm9yIFTDs3RodsOhcmk=?=
Message-ID:
In-Reply-To:
@@ -0,0 +1,37 @@
+//===--- TaggedUnionMemberCountCheck.h - clang-tidy -*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICE
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=?utf-8?b?R8OhYm9yIFTDs3RodsOhcmk=?=
Message-ID:
In-Reply-To:
@@ -0,0 +1,145 @@
+//===--- TaggedUnionMemberCountCheck.cpp - clang-tidy
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LIC
=?utf-8?b?R8OhYm9yIFTDs3RodsOhcmk=?=
Message-ID:
In-Reply-To:
@@ -0,0 +1,145 @@
+//===--- TaggedUnionMemberCountCheck.cpp - clang-tidy
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LIC
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vikramRH wrote:
updated the GIsel legalizer, I still have couple of questions for SDAG case
though,
1. What's the proper way to legalize f16 and bf16 for SDAG case without
bitcasts ? (I would think "fp_extend -> LaneOp -> Fptrunc" is wrong)
2. For scalar cases such as i64, f64, i128 .. (i.e 32
Author: Alexandros Lamprineas
Date: 2024-05-23T10:09:22+01:00
New Revision: 8930ba98e01bc66949e482b396f8389d64388359
URL:
https://github.com/llvm/llvm-project/commit/8930ba98e01bc66949e482b396f8389d64388359
DIFF:
https://github.com/llvm/llvm-project/commit/8930ba98e01bc66949e482b396f8389d643883
https://github.com/labrinea closed
https://github.com/llvm/llvm-project/pull/93044
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jayfoad wrote:
> 1. What's the proper way to legalize f16 and bf16 for SDAG case without
> bitcasts ? (I would think "fp_extend -> LaneOp -> Fptrunc" is wrong)
Bitcast to i16, anyext to i32, laneop, trunc to i16, bitcast to original type.
Why wouldn't you use bitcasts?
https://github.com/llv
https://github.com/dkrupp updated
https://github.com/llvm/llvm-project/pull/92420
>From 80767176cbe8e5717c5f42b113f305d81b635cb9 Mon Sep 17 00:00:00 2001
From: Daniel Krupp
Date: Tue, 30 Apr 2024 15:20:52 +0200
Subject: [PATCH 1/2] [analyzer] Adding taint analysis capability to
unix.Malloc che
ChuanqiXu9 wrote:
It is pretty interesting that I can pass the test by:
```
$git diff -U10
diff --git a/llvm/lib/Transforms/Coroutines/CoroSplit.cpp
b/llvm/lib/Transforms/Coroutines/CoroSplit.cpp
index 450ea8234371..003bfbf7138a 100644
--- a/llvm/lib/Transforms/Coroutines/CoroSplit.cpp
+++ b/ll
https://github.com/jh7370 edited https://github.com/llvm/llvm-project/pull/91280
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@@ -321,6 +321,11 @@ class ELFFile {
std::vector decode_relrs(Elf_Relr_Range relrs) const;
+ uint64_t crelHeader(ArrayRef Content) const;
jh7370 wrote:
It's not clear without looking at the method definition what the return value
actually represents. Ind
https://github.com/jh7370 commented:
I've made a start on this, but have run out of time. Will come back to
reviewing it another day.
https://github.com/llvm/llvm-project/pull/91280
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@@ -934,10 +943,51 @@ void ELFWriter::WriteSecHdrEntry(uint32_t Name, uint32_t
Type, uint64_t Flags,
WriteWord(EntrySize); // sh_entsize
}
+template
+static void encodeCrel(ArrayRef Relocs, raw_ostream &os) {
+ uint OffsetMask = 8, Offset = 0, Addend = 0;
+ uint32_t Symi
@@ -474,9 +480,28 @@ struct Elf_Rel_Impl, true>
: public Elf_Rel_Impl, false> {
LLVM_ELF_IMPORT_TYPES(Endianness, true)
static const bool IsRela = true;
+ static const bool IsCrel = false;
Elf_Sxword r_addend; // Compute value for relocatable field by adding this.
@@ -61,6 +61,9 @@ class MCTargetOptions {
bool Dwarf64 : 1;
+ // Use CREL relocation format for ELF.
+ bool Crel = false;
jh7370 wrote:
Nit here and elsewhere: Is "Crel" a correct way of spelling this? Should it be
"CRel" (for "CompressedRelocations")?
@@ -392,6 +393,70 @@ ELFFile::decode_relrs(Elf_Relr_Range relrs) const {
return Relocs;
}
+template
+uint64_t ELFFile::crelHeader(ArrayRef Content) const {
+ DataExtractor Data(Content, true, 8); // endian/class is irrelevant
+ DataExtractor::Cursor Cur(0);
+ uint64_t Hd
@@ -392,6 +393,70 @@ ELFFile::decode_relrs(Elf_Relr_Range relrs) const {
return Relocs;
}
+template
+uint64_t ELFFile::crelHeader(ArrayRef Content) const {
+ DataExtractor Data(Content, true, 8); // endian/class is irrelevant
+ DataExtractor::Cursor Cur(0);
+ uint64_t Hd
@@ -474,9 +480,28 @@ struct Elf_Rel_Impl, true>
: public Elf_Rel_Impl, false> {
LLVM_ELF_IMPORT_TYPES(Endianness, true)
static const bool IsRela = true;
+ static const bool IsCrel = false;
Elf_Sxword r_addend; // Compute value for relocatable field by adding this.
@@ -392,6 +393,70 @@ ELFFile::decode_relrs(Elf_Relr_Range relrs) const {
return Relocs;
}
+template
+uint64_t ELFFile::crelHeader(ArrayRef Content) const {
+ DataExtractor Data(Content, true, 8); // endian/class is irrelevant
jh7370 wrote:
Endian/class ma
@@ -86,6 +86,8 @@ DYNAMIC_TAG(RELRSZ, 35) // Size of Relr relocation table.
DYNAMIC_TAG(RELR, 36)// Address of relocation table (Relr entries).
DYNAMIC_TAG(RELRENT, 37) // Size of a Relr relocation entry.
+DYNAMIC_TAG(CREL, 38) // CREL relocation table
+
--
@@ -259,7 +260,7 @@ class ELFObjectWriter : public MCObjectWriter {
void recordRelocation(MCAssembler &Asm, const MCAsmLayout &Layout,
const MCFragment *Fragment, const MCFixup &Fixup,
MCValue Target, uint64_t &FixedValue) overr
dkrupp wrote:
Thanks for the reviews. I updated the patch.
@haoNoQ
- I changed the report to non-fatal
- I factored out the warning into a new checker optin.taint.TaintMalloc. This
way the checker can be enabled separately. Of course, the
alpha.security.taint.TaintPropagation checker is a pre
@@ -934,10 +943,51 @@ void ELFWriter::WriteSecHdrEntry(uint32_t Name, uint32_t
Type, uint64_t Flags,
WriteWord(EntrySize); // sh_entsize
}
+template
+static void encodeCrel(ArrayRef Relocs, raw_ostream &os) {
jh7370 wrote:
Nit: `os` -> `OS`
https://githu
https://github.com/wzssyqa created
https://github.com/llvm/llvm-project/pull/93159
The backend may have interest on the language-standard level of source file.
Let's pass it to IR.
In a ll file, it looks like
language-standard = "gnu17"
>From 3e413bae6ba18276e4d47075d48d656e4f732b5e Mon Se
https://github.com/wzssyqa converted_to_draft
https://github.com/llvm/llvm-project/pull/93159
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llvmbot wrote:
@llvm/pr-subscribers-llvm-ir
Author: YunQiang Su (wzssyqa)
Changes
The backend may have interest on the language-standard level of source file.
Let's pass it to IR.
In a ll file, it looks like
language-standard = "gnu17"
---
Full diff: https://github.com/llvm/llvm-proj
llvmbot wrote:
@llvm/pr-subscribers-clang-codegen
Author: YunQiang Su (wzssyqa)
Changes
The backend may have interest on the language-standard level of source file.
Let's pass it to IR.
In a ll file, it looks like
language-standard = "gnu17"
---
Full diff: https://github.com/llvm/llv
https://github.com/sdesmalen-arm closed
https://github.com/llvm/llvm-project/pull/92427
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Author: Sander de Smalen
Date: 2024-05-23T10:42:11+01:00
New Revision: f81da75693fff6c2ffefbb3883e08f11b21ee643
URL:
https://github.com/llvm/llvm-project/commit/f81da75693fff6c2ffefbb3883e08f11b21ee643
DIFF:
https://github.com/llvm/llvm-project/commit/f81da75693fff6c2ffefbb3883e08f11b21ee643.di
RKSimon wrote:
@endilll Thanks for working on this - out of interest are you intending to do
this for CGBuiltin as well? Is the plan to no longer have to include all target
builtins in all clang builds?
https://github.com/llvm/llvm-project/pull/93098
___
Author: Timm Bäder
Date: 2024-05-23T11:48:33+02:00
New Revision: 10dc3a8e916d73291269e5e2b82dd22681489aa1
URL:
https://github.com/llvm/llvm-project/commit/10dc3a8e916d73291269e5e2b82dd22681489aa1
DIFF:
https://github.com/llvm/llvm-project/commit/10dc3a8e916d73291269e5e2b82dd22681489aa1.diff
LO
https://github.com/arsenm requested changes to this pull request.
You cannot encode language standards in this. We should simply have different
operations that provide the range of semantics and not make the IR modal
https://github.com/llvm/llvm-project/pull/93159
_
Author: Timm Bäder
Date: 2024-05-23T11:56:23+02:00
New Revision: 45a95c3c543c88a669cffd3f7ee2a1b7e02b44e8
URL:
https://github.com/llvm/llvm-project/commit/45a95c3c543c88a669cffd3f7ee2a1b7e02b44e8
DIFF:
https://github.com/llvm/llvm-project/commit/45a95c3c543c88a669cffd3f7ee2a1b7e02b44e8.diff
LO
@@ -5456,43 +5444,32 @@ bool
AMDGPULegalizerInfo::legalizeLaneOp(LegalizerHelper &Helper,
if ((Size % 32) == 0) {
SmallVector PartialRes;
unsigned NumParts = Size / 32;
-auto IsS16Vec = Ty.isVector() && Ty.getElementType() == S16;
+bool IsS16Vec = Ty.isVector
@@ -6086,6 +6086,62 @@ static SDValue lowerBALLOTIntrinsic(const
SITargetLowering &TLI, SDNode *N,
DAG.getConstant(0, SL, MVT::i32), DAG.getCondCode(ISD::SETNE));
}
+static SDValue lowerLaneOp(const SITargetLowering &TLI, SDNode *N,
+ Selection
wzssyqa wrote:
Let's close it.
https://github.com/llvm/llvm-project/pull/93159
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https://github.com/wzssyqa closed
https://github.com/llvm/llvm-project/pull/93159
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ChuanqiXu9 wrote:
I land it directly given it looks straightforward and trivial in
https://github.com/llvm/llvm-project/commit/31f1590e4fb324c43dc36199587c453e27b6f6fa
See the commit message if you're interested.
https://github.com/llvm/llvm-project/pull/89751
_
Endilll wrote:
@RKSimon Not at the moment. The current goal is to reduce amount of
declarations in `Sema`, and target-specific functions are easy to move out and,
importantly, teach where new ones should be placed. No functional changes
intended.
I don't know much about our CodeGen, so I'm no
https://github.com/xbjfk updated https://github.com/llvm/llvm-project/pull/68690
>From 26fdd2ef8b94d78c295afe5c6b811225b56e9f4e Mon Sep 17 00:00:00 2001
From: Reagan Bohan
Date: Sun, 10 Mar 2024 01:49:37 +
Subject: [PATCH] [clang] Add /Zc:__STDC__ flag to clang-cl
This commit adds the /Zc:_
ChuanqiXu9 wrote:
Oh, it looks like some bots are not happy. I send the PR at
https://github.com/llvm/llvm-project/pull/93167
https://github.com/llvm/llvm-project/pull/89751
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Author: Balázs Kéri
Date: 2024-05-23T12:56:16+02:00
New Revision: 3c23047413957024294872e38c27707c71d05805
URL:
https://github.com/llvm/llvm-project/commit/3c23047413957024294872e38c27707c71d05805
DIFF:
https://github.com/llvm/llvm-project/commit/3c23047413957024294872e38c27707c71d05805.diff
L
https://github.com/balazske closed
https://github.com/llvm/llvm-project/pull/92424
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Author: Timm Bäder
Date: 2024-05-23T13:10:58+02:00
New Revision: 1d0e8b24001d854a848a3810b90244a6bc94cf03
URL:
https://github.com/llvm/llvm-project/commit/1d0e8b24001d854a848a3810b90244a6bc94cf03
DIFF:
https://github.com/llvm/llvm-project/commit/1d0e8b24001d854a848a3810b90244a6bc94cf03.diff
LO
vikramRH wrote:
> > 1. What's the proper way to legalize f16 and bf16 for SDAG case without
> > bitcasts ? (I would think "fp_extend -> LaneOp -> Fptrunc" is wrong)
>
> Bitcast to i16, anyext to i32, laneop, trunc to i16, bitcast to original type.
>
> Why wouldn't you use bitcasts?
Just a do
https://github.com/cor3ntin approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/93124
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Author: Timm Bäder
Date: 2024-05-23T13:47:54+02:00
New Revision: 84729c9df30b29d5f4e903ad71235a6aa0c764d6
URL:
https://github.com/llvm/llvm-project/commit/84729c9df30b29d5f4e903ad71235a6aa0c764d6
DIFF:
https://github.com/llvm/llvm-project/commit/84729c9df30b29d5f4e903ad71235a6aa0c764d6.diff
LO
Author: Timm Bäder
Date: 2024-05-23T14:01:32+02:00
New Revision: fbd643fb22607b933a4e129ae86a7334b62c9b55
URL:
https://github.com/llvm/llvm-project/commit/fbd643fb22607b933a4e129ae86a7334b62c9b55
DIFF:
https://github.com/llvm/llvm-project/commit/fbd643fb22607b933a4e129ae86a7334b62c9b55.diff
LO
@@ -88,10 +88,12 @@ class ModelDumper {
void dump(Value &V) {
JOS.attribute("value_id", llvm::to_string(&V));
-if (!Visited.insert(&V).second)
- return;
-
JOS.attribute("kind", debugString(V.getKind()));
+if (!Visited.insert(&V).second) {
+ JOS.att
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Vlad Serebrennikov (Endilll)
Changes
This patch introduces `SemaAMDGPU`, `SemaARM`, `SemaBPF`, `SemaHexagon`,
`SemaLoongArch`, `SemaMIPS`, `SemaNVPTX`, `SemaPPC`, `SemaSystemZ`, `SemaWasm`.
This continues previous efforts to spli
llvmbot wrote:
@llvm/pr-subscribers-backend-systemz
Author: Vlad Serebrennikov (Endilll)
Changes
This patch introduces `SemaAMDGPU`, `SemaARM`, `SemaBPF`, `SemaHexagon`,
`SemaLoongArch`, `SemaMIPS`, `SemaNVPTX`, `SemaPPC`, `SemaSystemZ`, `SemaWasm`.
This continues previous efforts to spl
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 781b13538e55a42b2d02bb4d21779f15ff8a640c
6e68c960bde622eb244f726d97982219b08a68bf --
Discookie wrote:
gentle ping @martinboehme @gribozavr
https://github.com/llvm/llvm-project/pull/84166
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Endilll wrote:
The only thing clang-format complain about is switches for builtins for ARM,
Hexagon, MIPS, and SystemZ. I don't feel like it makes improvements there, but
open for input from contributors in those areas.
https://github.com/llvm/llvm-project/pull/93179
__
https://github.com/mizvekov closed
https://github.com/llvm/llvm-project/pull/93124
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Author: Matheus Izvekov
Date: 2024-05-23T09:27:40-03:00
New Revision: 01f143dd39dc14029943dcf6eb2f7bbc2d82d6d4
URL:
https://github.com/llvm/llvm-project/commit/01f143dd39dc14029943dcf6eb2f7bbc2d82d6d4
DIFF:
https://github.com/llvm/llvm-project/commit/01f143dd39dc14029943dcf6eb2f7bbc2d82d6d4.dif
https://github.com/arsenm commented:
Should update the GitHub autolabeler paths for the targets
https://github.com/llvm/llvm-project/pull/93179
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https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/93179
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RKSimon wrote:
Not sure - CI checks aren't running either
https://github.com/llvm/llvm-project/pull/93136
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Endilll wrote:
> Should update the GitHub autolabeler paths for the targets if they don't get
> caught talready
AMDGPU has been already caught, I updated the rest. Thank you!
https://github.com/llvm/llvm-project/pull/93179
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https://github.com/cor3ntin created
https://github.com/llvm/llvm-project/pull/93187
As per https://eel.is/c++draft/expr.const#17
Fixes #91308
>From faecc5c3d88f2e205c62424e4c76df92f66ea4fe Mon Sep 17 00:00:00 2001
From: Corentin Jabot
Date: Thu, 23 May 2024 14:58:49 +0200
Subject: [PATCH] [Cl
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: cor3ntin (cor3ntin)
Changes
As per https://eel.is/c++draft/expr.const#17
Fixes #91308
---
Full diff: https://github.com/llvm/llvm-project/pull/93187.diff
4 Files Affected:
- (modified) clang/docs/ReleaseNotes.rst (+2)
- (modified) cla
Author: Vlad Serebrennikov
Date: 2024-05-23T17:05:41+04:00
New Revision: 4feae05c6abda364a9295aecfa600d7d4e7dfeb6
URL:
https://github.com/llvm/llvm-project/commit/4feae05c6abda364a9295aecfa600d7d4e7dfeb6
DIFF:
https://github.com/llvm/llvm-project/commit/4feae05c6abda364a9295aecfa600d7d4e7dfeb6.
https://github.com/Endilll closed
https://github.com/llvm/llvm-project/pull/92953
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/93064
>From e12473d466d7b354ecff0b8ea553b64d3059e1cf Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 23 May 2024 09:07:31 -0400
Subject: [PATCH] [AMDGPU][Clang] Add check of size for
__builtin_amdgcn_global_loa
https://github.com/yronglin updated
https://github.com/llvm/llvm-project/pull/91879
>From f7b2ae00eebb272e0e5e221608ec3a36146a5d21 Mon Sep 17 00:00:00 2001
From: yronglin
Date: Sun, 12 May 2024 14:42:09 +0800
Subject: [PATCH 1/4] [Analyzer][CFG] Correctly handle rebuilted default arg
and defau
@@ -0,0 +1,13 @@
+// RUN: %clang_cc1 -cl-std=CL2.0 -O0 -triple amdgcn-unknown-unknown
-target-cpu gfx940 -S -verify -o - %s
+// REQUIRES: amdgpu-registered-target
+
+typedef unsigned int u32;
+
+void test_global_load_lds_unsupported_size(global u32* src, local u32 *dst,
u32 size
@@ -12385,4 +12385,8 @@ def err_acc_reduction_composite_type
def err_acc_reduction_composite_member_type :Error<
"OpenACC 'reduction' composite variable must not have non-scalar field">;
def note_acc_reduction_composite_member_loc : Note<"invalid field is here">;
+
+// AMDG
@@ -1964,39 +1964,55 @@ void ExprEngine::Visit(const Stmt *S, ExplodedNode
*Pred,
case Stmt::CXXDefaultArgExprClass:
case Stmt::CXXDefaultInitExprClass: {
Bldr.takeNodes(Pred);
- ExplodedNodeSet PreVisit;
- getCheckerManager().runCheckersForPreStmt(PreV
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