[PATCH] D105273: [analyzer] Introduce range-based reasoning for subtraction operator

manas added a comment. Here is the proof using Z3: https://gist.github.com/weirdsmiley/8a35a0e1f55f310e3566cbd47555491a Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105273/new/ https://reviews.llvm.org/D105273 ___

[PATCH] D101566: Let -Wweak-template-vtables warn on implicit instantiations

aaronpuchert added a subscriber: dfaure-kdab. aaronpuchert added a comment. In D101566#2891764 , @dblaikie wrote: > This patch is still conflating two things - effectively removing an existing > warning (which I agree with) and adding a new one (which I

[PATCH] D105194: [PowerPC] Add PowerPC cmpb builtin and emit target indepedent code for XL compatibility

jroelofs added a comment. I moved a couple of new tests from this patch from CodeGen -> CodeGen/PowerPC so they don't fail when the PPC backend isn't built: f6769b663a0d4432b5e00e0c03904a5dfba7b077 Repository: rG LLVM Git

[PATCH] D104058: ThinLTO: Fix inline assembly references to static functions with CFI

samitolvanen added inline comments. Comment at: llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp:77 + // references from inline assembly. + std::string Alias = ".set \"" + OldName + "\",\"" + NewName + "\"\n"; + ExportM.appendModuleInlineAsm(Alias); ---

[PATCH] D101566: Let -Wweak-template-vtables warn on implicit instantiations

dblaikie added a comment. In D101566#2891923 , @aaronpuchert wrote: > In D101566#2891764 , @dblaikie > wrote: > >> This patch is still conflating two things - effectively removing an existing >> warning (which

[clang] 2fd1520 - [PowerPC] Implemented mtmsr, mfspr, mtspr Builtins

Author: Albion Fung Date: 2021-07-20T17:51:00-05:00 New Revision: 2fd1520247de6ba1679e7288e3678fb7f8ca2183 URL: https://github.com/llvm/llvm-project/commit/2fd1520247de6ba1679e7288e3678fb7f8ca2183 DIFF: https://github.com/llvm/llvm-project/commit/2fd1520247de6ba1679e7288e3678fb7f8ca2183.diff L

[PATCH] D106130: [PowerPC] Implemented mtmsr, mfspr, mtspr Builtins

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG2fd1520247de: [PowerPC] Implemented mtmsr, mfspr, mtspr Builtins (authored by Conanap). Changed prior to commit: https://reviews.llvm.org/D106130?

[PATCH] D105946: [PowerPC] Store, load, move from and to registers related builtins

Conanap added a comment. issue should be fixed now; pushed with this: https://reviews.llvm.org/D106130#change-PZi4uueeCg9i (I just had to move the test files into the `PowerPC` folder). Will continue to monitor Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.

[PATCH] D106409: [PowerPC] Add diagnostic for out of range values for vec_cts,vec_ctf

ZarkoCA created this revision. ZarkoCA added reviewers: bmahjour, nemanjai, jsji, PowerPC. Herald added subscribers: shchenz, kbarton. ZarkoCA requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. LLVM (llc) will crash when a user specifies a num

[PATCH] D104058: ThinLTO: Fix inline assembly references to static functions with CFI

samitolvanen added inline comments. Comment at: llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp:77 + // references from inline assembly. + std::string Alias = ".set \"" + OldName + "\",\"" + NewName + "\"\n"; + ExportM.appendModuleInlineAsm(Alias); ---

[PATCH] D106394: [clang][pp] adds '#pragma include_instead'

cjdb updated this revision to Diff 360317. cjdb marked an inline comment as done. cjdb added a comment. - renames test files so they better describe intention - replaces `SmallVector` with `SetVector` - replaces `std::accumulate` with `llvm::interleave` Repository: rG LLVM Github Monorepo CHA

[PATCH] D106410: [PowerPC] Emit error for Altivec vector initializations when -faltivec-src-compat=gcc is specified

amyk created this revision. amyk added reviewers: PowerPC, nemanjai, stefanp. amyk added projects: PowerPC, LLVM, clang. Herald added a subscriber: shchenz. amyk requested review of this revision. Under the `-faltivec-src-compat=gcc` option, AltiVec vector initialization should be treated as if t

[PATCH] D106030: [Clang] add support for error+warning fn attrs

nickdesaulniers updated this revision to Diff 360324. nickdesaulniers marked 4 inline comments as done. nickdesaulniers edited the summary of this revision. nickdesaulniers added a comment. - merge ErrorAttr with WarningAttr - fix dumb short circuit bug - rename diag group - handle multiple instan

[PATCH] D106030: [Clang] add support for error+warning fn attrs

nickdesaulniers added inline comments. Comment at: clang/include/clang/Basic/Attr.td:3823 + +def Warning : Attr { + let Spellings = [GCC<"warning">]; aaron.ballman wrote: > nickdesaulniers wrote: > > aaron.ballman wrote: > > > Given that the only functional diff

[PATCH] D101566: Let -Wweak-template-vtables warn on implicit instantiations

aaronpuchert added a comment. In D101566#2891972 , @dblaikie wrote: > For Rafael - probably because he didn't look at all the cases the warning > does catch & see that it's pretty much entirely no use Right, he didn't suggest this particular fix but ano

[PATCH] D101566: Let -Wweak-template-vtables warn on implicit instantiations

aaronpuchert added a reviewer: aaron.ballman. aaronpuchert added a subscriber: aaron.ballman. aaronpuchert added a comment. Let's add @aaron.ballman to get a third opinion. The discussion is meandering a bit, but you should understand the gist from the first comments or the bug report. The quest

[PATCH] D106030: [Clang] add support for error+warning fn attrs

nickdesaulniers added inline comments. Comment at: clang/test/Frontend/backend-attribute-error-warning.c:29 + duplicate_errors(); // expected-error {{call to 'duplicate_errors' declared with attribute error: two}} + // TODO: why is this a warning not an error + duplicate_

[PATCH] D106371: [AIX] Generate large code model relocations when mcmodel=medium on AIX

hubert.reinterpretcast added a comment. LGTM with minor nit; thanks. Comment at: clang/lib/Driver/ToolChains/Clang.cpp:5140 +A->render(Args, CmdArgs); +} else D.Diag(diag::err_drv_invalid_argument_to_option) Add braces to the `else` block whe

[PATCH] D105462: [X86] Add CRC32 feature.

tianqing updated this revision to Diff 360338. tianqing added a comment. Herald added a subscriber: jfb. Instead of using ImpliedFeatures, manually enable CRC32 in presence of SSE4.2. This should mimic GCC better. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://review

[PATCH] D98709: [clang-tidy] New feature --skip-headers, part 1, skip Decls

chh updated this revision to Diff 360336. chh edited the summary of this revision. chh added a comment. Add bugprone-forward-declaration-namespace-header.cpp test; fix some coding style warnings. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D98709/new/ https://reviews.llvm.org/D98709

[PATCH] D98710: [clang-tidy] New feature --skip-headers, part 1, setTraversalScope

chh updated this revision to Diff 360339. chh edited the summary of this revision. chh added a comment. Add bugprone-forward-declaration-namespace-header.cpp test to show that MatchFinder-based checks can also depend on header Decls. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D98710/ne

[PATCH] D105703: [hwasan] Use stack safety analysis.

vitalybuka added inline comments. Comment at: llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp:406 +// architecture that doesn't allow stack tagging we will still load the +// analysis. +// This is so we don't need to plumb TargetTriple all the way to here.

[clang] 89ce644 - [Clang][RISCV] Add half-precision FP for vle16/vse16.

Author: Hsiangkai Wang Date: 2021-07-21T09:55:21+08:00 New Revision: 89ce6449024d2b288b825e815ab5cc11faf04d22 URL: https://github.com/llvm/llvm-project/commit/89ce6449024d2b288b825e815ab5cc11faf04d22 DIFF: https://github.com/llvm/llvm-project/commit/89ce6449024d2b288b825e815ab5cc11faf04d22.diff

[PATCH] D106340: [Clang][RISCV] Add half-precision FP for vle16/vse16.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG89ce6449024d: [Clang][RISCV] Add half-precision FP for vle16/vse16. (authored by HsiangKai). Repository: rG LLVM Github Monorepo CHANGES SINCE LA

[PATCH] D106416: [analyzer] Fix build dependency issues for SATest

manas created this revision. Herald added subscribers: steakhal, ASDenysPetrov, dkrupp, donat.nagy, Szelethus, mikhail.ramalho, a.sidorin, szepet, baloghadamsoftware, xazax.hun. Herald added a reviewer: teemperor. manas requested review of this revision. Herald added a project: clang. Herald added

[PATCH] D106111: opencl-c.h: add initial CL 3.0 conditionals for atomic operations.

airlied updated this revision to Diff 360349. airlied added a comment. add conditional around memory_order_seq_cst Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D106111/new/ https://reviews.llvm.org/D106111 Files: clang/lib/Headers/opencl-c-base.

[PATCH] D106333: [AArch64][SVE] Handle svbool_t VLST <-> VLAT/GNUT conversion

junparser updated this revision to Diff 360352. junparser added a comment. Address comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D106333/new/ https://reviews.llvm.org/D106333 Files: clang/lib/AST/ASTContext.cpp clang/lib/Sema/SemaChec

[PATCH] D106393: [PowerPC][AIX] Add support for varargs for complex types on AIX

hubert.reinterpretcast added inline comments. Comment at: clang/lib/CodeGen/TargetInfo.cpp:4577-4583 + // If we have a complex type and the base type is smaller than 8 bytes, + // the ABI calls for the real and imaginary parts to be right-adjusted + // in separate doublewords.

[PATCH] D105821: [analyzer] [WIP] Model destructor for std::unique_ptr

NoQ added a comment. Yes, I think this should work. You're invalidating less regions than a normal destructor invalidation would have caused (eg., you're not touching globals). One way to emulate that precisely would be to construct a `CallEvent` for the destructor and invoke `CallEvent::inval

[PATCH] D106370: [Analyzer][solver][NFC] Add explanatory comments to trivial eq classes

NoQ accepted this revision. NoQ added a comment. This revision is now accepted and ready to land. I understood this comment! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D106370/new/ https://reviews.llvm.org/D106370 ___

[PATCH] D105462: [X86] Add CRC32 feature.

craig.topper added inline comments. Comment at: clang/lib/Basic/Targets/X86.cpp:159 + // Enable CRC32 if SSE4.2 is enabled. + // NOTE: In conformance with GCC behavior, CRC32 is still available even if + // it's explicitly disabled. This doesn't seem to be tru

[clang] 90cb529 - [clang][analyzer] Improve report of file read at EOF condition (alpha.unix.Stream checker).

Author: Balázs Kéri Date: 2021-07-21T08:54:11+02:00 New Revision: 90cb5297adf086073f14d455050b5cde9a03503d URL: https://github.com/llvm/llvm-project/commit/90cb5297adf086073f14d455050b5cde9a03503d DIFF: https://github.com/llvm/llvm-project/commit/90cb5297adf086073f14d455050b5cde9a03503d.diff L

[PATCH] D104925: [Analyzer] Improve report of file read at end-of-file condition.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG90cb5297adf0: [clang][analyzer] Improve report of file read at EOF condition (alpha.unix. (authored by balazske). Repository: rG LLVM Github Monor

[PATCH] D105516: [clang][PassManager] Add -falways-mem2reg to run mem2reg at -O0

rjmccall added a comment. I agree with Eli: we should decide what the goals are here and then use those goals to decide if we can identify a desirable permanent feature and, if so, what the appropriate name for that feature is. It sounds like your goal is to get readable assembly that still cor

[PATCH] D102105: [OpenMP][NFC] Refactor cc tests for implicit simd check

ggeorgakoudis abandoned this revision. ggeorgakoudis added a comment. Fixed in another revision (see description) Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D102105/new/ https://reviews.llvm.org/D102105 __

[PATCH] D103440: [WIP][analyzer] Introduce range-based reasoning for addition operator

vsavchenko added a comment. In D103440#2891915 , @manas wrote: > Here is the proof of correctness of the algorithm using Z3: > https://gist.github.com/weirdsmiley/ad6a9dbf3370e96d29f9e90068931d25 There is a couple of fundamental problems there that you

<    1   2   3