Merged to release_90 in r369649.
On Fri, Aug 16, 2019 at 12:22 PM Lewis Revill via cfe-commits
wrote:
>
> Author: lewis-revill
> Date: Fri Aug 16 03:23:56 2019
> New Revision: 369093
>
> URL: http://llvm.org/viewvc/llvm-project?rev=369093&view=rev
> Log:
> [RISCV] Add inline asm constraint A for
Author: lewis-revill
Date: Fri Aug 16 03:23:56 2019
New Revision: 369093
URL: http://llvm.org/viewvc/llvm-project?rev=369093&view=rev
Log:
[RISCV] Add inline asm constraint A for RISC-V
This allows the constraint A to be used in inline asm for RISC-V, which
allows an address held in a register to
