@@ -381,3 +381,14 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+
https://github.com/sunshaoce updated
https://github.com/llvm/llvm-project/pull/94564
>From 363e29385277c049bc91a86e76ff6f6ae70ceaa9 Mon Sep 17 00:00:00 2001
From: Shao-Ce SUN
Date: Thu, 6 Jun 2024 12:05:33 +0800
Subject: [PATCH 1/3] [RISCV] Add processor definition for Spacemit-K1
---
clang/t
zqb-all wrote:
> Spacemit K1 is the name of the product/SoC or whatever you call it. The
> processor definitions in the RISCV backend are focusing on the CPU core. For
> Spacemit K1, the name of its core should be `X60`? I don't know……
Yes，core is x60: https://www.spacemit.com/spacemit-x60-co
zengdage wrote:
> Spacemit K1 is the name of the product/SoC or whatever you call it. The
> processor definitions in the RISCV backend are focusing on the CPU core. For
> Spacemit K1, the name of its core should be `X60`? I don't know……
@sunshaoce Hi, the `Spacemit-K1` is the SoC name and the
@@ -381,3 +381,14 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+
@@ -381,3 +381,32 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+
https://github.com/sunshaoce updated
https://github.com/llvm/llvm-project/pull/94564
>From 363e29385277c049bc91a86e76ff6f6ae70ceaa9 Mon Sep 17 00:00:00 2001
From: Shao-Ce SUN
Date: Thu, 6 Jun 2024 12:05:33 +0800
Subject: [PATCH 1/2] [RISCV] Add processor definition for Spacemit-K1
---
clang/t
wangpc-pp wrote:
Spacemit K1 is the name of the product/SoC or whatever you call it. The
processor definitions in the RISCV backend are focusing on the CPU core.
For Spacemit K1, its name should be `X60`? I don't know……
https://github.com/llvm/llvm-project/pull/94564
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https://github.com/sunshaoce edited
https://github.com/llvm/llvm-project/pull/94564
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@@ -381,3 +381,32 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+
dtcxzyw wrote:
cc @zengdage
https://github.com/llvm/llvm-project/pull/94564
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https://github.com/dtcxzyw edited
https://github.com/llvm/llvm-project/pull/94564
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llvmbot wrote:
@llvm/pr-subscribers-backend-risc-v
Author: Shao-Ce SUN (sunshaoce)
Changes
Spacemit-k1 is a new 8-core CPU that supports RVV 1.0, and it is now integrated
into the BPi-F3 development board.
Through [ruapo](https://github.com/nihui/ruapu) detection, this is the march
inf
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Shao-Ce SUN (sunshaoce)
Changes
Spacemit-k1 is a new 8-core CPU that supports RVV 1.0, and it is now integrated
into the BPi-F3 development board.
Through [ruapo](https://github.com/nihui/ruapu) detection, this is the march
information
https://github.com/sunshaoce created
https://github.com/llvm/llvm-project/pull/94564
Spacemit-k1 is a new 8-core CPU that supports RVV 1.0, and it is now integrated
into the BPi-F3 development board.
Through [ruapo](https://github.com/nihui/ruapu) detection, this is the march
information of
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