[clang] [clang][RISCV] Bump RVV intrinsic to version 1.0 (PR #116597)

4vtomat wrote: > Considering the define is guarded behind `if > (ISAInfo->hasExtension("zve32x"))`, this doesn't seem to implement: > [riscv-non-isa/rvv-intrinsic-doc#382](https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/382) I'll post another patch for this, thanks! https://github.com

[clang] [clang][RISCV] Bump RVV intrinsic to version 1.0 (PR #116597)

https://github.com/4vtomat closed https://github.com/llvm/llvm-project/pull/116597 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][RISCV] Bump RVV intrinsic to version 1.0 (PR #116597)

camel-cdr wrote: > Presumably that (rather terse) sentence in the specification is that even, > say, RV64GC can check the macro and include riscv_vector.h, so that it can > then do `__attribute__((__target__(...)))` and use it in certain functions? Yes, thats the idea, otherwise it would be im

[clang] [clang][RISCV] Bump RVV intrinsic to version 1.0 (PR #116597)

topperc wrote: > > Considering the define is guarded behind `if > > (ISAInfo->hasExtension("zve32x"))`, this doesn't seem to implement: > > [riscv-non-isa/rvv-intrinsic-doc#382](https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/382) > > Presumably that (rather terse) sentence in the spec

[clang] [clang][RISCV] Bump RVV intrinsic to version 1.0 (PR #116597)

jrtc27 wrote: > Considering the define is guarded behind `if > (ISAInfo->hasExtension("zve32x"))`, this doesn't seem to implement: > [riscv-non-isa/rvv-intrinsic-doc#382](https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/382) Presumably that (rather terse) sentence in the specification i

[clang] [clang][RISCV] Bump RVV intrinsic to version 1.0 (PR #116597)

camel-cdr wrote: Considering the define is guarded behind `if (ISAInfo->hasExtension("zve32x"))`, this doesn't seem to implement: https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/382 https://github.com/llvm/llvm-project/pull/116597 ___ cfe-com

[clang] [clang][RISCV] Bump RVV intrinsic to version 1.0 (PR #116597)

https://github.com/4vtomat updated https://github.com/llvm/llvm-project/pull/116597 >From 5addb1d33fc195b084a4869217d763abb1eef1af Mon Sep 17 00:00:00 2001 From: Brandon Wu Date: Mon, 18 Nov 2024 02:02:34 -0800 Subject: [PATCH 1/2] [clang][RISCV] Bump RVV intrinsic to version 1.0 The spec: ht

[clang] [clang][RISCV] Bump RVV intrinsic to version 1.0 (PR #116597)

https://github.com/topperc approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/116597 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][RISCV] Bump RVV intrinsic to version 1.0 (PR #116597)

4vtomat wrote: > Add ReleaseNote to Clang? Updated! https://github.com/llvm/llvm-project/pull/116597 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][RISCV] Bump RVV intrinsic to version 1.0 (PR #116597)

https://github.com/wangpc-pp commented: Add ReleaseNote to Clang? https://github.com/llvm/llvm-project/pull/116597 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][RISCV] Bump RVV intrinsic to version 1.0 (PR #116597)

llvmbot wrote: @llvm/pr-subscribers-backend-risc-v @llvm/pr-subscribers-clang Author: Brandon Wu (4vtomat) Changes The spec: https://github.com/riscv-non-isa/rvv-intrinsic-doc/releases/tag/v1.0.0-rc4 Also remove __riscv_v_intrinsic_overloading since it's no longer in spec, the overloading

[clang] [clang][RISCV] Bump RVV intrinsic to version 1.0 (PR #116597)

https://github.com/4vtomat created https://github.com/llvm/llvm-project/pull/116597 The spec: https://github.com/riscv-non-isa/rvv-intrinsic-doc/releases/tag/v1.0.0-rc4 Also remove __riscv_v_intrinsic_overloading since it's no longer in spec, the overloading intrinsics should be also enabled wh