This revision was automatically updated to reflect the committed changes.
Closed by commit rGa46e7d7a5f60: [AMDGPU] Allow AGPR in inline asm (authored by
yaxunl).
Herald added a project: clang.
Changed prior to commit:
https://reviews.llvm.org/D77329?vs=254668&id=254772#toc
Repository:
rG LL
yaxunl updated this revision to Diff 254668.
yaxunl added a comment.
fix test
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D77329/new/
https://reviews.llvm.org/D77329
Files:
clang/lib/Basic/Targets/AMDGPU.cpp
clang/lib/Basic/Targets/AMDGPU.h
clang/test/CodeGenOpenCL/inline-asm-am
rampitec added inline comments.
Comment at: clang/test/CodeGenOpenCL/inline-asm-amdgcn.cl:16
+ float reg_b;
+ float reg_c;
+ // CHECK: call <32 x float> asm "v_mfma_f32_32x32x1f32 $0, $1, $2, $3",
"=a,v,v,a,~{a0},~{a1},~{a2},~{a3},~{a4},~{a5},~{a6},~{a7},~{a8},~{a9},~{a10},~
yaxunl updated this revision to Diff 254619.
yaxunl added a comment.
added agprs to GCCRegNames and fixed types in test
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D77329/new/
https://reviews.llvm.org/D77329
Files:
clang/lib/Basic/Targets/AMDGPU.cpp
clang/lib/Basic/Targets/AMDGPU.
rampitec accepted this revision.
rampitec added a comment.
This revision is now accepted and ready to land.
Thanks.
Could you also update AMDGPUTargetInfo::GCCRegNames[] (in a separate change)?
It is used in clobber constraints.
JBTW, it does not support register tuples even for V and S now.
C
arsenm added inline comments.
Comment at: clang/test/CodeGenOpenCL/inline-asm-amdgcn.cl:11-14
+ float acc_c;
+ float reg_a;
+ float reg_b;
+ float reg_c;
These mostly aren't the right types?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D77329/new/
yaxunl created this revision.
yaxunl added reviewers: rampitec, arsenm.
Herald added subscribers: kerbowa, t-tye, tpr, dstuttard, nhaehnle, wdng,
jvesely, kzhuravl.
rampitec accepted this revision.
rampitec added a comment.
This revision is now accepted and ready to land.
Thanks.
Could you also
