[PATCH] D121586: [Clang][VE] Add the rest of intrinsics to clang

2022-03-16 Thread Simon Moll via Phabricator via cfe-commits
simoll added a comment. @kaz7 With rG0aab34410403 in tree you should be able to enable the masked intrinsics now. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D121586/new/ http

[PATCH] D121586: [Clang][VE] Add the rest of intrinsics to clang

2022-03-14 Thread Kazushi Marukawa via Phabricator via cfe-commits
kaz7 added inline comments. Comment at: clang/include/clang/Basic/BuiltinsVEVL.gen.def:35 +// TODO: Vector mask registers +// Depend on https://reviews.llvm.org/D88905 +// BUILTIN(__builtin_ve_vl_vst_vssml, "vV256dLUiv*V256bUi", "n") xbolva00 wrote: > Why leave d

[PATCH] D121586: [Clang][VE] Add the rest of intrinsics to clang

2022-03-14 Thread Dávid Bolvanský via Phabricator via cfe-commits
xbolva00 added inline comments. Comment at: clang/include/clang/Basic/BuiltinsVEVL.gen.def:35 +// TODO: Vector mask registers +// Depend on https://reviews.llvm.org/D88905 +// BUILTIN(__builtin_ve_vl_vst_vssml, "vV256dLUiv*V256bUi", "n") Why leave dead code under

[PATCH] D121586: [Clang][VE] Add the rest of intrinsics to clang

2022-03-14 Thread Simon Moll via Phabricator via cfe-commits
simoll accepted this revision. simoll added a comment. This revision is now accepted and ready to land. Thx Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D121586/new/ https://reviews.llvm.org/D121586 ___

[PATCH] D121586: [Clang][VE] Add the rest of intrinsics to clang

2022-03-14 Thread Kazushi Marukawa via Phabricator via cfe-commits
kaz7 added inline comments. Comment at: clang/include/clang/Basic/BuiltinsVEVL.gen.def:1242 +#if 0 +BUILTIN(__builtin_ve_vl_andm_mmm, "V256bV256bV256b", "n") +BUILTIN(__builtin_ve_vl_andm_MMM, "V512bV512bV512b", "n") simoll wrote: > Could you comment at the top o

[PATCH] D121586: [Clang][VE] Add the rest of intrinsics to clang

2022-03-14 Thread Simon Moll via Phabricator via cfe-commits
simoll added inline comments. Comment at: clang/include/clang/Basic/BuiltinsVEVL.gen.def:1242 +#if 0 +BUILTIN(__builtin_ve_vl_andm_mmm, "V256bV256bV256b", "n") +BUILTIN(__builtin_ve_vl_andm_MMM, "V512bV512bV512b", "n") Could you comment at the top of this file (i