[PATCH] D112986: [Clang][RISCV] Restrict rvv builtin-s with zve macro-s

2022-01-21 Thread Fraser Cormack via Phabricator via cfe-commits
frasercrmck added a comment. LGTM too. Though the commit title and message has hyphens in places I wouldn't expect them. `macros` and `builtins` is fine. Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:797 // Init RISC-V extensions for (const auto &T : OutInTypes) {

[PATCH] D112986: [Clang][RISCV] Restrict rvv builtin-s with zve macro-s

2022-01-21 Thread Craig Topper via Phabricator via cfe-commits
craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112986/new/ https://reviews.llvm.org/D112986 ___

[PATCH] D112986: [Clang][RISCV] Restrict rvv builtin-s with zve macro-s

2022-01-21 Thread Yueh-Ting Chen via Phabricator via cfe-commits
eopXD updated this revision to Diff 402036. eopXD marked an inline comment as done. eopXD added a comment. Cleanup unused enum. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112986/new/ https://reviews.llvm.org/D112986 Files: clang/utils/TableGe

[PATCH] D112986: [Clang][RISCV] Restrict rvv builtin-s with zve macro-s

2022-01-21 Thread Craig Topper via Phabricator via cfe-commits
craig.topper added inline comments. Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:144 Basic = 0, F = 1 << 1, D = 1 << 2, Drop F and D here? Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:1319 ListSeparator LS(" && "); - if

[PATCH] D112986: [Clang][RISCV] Restrict rvv builtin-s with zve macro-s

2022-01-20 Thread Yueh-Ting Chen via Phabricator via cfe-commits
eopXD updated this revision to Diff 401870. eopXD added a comment. Follow clang-format. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112986/new/ https://reviews.llvm.org/D112986 Files: clang/utils/TableGen/RISCVVEmitter.cpp Index: clang/utils/

[PATCH] D112986: [Clang][RISCV] Restrict rvv builtin-s with zve macro-s

2022-01-20 Thread Yueh-Ting Chen via Phabricator via cfe-commits
eopXD added inline comments. Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:149 RV64 = 1 << 5, + VectorMaxELen32 = 1 << 6, + VectorMaxELen64 = 1 << 7, craig.topper wrote: > Do we need VectorMaxELen32 isn't that the minimum? Yes you are correct. We don't

[PATCH] D112986: [Clang][RISCV] Restrict rvv builtin-s with zve macro-s

2022-01-20 Thread Yueh-Ting Chen via Phabricator via cfe-commits
eopXD updated this revision to Diff 401862. eopXD marked 2 inline comments as done. eopXD added a comment. Rebase and addres comments. Resolve conflcits due to zvlsseg removal. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112986/new/ https://revie

[PATCH] D112986: [Clang][RISCV] Restrict rvv builtin-s with zve macro-s

2022-01-20 Thread Craig Topper via Phabricator via cfe-commits
craig.topper added inline comments. Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:149 RV64 = 1 << 5, + VectorMaxELen32 = 1 << 6, + VectorMaxELen64 = 1 << 7, Do we need VectorMaxELen32 isn't that the minimum? Comment at: clang/utils/Ta

[PATCH] D112986: [Clang][RISCV] Restrict rvv builtin-s with zve macro-s

2022-01-20 Thread Yueh-Ting Chen via Phabricator via cfe-commits
eopXD updated this revision to Diff 401687. eopXD added a comment. Update code. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112986/new/ https://reviews.llvm.org/D112986 Files: clang/utils/TableGen/RISCVVEmitter.cpp Index: clang/utils/TableGen

[PATCH] D112986: [Clang][RISCV] Restrict rvv builtin-s with zve macro-s

2022-01-20 Thread Yueh-Ting Chen via Phabricator via cfe-commits
eopXD updated this revision to Diff 401684. eopXD added a comment. Update code. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112986/new/ https://reviews.llvm.org/D112986 Files: clang/utils/TableGen/RISCVVEmitter.cpp Index: clang/utils/TableGen