[clang] [llvm] [ConstantRange] Estimate tighter lower (upper) bounds for masked binary and (or) (PR #120352)

@@ -1520,15 +1520,72 @@ ConstantRange ConstantRange::binaryNot() const { return ConstantRange(APInt::getAllOnes(getBitWidth())).sub(*this); } +/// Estimate the 'bit-masked AND' operation's lower bound. +/// +/// E.g., given two ranges as follows (single quotes are separators

[clang] [llvm] [ConstantRange] Estimate tighter lower (upper) bounds for masked binary and (or) (PR #120352)

@@ -1520,15 +1520,72 @@ ConstantRange ConstantRange::binaryNot() const { return ConstantRange(APInt::getAllOnes(getBitWidth())).sub(*this); } +/// Estimate the 'bit-masked AND' operation's lower bound. +/// +/// E.g., given two ranges as follows (single quotes are separators

[clang] [llvm] [ConstantRange] Estimate tighter lower (upper) bounds for masked binary and (or) (PR #120352)

@@ -1520,15 +1520,72 @@ ConstantRange ConstantRange::binaryNot() const { return ConstantRange(APInt::getAllOnes(getBitWidth())).sub(*this); } +/// Estimate the 'bit-masked AND' operation's lower bound. +/// +/// E.g., given two ranges as follows (single quotes are separators

[clang] [llvm] [ConstantRange] Estimate tighter lower (upper) bounds for masked binary and (or) (PR #120352)

@@ -1520,15 +1520,72 @@ ConstantRange ConstantRange::binaryNot() const { return ConstantRange(APInt::getAllOnes(getBitWidth())).sub(*this); } +/// Estimate the 'bit-masked AND' operation's lower bound. +/// +/// E.g., given two ranges as follows (single quotes are separators

[clang] [llvm] [ConstantRange] Estimate tighter lower (upper) bounds for masked binary and (or) (PR #120352)

https://github.com/dtcxzyw approved this pull request. LGTM. Thank you! Please update the PR description and wait for additional approval from other reviewers. https://github.com/llvm/llvm-project/pull/120352 ___ cfe-commits mailing list cfe-commits@

[clang] [llvm] [ConstantRange] Estimate tighter lower (upper) bounds for masked binary and (or) (PR #120352)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/120352 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [ConstantRange] Estimate tighter lower (upper) bounds for masked binary and (or) (PR #120352)

dtcxzyw wrote: > I'm thinking if I need to add a new test mode to test the optimal lower > (upper) bound only for AND (OR). If you cannot make it optimal for all non-wrapped cases, please just add some special cases (e.g., `[7, 14) & [-1, 0) = [7, 14)`) before `TestBinaryOpExhaustive`. htt

[clang] [llvm] [ConstantRange] Estimate tighter lower (upper) bounds for masked binary and (or) (PR #120352)

@@ -1520,15 +1520,101 @@ ConstantRange ConstantRange::binaryNot() const { return ConstantRange(APInt::getAllOnes(getBitWidth())).sub(*this); } +/// Estimate the 'bit-masked AND' operation's lower bound. +/// +/// E.g., given two ranges as follows (single quotes are separator

[clang] [llvm] [ConstantRange] Estimate tighter lower (upper) bounds for masked binary and (or) (PR #120352)

dtcxzyw wrote: > I'd have expected the simplest case to be solved suboptimally with a few > range intersections in ValueTracking, but this seems like a nice extension, > if that's the appropriate direction and compile-time acceptable. This patch increases the compile time by ~0.02%. It should

[clang] [llvm] [ConstantRange] Estimate tighter lower (upper) bounds for masked binary and (or) (PR #120352)

@@ -1520,15 +1520,102 @@ ConstantRange ConstantRange::binaryNot() const { return ConstantRange(APInt::getAllOnes(getBitWidth())).sub(*this); } +/// Estimate the 'bit-masked AND' operation's lower bound. +/// +/// E.g., given two ranges as follows (single quotes are separator

[clang] [llvm] [ConstantRange] Estimate tighter lower (upper) bounds for masked binary and (or) (PR #120352)

https://github.com/dtcxzyw commented: Please give me more time to understand the implementation... https://github.com/llvm/llvm-project/pull/120352 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo

[clang] [llvm] [ConstantRange] Estimate tighter lower (upper) bounds for masked binary and (or) (PR #120352)

@@ -1520,15 +1520,102 @@ ConstantRange ConstantRange::binaryNot() const { return ConstantRange(APInt::getAllOnes(getBitWidth())).sub(*this); } +/// Estimate the 'bit-masked AND' operation's lower bound. +/// +/// E.g., given two ranges as follows (single quotes are separator

[clang] [llvm] [ConstantRange] Estimate tighter lower (upper) bounds for masked binary and (or) (PR #120352)

@@ -1520,15 +1520,102 @@ ConstantRange ConstantRange::binaryNot() const { return ConstantRange(APInt::getAllOnes(getBitWidth())).sub(*this); } +/// Estimate the 'bit-masked AND' operation's lower bound. +/// +/// E.g., given two ranges as follows (single quotes are separator

[clang] [llvm] [ConstantRange] Estimate tighter lower (upper) bounds for masked binary and (or) (PR #120352)

@@ -1520,15 +1520,102 @@ ConstantRange ConstantRange::binaryNot() const { return ConstantRange(APInt::getAllOnes(getBitWidth())).sub(*this); } +/// Estimate the 'bit-masked AND' operation's lower bound. +/// +/// E.g., given two ranges as follows (single quotes are separator

[clang] [llvm] [ConstantRange] Estimate tighter lower (upper) bounds for masked binary and (or) (PR #120352)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/120352 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [ConstantRange] Estimate tighter lower (upper) bounds for masked binary and (or) (PR #120352)

@@ -1520,15 +1520,102 @@ ConstantRange ConstantRange::binaryNot() const { return ConstantRange(APInt::getAllOnes(getBitWidth())).sub(*this); } +/// Estimate the 'bit-masked AND' operation's lower bound. +/// +/// E.g., given two ranges as follows (single quotes are separator

[clang] [llvm] [InstCombine] Infer nuw for gep inbounds from base of object (PR #119225)

dtcxzyw wrote: > huffbench.c:319:10: runtime error: left shift of negative value -93 SUMMARY: UndefinedBehaviorSanitizer: undefined-behavior huffbench.c:319:10 https://github.com/llvm/llvm-project/pull/119225 ___ cfe-commits mailing list cfe-commits@l

[clang] [llvm] [InstCombine] Infer nuw for gep inbounds from base of object (PR #119225)

dtcxzyw wrote: > Seems that this change causes Segment Fault on multiple targets including > aarch64, loongarch64 and riscv64. > > This is detected by a LoongArch > [buildbot](https://lab.llvm.org/staging/#/builders/20/builds/6282) and > manually checked on aarch64 and riscv64 QEMUs. > > I w

[clang] [llvm] [InstCombine] Infer nuw for gep inbounds from base of object (PR #119225)

https://github.com/dtcxzyw approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/119225 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [ConstantFolding] Infer getelementptr nuw flag (PR #119214)

https://github.com/dtcxzyw approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/119214 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [InstCombine] Fold `X Pred C2 ? X BOp C1 : C2 BOp C1` to `min/max(X, C2) BOp C1` (PR #116888)

https://github.com/dtcxzyw approved this pull request. LGTM. Thank you! Please wait for additional approval from other reviewers :) https://github.com/llvm/llvm-project/pull/116888 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.

[clang] [llvm] [InstCombine] Fold `X Pred C2 ? X BOp C1 : C2 BOp C1` to `min/max(X, C2) BOp C1` (PR #116888)

@@ -1898,6 +1882,56 @@ static Instruction *foldSelectICmpEq(SelectInst &SI, ICmpInst *ICI, return nullptr; } +/// Fold `X Pred C2 ? X BOp C1 : C2 BOp C1` to `min/max(X, C2) BOp C1`. +/// This allows for better canonicalization. +static Value *foldSelectWithConstOpToBinOp(IC

[clang] [llvm] [InstCombine] Fold `X Pred C2 ? X BOp C1 : C2 BOp C1` to `min/max(X, C2) BOp C1` (PR #116888)

@@ -1898,6 +1882,56 @@ static Instruction *foldSelectICmpEq(SelectInst &SI, ICmpInst *ICI, return nullptr; } +/// Fold `X Pred C2 ? X BOp C1 : C2 BOp C1` to `min/max(X, C2) BOp C1`. +/// This allows for better canonicalization. +static Value *foldSelectWithConstOpToBinOp(IC

[clang] [llvm] [InstCombine] Fold `X Pred C2 ? X BOp C1 : C2 BOp C1` to `min/max(X, C2) BOp C1` (PR #116888)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/116888 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [InstCombine] Fold `X > C2 ? X + C1 : C2 + C1` to `max(X, C2) + C1` (PR #116888)

@@ -1793,10 +1793,9 @@ define i32 @not_uadd_sat(i32 %x, i32 %y) { define i32 @not_uadd_sat2(i32 %x, i32 %y) { ; CHECK-LABEL: @not_uadd_sat2( -; CHECK-NEXT:[[A:%.*]] = add i32 [[X:%.*]], -2 -; CHECK-NEXT:[[C:%.*]] = icmp ugt i32 [[X]], 1 -; CHECK-NEXT:[[R:%.*]] = se

[clang] [llvm] [InstCombine] Fold `X > C2 ? X + C1 : C2 + C1` to `max(X, C2) + C1` (PR #116888)

@@ -1182,6 +1182,10 @@ SelectPatternResult matchDecomposedSelectPattern( /// minimum/maximum flavor. CmpInst::Predicate getMinMaxPred(SelectPatternFlavor SPF, bool Ordered = false); +/// Convert given `SPF` to equivalent min/max intrinsic. +/// Caller must ensure `SPF` is a m

[clang] [llvm] [InstCombine] Fold `X > C2 ? X + C1 : C2 + C1` to `max(X, C2) + C1` (PR #116888)

@@ -1898,6 +1882,55 @@ static Instruction *foldSelectICmpEq(SelectInst &SI, ICmpInst *ICI, return nullptr; } +// Turn select (Cmp X C1) (BOp X C2) C3 dtcxzyw wrote: ```suggestion /// Turn select (Cmp X C1) (BOp X C2) C3 ``` Use `///` for header comments.

[clang] [llvm] [InstCombine] Fold `X > C2 ? X + C1 : C2 + C1` to `max(X, C2) + C1` (PR #116888)

@@ -1898,6 +1882,55 @@ static Instruction *foldSelectICmpEq(SelectInst &SI, ICmpInst *ICI, return nullptr; } +// Turn select (Cmp X C1) (BOp X C2) C3 +// -> BOp (min/max X C1) C2 +// iff C3 == BOp C1 C2 +// Fold `select` with a const operand to a binary operation. +// Thi

[clang] [llvm] [LoongArch] Support LA V1.1 feature ld-seq-sa that don't generate dbar 0x700. (PR #116762)

@@ -2011,8 +2011,9 @@ const StringMap sys::getHostCPUFeatures() { const StringMap sys::getHostCPUFeatures() { unsigned long hwcap = getauxval(AT_HWCAP); bool HasFPU = hwcap & (1UL << 3); // HWCAP_LOONGARCH_FPU - uint32_t cpucfg2 = 0x2; + const uint32_t cpucfg2 = 0x2, cpuc

[clang] [llvm] [IR] Allow fast math flags on fptrunc and fpext (PR #115894)

@@ -1875,13 +1873,17 @@ Instruction *InstCombinerImpl::visitFPTrunc(FPTruncInst &FPT) { // fptrunc (select Cond, (fpext X), Y --> select Cond, X, (fptrunc Y) Value *NarrowY = Builder.CreateFPTrunc(Y, Ty); Value *Sel = Builder.CreateSelect(Cond, X, NarrowY, "n

[clang] [llvm] [IR] Allow fast math flags on fptrunc and fpext (PR #115894)

@@ -1875,13 +1873,17 @@ Instruction *InstCombinerImpl::visitFPTrunc(FPTruncInst &FPT) { // fptrunc (select Cond, (fpext X), Y --> select Cond, X, (fptrunc Y) Value *NarrowY = Builder.CreateFPTrunc(Y, Ty); Value *Sel = Builder.CreateSelect(Cond, X, NarrowY, "n

[clang] [clang][RISCV] Support `norelax` attribute for RISCV (PR #115981)

dtcxzyw wrote: cc @cyyself https://github.com/llvm/llvm-project/pull/115981 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add Smdbltrp and Ssdbltrp extension (PR #111837)

https://github.com/dtcxzyw closed https://github.com/llvm/llvm-project/pull/111837 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add Smdbltrp and Ssdbltrp extension (PR #111837)

dtcxzyw wrote: @T-Tie Can you fill in the PR description? Then I will merge this patch :) https://github.com/llvm/llvm-project/pull/111837 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-com

[clang] [lldb] [llvm] [APInt] Fix APInt constructions where value does not fit bitwidth (NFCI) (PR #80309)

dtcxzyw wrote: `APInt::getAllOnes` will assert if `BitWidth == 0`. ``` [--] 6 tests from APFloatTest [ RUN ] APFloatTest.MinimumNumber [ OK ] APFloatTest.MinimumNumber (0 ms) [ RUN ] APFloatTest.Float8E8M0FNUValues ADTTests: /home/dtcxzyw/WorkSpace/Projects/compilers/llvm

[clang] [lldb] [llvm] [APInt] Fix APInt constructions where value does not fit bitwidth (NFCI) (PR #80309)

https://github.com/dtcxzyw commented: Middle-end/CodeGen/RISC-V changes LGTM. https://github.com/llvm/llvm-project/pull/80309 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [mlir] [polly] [NFC] Rename `Intrinsic::getDeclaration` to `getOrInsertDeclaration` (PR #111752)

dtcxzyw wrote: > TBH I am wondering if we should revert this rename. I don't think it's a good > idea to reuse getDeclaration with substantially different semantics, and if > we're not reusing it, then there's not much point to rename... > > Instead of having getOrInsertDeclaration + getDeclar

[clang] [llvm] [RISCV] Add Smdbltrp and Ssdbltrp extension (PR #111837)

dtcxzyw wrote: > Failed Tests (2): Clang :: Driver/print-supported-extensions-riscv.c Clang :: Preprocessor/riscv-target-features.c https://github.com/llvm/llvm-project/pull/111837 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lis

[clang] [llvm] [RISCV] Add Smdbltrp and Ssdbltrp extension (PR #111837)

dtcxzyw wrote: > > > > Personally I don't like to add a privileged extension if it doesn't > > > > introduce new CSRs/instructions. > > > > > > > > > I'd actually put that on the > > > [agenda](https://docs.google.com/document/d/1G3ocHm2zE6AYTS2N3_3w2UxFnSEyKkcF57siLWe-NVs/edit?tab=t.0) > > >

[clang] [llvm] [RISCV] Add Smdbltrp and Ssdbltrp extension (PR #111837)

https://github.com/dtcxzyw commented: Personally I don't like to add a privileged extension if it doesn't introduce new CSRs/instructions. https://github.com/llvm/llvm-project/pull/111837 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https:

[clang] [llvm] [InstCombine] Infer nusw + nneg -> nuw for getelementptr (PR #111144)

@@ -3096,6 +3096,15 @@ Instruction *InstCombinerImpl::visitGetElementPtrInst(GetElementPtrInst &GEP) { } } + // nusw + nneg -> nuw + if (GEP.hasNoUnsignedSignedWrap() && !GEP.hasNoUnsignedWrap() && + all_of(GEP.indices(), [&](Value *Idx) { +return isKnown

[clang] [compiler-rt] [UBSan] Diagnose assumption violation (PR #104741)

dtcxzyw wrote: > -fsanitize=address,fuzzer I think it is not related to this patch. It only works with `-fsanitize=builtin` or `-fsanitize=undefined`. https://github.com/llvm/llvm-project/pull/104741 ___ cfe-commits mailing list cfe-commits@lists.ll

[clang] [compiler-rt] [UBSan] Diagnose assumption violation (PR #104741)

https://github.com/dtcxzyw closed https://github.com/llvm/llvm-project/pull/104741 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [compiler-rt] [UBSan] Diagnose assumption violation (PR #104741)

https://github.com/dtcxzyw updated https://github.com/llvm/llvm-project/pull/104741 >From fdadb0fdc2288b18d4dfe4f4510d057a7552ee39 Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Mon, 19 Aug 2024 15:22:39 +0800 Subject: [PATCH 1/4] [UBSan] Diagnose assumption violation --- clang/lib/CodeGe

[clang] [compiler-rt] [UBSan] Diagnose assumption violation (PR #104741)

https://github.com/dtcxzyw updated https://github.com/llvm/llvm-project/pull/104741 >From fdadb0fdc2288b18d4dfe4f4510d057a7552ee39 Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Mon, 19 Aug 2024 15:22:39 +0800 Subject: [PATCH 1/3] [UBSan] Diagnose assumption violation --- clang/lib/CodeGe

[clang] [compiler-rt] [Clang][compiler-rt][UBSan] Improve `__ubsan_handle_invalid_builtin` (PR #109088)

https://github.com/dtcxzyw closed https://github.com/llvm/llvm-project/pull/109088 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [lldb] [llvm] [mlir] [APInt] Fix APInt constructions where value does not fit bitwidth (NFCI) (PR #80309)

dtcxzyw wrote: https://github.com/llvm/llvm-project/blob/62f737f7409b5d2b33c746158c62f14e5bb78aed/llvm/lib/Transforms/Utils/SimplifyCFG.cpp#L6516 We should allow truncations here. ``` ; bin/opt -passes='simplifycfg' reduced.ll -S target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:6

[clang] [RISCV] Implement validateGlobalRegisterVariable. (PR #109596)

@@ -486,3 +486,15 @@ bool RISCVTargetInfo::validateCpuSupports(StringRef Feature) const { bool RISCVTargetInfo::isValidFeatureName(StringRef Name) const { return llvm::RISCVISAInfo::isSupportedExtensionFeature(Name); } + +bool RISCVTargetInfo::validateGlobalRegisterVariable(

[clang] [RISCV] Implement validateGlobalRegisterVariable. (PR #109596)

https://github.com/dtcxzyw approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/109596 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [RISCV] Implement validateGlobalRegisterVariable. (PR #109596)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/109596 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [Loads] Check context instruction for context-sensitive derefability (PR #109277)

https://github.com/dtcxzyw approved this pull request. Nice catch! https://github.com/llvm/llvm-project/pull/109277 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [CVP] Infer range return attribute (PR #99620)

https://github.com/dtcxzyw approved this pull request. LGTM. Thank you! https://github.com/llvm/llvm-project/pull/99620 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [CVP] Infer range return attribute (PR #99620)

dtcxzyw wrote: Missing fold: https://alive2.llvm.org/ce/z/2rmc3h See https://github.com/dtcxzyw/llvm-opt-benchmark/pull/1342#discussion_r1767033125 https://github.com/llvm/llvm-project/pull/99620 ___ cfe-commits mailing list cfe-commits@lists.llvm.or

[clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)

https://github.com/dtcxzyw requested changes to this pull request. Reproducer: ``` ; bin/opt -passes=inline reduced.ll -S target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" define i64 @caller(ptr %p1,

[clang] [compiler-rt] [Clang][compiler-rt][UBSan] Remove `BuiltinCheckKind` (PR #109088)

https://github.com/dtcxzyw created https://github.com/llvm/llvm-project/pull/109088 This patch removes unneeded enum `BuiltinCheckKind` and fixes a copy-paste mistake in `__ubsan_handle_invalid_builtin`. Address comment https://github.com/llvm/llvm-project/pull/104741#discussion_r1764323722.

[clang] [llvm] [RISCV] Add Syntacore SCR7 processor definition (PR #108406)

https://github.com/dtcxzyw approved this pull request. LG https://github.com/llvm/llvm-project/pull/108406 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add Syntacore SCR7 processor definition (PR #108406)

@@ -502,3 +502,28 @@ // RUN: %clang --target=riscv64 -### -c %s 2>&1 -mtune=syntacore-scr5-rv64 | FileCheck -check-prefix=MTUNE-SYNTACORE-SCR5-RV64 %s // MTUNE-SYNTACORE-SCR5-RV64: "-tune-cpu" "syntacore-scr5-rv64" + +// RUN: %clang --target=riscv64 -### -c %s 2>&1 -mcpu=synt

[clang] [FMV][Clang][CodeGen] Resolves corresponding callee for multi-versioning callers (PR #107822)

https://github.com/dtcxzyw created https://github.com/llvm/llvm-project/pull/107822 Closes #94949. >From 110eea45aaaca6508f41032641a083df1c43092f Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Mon, 9 Sep 2024 15:53:05 +0800 Subject: [PATCH 1/2] [FMV][Clang][CodeGen] Add pre-commit tests.

[clang] [compiler-rt] [UBSan] Diagnose assumption violation (PR #104741)

dtcxzyw wrote: Ping. https://github.com/llvm/llvm-project/pull/104741 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][CodeGen] Don't emit assumptions if current block is unreachable. (PR #106936)

dtcxzyw wrote: /cherry-pick c94bd96c277e0b48e198fdc831bb576d9a04aced https://github.com/llvm/llvm-project/pull/106936 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][CodeGen] Don't emit assumptions if current block is unreachable. (PR #106936)

https://github.com/dtcxzyw milestoned https://github.com/llvm/llvm-project/pull/106936 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][CodeGen] Don't emit assumptions if current block is unreachable. (PR #106936)

https://github.com/dtcxzyw closed https://github.com/llvm/llvm-project/pull/106936 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][CodeGen] Fix type for atomic float incdec operators (PR #107075)

dtcxzyw wrote: /cherry-pick 9fef09fd2918e7d8c357b98a9a798fe207941f73 https://github.com/llvm/llvm-project/pull/107075 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][CodeGen] Fix type for atomic float incdec operators (PR #107075)

https://github.com/dtcxzyw milestoned https://github.com/llvm/llvm-project/pull/107075 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][CodeGen] Fix type for atomic float incdec operators (PR #107075)

https://github.com/dtcxzyw closed https://github.com/llvm/llvm-project/pull/107075 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [ValueLattice][SCCP] Do not track undefs (PR #107105)

https://github.com/dtcxzyw commented: Crash reproducer: ``` ; bin/opt -passes=sccp reduced.ll -S define void @debug_send_line1() { %1 = load ptr, ptr null, align 8 %2 = load ptr, ptr %1, align 8 call void %2() ret void } define void @debug_send_line2() { %1 = load ptr, ptr undef, alig

[clang] [Clang][CodeGen] Fix type for atomic float incdec operators (PR #107075)

dtcxzyw wrote: cc @Krishna-13-cyber https://github.com/llvm/llvm-project/pull/107075 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][CodeGen] Fix type for atomic float incdec operators (PR #107075)

https://github.com/dtcxzyw created https://github.com/llvm/llvm-project/pull/107075 `llvm::ConstantFP::get(llvm::LLVMContext&, APFloat(float))` always returns a f32 constant. Fix https://github.com/llvm/llvm-project/issues/107054. >From eb403d3195cda22ca53411b2a12f259ad557f820 Mon Sep 17 00:0

[clang] [Clang][CodeGen] Don't emit assumptions if current block is unreachable. (PR #106936)

https://github.com/dtcxzyw created https://github.com/llvm/llvm-project/pull/106936 Fixes https://github.com/llvm/llvm-project/issues/106898. When emitting an infinite loop, clang codegen will delete the whole block and leave builder's current block as nullptr: https://github.com/llvm/llvm-pro

[clang] [llvm] [SCCP] Infer return attributes in SCCP as well (PR #106732)

dtcxzyw wrote: > This causes some compile-time regression on lencod with LTO > (https://llvm-compile-time-tracker.com/compare.php?from=eaf87d32754beb5bec10bab517bf56e25575b48e&to=b03af0f9bc4e83de8ed78b55b1e0fc0abb9af24e&stat=instructions%3Au). > I've seen a similar regression when testing a sim

[clang] [llvm] [SCCP] Infer return attributes in SCCP as well (PR #106732)

@@ -277,34 +277,12 @@ static bool runIPSCCP( // whether other functions are optimizable. SmallVector ReturnsToZap; + Solver.inferReturnAttributes(); for (const auto &I : Solver.getTrackedRetVals()) { Function *F = I.first; const ValueLatticeElement &ReturnVal

[clang] [llvm] [SCCP] Infer return attributes in SCCP as well (PR #106732)

@@ -354,6 +354,36 @@ bool SCCPSolver::removeNonFeasibleEdges(BasicBlock *BB, DomTreeUpdater &DTU, return true; } +void SCCPSolver::inferReturnAttributes() const { + for (const auto &I : getTrackedRetVals()) { +Function *F = I.first; +const ValueLatticeElement &Retu

[clang] [llvm] [SCCP] Infer return attributes in SCCP as well (PR #106732)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/106732 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [SCCP] Infer return attributes in SCCP as well (PR #106732)

https://github.com/dtcxzyw approved this pull request. LG. After this patch, some redundant null checks/error handlings are eliminated :) https://github.com/llvm/llvm-project/pull/106732 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https:/

[clang] [Clang][RISCV] Recognize unsupport target feature by supporting isValidFeatureName (PR #106495)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/106495 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][RISCV] Recognize unsupport target feature by supporting isValidFeatureName (PR #106495)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/106495 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][RISCV] Fix typo of vector crypto in SemaRISCV.cpp. NFC (PR #106485)

https://github.com/dtcxzyw approved this pull request. Nice catch! https://github.com/llvm/llvm-project/pull/106485 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [compiler-rt] [UBSan] Diagnose assumption violation (PR #104741)

dtcxzyw wrote: Ping. https://github.com/llvm/llvm-project/pull/104741 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [ValueTracking] use KnownBits to compute fpclass from bitcast (PR #97762)

dtcxzyw wrote: Please update these failed tests: > Failed Tests (2): LLVM :: CodeGen/AMDGPU/anyext.ll LLVM :: CodeGen/AMDGPU/fneg-modifier-casting.ll https://github.com/llvm/llvm-project/pull/97762 ___ cfe-commits mailing list cfe-commits@lists.l

[clang] [llvm] [ValueTracking] use KnownBits to compute fpclass from bitcast (PR #97762)

@@ -5921,6 +5921,63 @@ void computeKnownFPClass(const Value *V, const APInt &DemandedElts, break; } + case Instruction::BitCast: { +const Value *Src; +if (!match(Op, m_ElementWiseBitCast(m_Value(Src))) || +!Src->getType()->isIntOrIntVectorTy()) + b

[clang] [llvm] [ValueTracking] use KnownBits to compute fpclass from bitcast (PR #97762)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/97762 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [ValueTracking] use KnownBits to compute fpclass from bitcast (PR #97762)

@@ -5921,6 +5921,63 @@ void computeKnownFPClass(const Value *V, const APInt &DemandedElts, break; } + case Instruction::BitCast: { +const Value *Src; +if (!match(Op, m_ElementWiseBitCast(m_Value(Src))) || +!Src->getType()->isIntOrIntVectorTy()) + b

[clang] [llvm] [ValueTracking] use KnownBits to compute fpclass from bitcast (PR #97762)

https://github.com/dtcxzyw approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/97762 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [ValueTracking] use KnownBits to compute fpclass from bitcast (PR #97762)

dtcxzyw wrote: Reverse ping :) https://github.com/llvm/llvm-project/pull/97762 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Remove experimental for Ssqosid ext (PR #105476)

https://github.com/dtcxzyw approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/105476 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add CSRs and an instruction for Smctr and Ssctr extensions. (PR #105148)

https://github.com/dtcxzyw approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/105148 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add CSRs and an instruction for Smctr and Ssctr extensions. (PR #105148)

@@ -1054,6 +1054,19 @@ def FeatureStdExtSupm : RISCVExperimentalExtension<"supm", 1, 0, "'Supm' (Indicates User-mode Pointer Masking)">; +def FeatureStdExtSmctr +: RISCVExperimentalExtension<"smctr", 1, 0, +

[clang] [llvm] [RISCV] Add CSRs and an instruction for Smctr and Ssctr extensions. (PR #105148)

@@ -839,6 +839,14 @@ def HLV_D : HLoad_r<0b0110110, 0b0, "hlv.d">, Sched<[]>; def HSV_D : HStore_rr<0b0110111, "hsv.d">, Sched<[]>; } +let Predicates = [HasStdExtSmctrOrSsctr] in { +def SCTRCLR : Priv<"sctrclr", 0b0001000>, Sched<[]> { dtcxzyw wrote:

[clang] [llvm] [RISCV] Add CSRs and an instruction for Smctr and Ssctr extensions. (PR #105148)

@@ -1054,6 +1054,19 @@ def FeatureStdExtSupm : RISCVExperimentalExtension<"supm", 1, 0, "'Supm' (Indicates User-mode Pointer Masking)">; +def FeatureStdExtSmctr +: RISCVExperimentalExtension<"smctr", 1, 0, +

[clang] [compiler-rt] [UBSan] Diagnose assumption violation (PR #104741)

https://github.com/dtcxzyw created https://github.com/llvm/llvm-project/pull/104741 This patch extends [D34590](https://reviews.llvm.org/D34590) to check assumption violations. >From e2ce302a0d3649594ff1a6b94420f815d0e1acde Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Mon, 19 Aug 2024

[clang] [llvm] [RISCV][MC] Support experimental extensions Zvbc32e and Zvkgs (PR #103709)

https://github.com/dtcxzyw approved this pull request. https://github.com/llvm/llvm-project/pull/103709 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV][MC] Support experimental extensions Zvbc32e and Zvkgs (PR #103709)

@@ -150,6 +150,14 @@ let Predicates = [HasStdExtZvkg], RVVConstraint = NoConstraint in { SchedBinaryMC<"WriteVGMULV", "ReadVGMULV", "ReadVGMULV">; } // Predicates = [HasStdExtZvkg] +let Predicates = [HasStdExtZvkgs], RVVConstraint = NoConstraint in {

[clang] [llvm] [RISCV][MC] Support experimental extensions Zvbc32e and Zvkgs (PR #103709)

@@ -302,6 +302,9 @@ The primary goal of experimental support is to assist in the process of ratifica ``experimental-zicfilp``, ``experimental-zicfiss`` LLVM implements the `1.0 release specification `__. +``experimental

[clang] [llvm] [RISCV] Add NutShell RV32/64 processors definition (PR #102899)

https://github.com/dtcxzyw requested changes to this pull request. After consulting with NutShell's maintainer @poemonsense, I think this PR should be rejected for the following reasons: 1. There are no commercial plans for this educational processor. 2. This project is no longer maintained. h

[clang] [llvm] [RISCV] Add Hazard3 CPU (PR #102452)

dtcxzyw wrote: It looks like a toy project :( The RTL design is not frozen. https://github.com/llvm/llvm-project/pull/102452 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add Syntacore SCR5 RV32/64 processors definition (PR #102285)

@@ -378,6 +378,32 @@ def SYNTACORE_SCR4_RV64 : RISCVProcessorModel<"syntacore-scr4-rv64", FeatureStdExtC], [TuneNoDefaultUnroll, FeaturePostRAScheduler]>; +def SYNTACORE_SCR5_RV32 :

[clang] [llvm] [RISCV] Add sifive-p470 processor (PR #102022)

https://github.com/dtcxzyw approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/102022 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add sifive-p470 processor (PR #102022)

@@ -266,11 +272,47 @@ def SIFIVE_P450 : RISCVProcessorModel<"sifive-p450", SiFiveP400Model, FeatureStdExtZfhmin, FeatureUnalignedScalarMem, FeatureUnalignedVect

[clang] [Clang][CodeGen] Add metadata for load from reference (PR #98746)

dtcxzyw wrote: Compile-time impact: http://llvm-compile-time-tracker.com/compare.php?from=f0fad9f3e00dbe8e58024d1c98e36b7b9b1b17a9&to=f01369d38b67364b5c35bf87984f813a53ce18d1&stat=instructions%3Au https://github.com/llvm/llvm-project/pull/98746 ___ cf

[clang] [Clang][CodeGen] Add metadata for load from reference (PR #98746)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/98746 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

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