@@ -1100,14 +1112,32 @@ bool IndVarSimplify::sinkUnusedInvariants(Loop *L) {
break;
// Don't move instructions which might have side effects, since the side
-// effects need to complete before instructions inside the loop. Also
don't
-// move instructions w
@@ -30,3 +30,64 @@ loop:
exit:
ret i32 %add
}
+
srpande wrote:
Please add at least one (two is better) test with noalias & alias_info metadata
for loads and stores; and show whether load will sink or not depending on
metadata.
I would also write these tes
https://github.com/srpande approved this pull request.
lgtm
https://github.com/llvm/llvm-project/pull/117053
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https://github.com/srpande approved this pull request.
It's a good change.
https://github.com/llvm/llvm-project/pull/86707
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https://github.com/srpande approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/86313
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@@ -18533,51 +18533,35 @@ Value
*CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID,
}
case AMDGPU::BI__builtin_amdgcn_global_load_tr_b64_i32:
case AMDGPU::BI__builtin_amdgcn_global_load_tr_b64_v2i32:
- case AMDGPU::BI__builtin_amdgcn_global_load_tr_b128_v4bf16:
srpande wrote:
There is no issue in changing the names in principle. Curious, what is the
rationale to use more demangled names?
https://github.com/llvm/llvm-project/pull/86313
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https://github.com/srpande edited
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https://github.com/srpande updated
https://github.com/llvm/llvm-project/pull/68367
>From a76a360c1d7fa0860944b6bfcb65ab3405c7b4c6 Mon Sep 17 00:00:00 2001
From: Sirish Pande
Date: Thu, 28 Sep 2023 11:39:32 -0500
Subject: [PATCH 1/2] [AMDGPU] Save/Restore SCC bit across waterfall loop.
Waterfal
https://github.com/srpande updated
https://github.com/llvm/llvm-project/pull/68367
>From a76a360c1d7fa0860944b6bfcb65ab3405c7b4c6 Mon Sep 17 00:00:00 2001
From: Sirish Pande
Date: Thu, 28 Sep 2023 11:39:32 -0500
Subject: [PATCH 1/2] [AMDGPU] Save/Restore SCC bit across waterfall loop.
Waterfal
https://github.com/srpande closed
https://github.com/llvm/llvm-project/pull/66701
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https://github.com/srpande closed
https://github.com/llvm/llvm-project/pull/66701
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>From a9fe01d82743879c41982aa170fef517dee99256 Mon Sep 17 00:00:00 2001
From: Sirish Pande
Date: Fri, 15 Sep 2023 13:01:09 -0500
Subject: [PATCH] [SelectionDAG] Flags are dropped when creating a new FMUL
While s
https://github.com/srpande updated
https://github.com/llvm/llvm-project/pull/66701
>From a9fe01d82743879c41982aa170fef517dee99256 Mon Sep 17 00:00:00 2001
From: Sirish Pande
Date: Fri, 15 Sep 2023 13:01:09 -0500
Subject: [PATCH] [SelectionDAG] Flags are dropped when creating a new FMUL
While s
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