@@ -204,6 +205,10 @@ static cl::opt
EnableLoopInterchange("enable-loopinterchange", cl::init(false),
cl::Hidden,
cl::desc("Enable the LoopInterchange Pass"));
+static cl::opt EnableLoopFusion("enable-loopfusion", cl::init(false),
+
@@ -204,6 +205,10 @@ static cl::opt
EnableLoopInterchange("enable-loopinterchange", cl::init(false),
cl::Hidden,
cl::desc("Enable the LoopInterchange Pass"));
+static cl::opt EnableLoopFusion("enable-loopfusion", cl::init(false),
kasuga-fj wrote:
> What do you think is the right place in pass pipeline?
I don't know, but just a gut feeling, somewhere in
`buildModuleOptimizationPipeline` looks reasonable to me rather than
`buildFunctionSimplificationPipeline`. However, again, it should be determined
by what you'd like t
https://github.com/kasuga-fj edited
https://github.com/llvm/llvm-project/pull/142686
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@@ -518,6 +524,9 @@
PassBuilder::buildO1FunctionSimplificationPipeline(OptimizationLevel Level,
invokeLoopOptimizerEndEPCallbacks(LPM2, Level);
+ if (PTO.LoopFuse)
+FPM.addPass(LoopFusePass());
+
kasuga-fj wrote:
> LoopFusion is a function pass
I do
@@ -32,6 +32,9 @@ page](https://llvm.org/releases/).
## New Compiler Flags
+* -floop-interchange is now recognized by flang.
kasuga-fj wrote:
Seems a mistake while resolving the conflict.
https://github.com/llvm/llvm-project/pull/142686
https://github.com/kasuga-fj commented:
FWIW, using merge instead of rebase might be a better. That way, you might
avoid resolving the same conflicts repeatedly.
https://github.com/llvm/llvm-project/pull/142686
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kasuga-fj wrote:
You probably made a mistake with the rebase...
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@@ -3157,7 +3157,7 @@ void tools::handleVectorizeSLPArgs(const ArgList &Args,
void tools::handleInterchangeLoopsArgs(const ArgList &Args,
ArgStringList &CmdArgs) {
- // FIXME: instead of relying on shouldEnableVectorizerAtOLevel, we may
@@ -518,6 +524,9 @@
PassBuilder::buildO1FunctionSimplificationPipeline(OptimizationLevel Level,
invokeLoopOptimizerEndEPCallbacks(LPM2, Level);
+ if (PTO.LoopFuse)
+FPM.addPass(LoopFusePass());
+
kasuga-fj wrote:
Is this an appropriate place? I think
@@ -2112,7 +2124,6 @@ PassBuilder::buildLTODefaultPipeline(OptimizationLevel
Level,
LPM.addPass(LoopFlattenPass());
LPM.addPass(IndVarSimplifyPass());
LPM.addPass(LoopDeletionPass());
- // FIXME: Add loop interchange.
kasuga-fj wrote:
I don't think t
kasuga-fj wrote:
So, why wouldn't adding a `cl::opt` flag work in the end? In fact, you've added
`enable-loopfuse` flag in this patch. If it's enough, I personally think it
might be better to avoid introducing additional flags unnecessarily.
https://github.com/llvm/llvm-project/pull/142686
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kasuga-fj wrote:
Thanks for the reviews!
https://github.com/llvm/llvm-project/pull/135163
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@@ -643,9 +650,7 @@ void LoopInfoStack::push(BasicBlock *Header,
clang::ASTContext &Ctx,
case LoopHintAttr::Disable:
switch (Option) {
case LoopHintAttr::Vectorize:
-// Disable vectorization by specifying a width of 1.
-setVectorizeWidth(1);
-
@@ -5237,8 +5237,8 @@ width/count of the set of target architectures supported
by your application.
...
}
-Specifying a width/count of 1 disables the optimization, and is equivalent to
-``vectorize(disable)`` or ``interleave(disable)``.
+Specifying a *non-scalable* widt
https://github.com/kasuga-fj updated
https://github.com/llvm/llvm-project/pull/135163
>From 79186af3df57357d40ec3b3e4eaf9da978b31ef6 Mon Sep 17 00:00:00 2001
From: Ryotaro Kasuga
Date: Fri, 4 Apr 2025 12:32:57 +
Subject: [PATCH 1/8] [clang][CodeGen] Fix metadata when vectorization is
disab
https://github.com/kasuga-fj updated
https://github.com/llvm/llvm-project/pull/135163
>From 79186af3df57357d40ec3b3e4eaf9da978b31ef6 Mon Sep 17 00:00:00 2001
From: Ryotaro Kasuga
Date: Fri, 4 Apr 2025 12:32:57 +
Subject: [PATCH 1/7] [clang][CodeGen] Fix metadata when vectorization is
disab
https://github.com/kasuga-fj edited
https://github.com/llvm/llvm-project/pull/135163
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@@ -643,9 +650,7 @@ void LoopInfoStack::push(BasicBlock *Header,
clang::ASTContext &Ctx,
case LoopHintAttr::Disable:
switch (Option) {
case LoopHintAttr::Vectorize:
-// Disable vectorization by specifying a width of 1.
-setVectorizeWidth(1);
-
@@ -5237,8 +5237,8 @@ width/count of the set of target architectures supported
by your application.
...
}
-Specifying a width/count of 1 disables the optimization, and is equivalent to
-``vectorize(disable)`` or ``interleave(disable)``.
kasuga-fj wrote:
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kasuga-fj wrote:
I somehow missed this until now, but it turns out that specifying
`vectorize(disable) vectorize_width(scalable)` causes an error due to
"incompatible directives" (godbolt: https://godbolt.org/z/vv1vKqdTn). I had
been concerned that the ambiguity here might make implementation
kasuga-fj wrote:
As far as I can tell, it doesn't seem like a link to UsersManual is there, but
you can reach both from [the top page](https://clang.llvm.org/docs/index.html).
https://github.com/llvm/llvm-project/pull/147014
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https://github.com/kasuga-fj commented:
It is already documented in [Clang command line argument
reference](https://clang.llvm.org/docs/ClangCommandLineReference.html#cmdoption-clang-floop-interchange)
(perhaps this is automatically generated based on
[`clang/Driver/Options.td`](https://github
kasuga-fj wrote:
Gentle ping
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kasuga-fj wrote:
There is still a correctness issue with LoopInterchange, as I reported in
#140238. This problem is not specific to C/C++. The following code demonstrates
a case where illegal loop-interchange occurs.
```fortran
program main
implicit none
real, save :: A(5, 5)
real,
kasuga-fj wrote:
Ping.
I think there are two possible interpretations of `vectorize(disable)
vectorize_width(scalable)`, as follows:
- It is equivalent to `vectorize(disable)` so vectorization is disabled, as the
document says:
> Pragmas setting transformation options imply the transformati
kasuga-fj wrote:
Printing an error message looks reasonable to me, but I think we first need to
clarify what codes are "unsupported".
https://github.com/llvm/llvm-project/pull/131985
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kasuga-fj wrote:
> For this reason OpenMP 5.1 added new pragma:
>
> ```c
> #pragma omp simd reduction(+:v0)
> #pragma omp unroll partial(4)
> ```
FWIW, I tried it and the following error occurred.
```
:10:1: error: OpenMP constructs may not be nested inside a simd region
except for ordered si
kasuga-fj wrote:
Thanks for sharing. I haven't looked at the details yet, but I simplified it as
follows.
```c
#include
void g(float);
void f(int m) {
#pragma omp parallel
{
float v0 = 0.0;
#pragma omp simd reduction(+:v0)
#pragma unroll(4)
for(int i=0; i < m; i++)
{
v0 +
@@ -5237,8 +5237,8 @@ width/count of the set of target architectures supported
by your application.
...
}
-Specifying a width/count of 1 disables the optimization, and is equivalent to
-``vectorize(disable)`` or ``interleave(disable)``.
kasuga-fj wrote:
kasuga-fj wrote:
> Unfortuantely IIRC there is a semantic difference between pragma and metadata:
>
>- llvm.loop.vectorize.enable==false disables vectorization AND
> interleaving (by switching off the entire LoopVectorize pass which does both
> of thise things)
>- llvm.loop.vectorize.wi
@@ -5237,8 +5237,8 @@ width/count of the set of target architectures supported
by your application.
...
}
-Specifying a width/count of 1 disables the optimization, and is equivalent to
-``vectorize(disable)`` or ``interleave(disable)``.
+Specifying a *non-scalable* widt
@@ -37,8 +37,8 @@ void test3(int *List, int Length) {
List[i] = i * 2;
}
-// Check that disabling vectorization means a vectorization width of 1, and
-// also that vectorization_predicate isn't enabled.
+// Check that vectorize is disabled, and also that vectorization_pred
https://github.com/kasuga-fj updated
https://github.com/llvm/llvm-project/pull/135163
>From 79186af3df57357d40ec3b3e4eaf9da978b31ef6 Mon Sep 17 00:00:00 2001
From: Ryotaro Kasuga
Date: Fri, 4 Apr 2025 12:32:57 +
Subject: [PATCH 1/5] [clang][CodeGen] Fix metadata when vectorization is
disab
https://github.com/kasuga-fj edited
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@@ -194,7 +194,7 @@ void for_test_scalable(int *List, int Length) {
}
}
-// Verify for loop is performing scalable vectorization
+// Verify for loop is NOT performing vectorization because the width is 1
kasuga-fj wrote:
Fixed both code and docs. Thanks.
h
https://github.com/kasuga-fj updated
https://github.com/llvm/llvm-project/pull/135163
>From 79186af3df57357d40ec3b3e4eaf9da978b31ef6 Mon Sep 17 00:00:00 2001
From: Ryotaro Kasuga
Date: Fri, 4 Apr 2025 12:32:57 +
Subject: [PATCH 1/4] [clang][CodeGen] Fix metadata when vectorization is
disab
@@ -194,7 +194,7 @@ void for_test_scalable(int *List, int Length) {
}
}
-// Verify for loop is performing scalable vectorization
+// Verify for loop is NOT performing vectorization because the width is 1
kasuga-fj wrote:
You are right, I misunderstood the c
https://github.com/kasuga-fj closed
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https://github.com/kasuga-fj created
https://github.com/llvm/llvm-project/pull/133707
pragma-loop.cpp contains tests for loop metadata generated via pragma
directives. These tests were not working as (perhaps) expected. This is because
the regex `.*` consumes multiple elements in metadata. For
@@ -44,23 +44,19 @@ MDNode *LoopInfo::createPipeliningMetadata(const
LoopAttributes &Attrs,
else if (Attrs.PipelineInitiationInterval != 0)
Enabled = true;
+ SmallVector Args;
+ Args.append(LoopProperties.begin(), LoopProperties.end());
+
if (Enabled != true) {
-
@@ -44,23 +44,19 @@ MDNode *LoopInfo::createPipeliningMetadata(const
LoopAttributes &Attrs,
else if (Attrs.PipelineInitiationInterval != 0)
Enabled = true;
+ SmallVector Args;
+ Args.append(LoopProperties.begin(), LoopProperties.end());
+
if (Enabled != true) {
-
@@ -44,23 +44,19 @@ MDNode *LoopInfo::createPipeliningMetadata(const
LoopAttributes &Attrs,
else if (Attrs.PipelineInitiationInterval != 0)
Enabled = true;
+ SmallVector Args;
+ Args.append(LoopProperties.begin(), LoopProperties.end());
+
if (Enabled != true) {
-
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>From 63dec28732e6a90f5f3449441fa8472b5b60a9f4 Mon Sep 17 00:00:00 2001
From: Ryotaro Kasuga
Date: Wed, 26 Mar 2025 07:29:18 +
Subject: [PATCH] [clang][CodeGen] Generate follow-up metadata for loops in
co
https://github.com/kasuga-fj commented:
Thanks for your review!
https://github.com/llvm/llvm-project/pull/131985
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@@ -44,23 +44,19 @@ MDNode *LoopInfo::createPipeliningMetadata(const
LoopAttributes &Attrs,
else if (Attrs.PipelineInitiationInterval != 0)
Enabled = true;
+ SmallVector Args;
+ Args.append(LoopProperties.begin(), LoopProperties.end());
+
if (Enabled != true) {
-
@@ -44,23 +44,19 @@ MDNode *LoopInfo::createPipeliningMetadata(const
LoopAttributes &Attrs,
else if (Attrs.PipelineInitiationInterval != 0)
Enabled = true;
+ SmallVector Args;
+ Args.append(LoopProperties.begin(), LoopProperties.end());
+
if (Enabled != true) {
-
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@@ -227,36 +226,26 @@ void for_test_scalable_1(int *List, int Length) {
// CHECK: ![[LOOP_5]] = distinct !{![[LOOP_5]], ![[UNROLL_DISABLE:.*]],
![[DISTRIBUTE_DISABLE:.*]], ![[WIDTH_1:.*]]}
// CHECK: ![[WIDTH_1]] = !{!"llvm.loop.vectorize.width", i32 1}
-// CHECK: ![[LOOP_6]]
@@ -170,11 +161,10 @@ LoopInfo::createUnrollAndJamMetadata(const LoopAttributes
&Attrs,
MDNode::get(Ctx, MDString::get(Ctx,
"llvm.loop.unroll_and_jam.disable")));
bool FollowupHasTransforms = false;
- MDNode *Followup = createPartialUnrollMetadata(Attrs, FollowupLoo
@@ -44,23 +44,19 @@ MDNode *LoopInfo::createPipeliningMetadata(const
LoopAttributes &Attrs,
else if (Attrs.PipelineInitiationInterval != 0)
Enabled = true;
+ SmallVector Args;
+ Args.append(LoopProperties.begin(), LoopProperties.end());
+
if (Enabled != true) {
-
https://github.com/kasuga-fj commented:
> Possibly the `create*Metadata` should only return a list of properties
> instead of an MDNode, with the MDNode only to be created when applying the
> properties to a Loop. However, the easier fix would probably be to extract
> the properties from the
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>From 889f40c5570af8a02e301c2bf3c6382f69210140 Mon Sep 17 00:00:00 2001
From: Ryotaro Kasuga
Date: Mon, 17 Mar 2025 11:24:47 +
Subject: [PATCH 1/3] [LoopUtils] Fix metadata generated by makeFollowupLoopID
kasuga-fj wrote:
Thanks for the comments. I'll try to work on it in the near future.
https://github.com/llvm/llvm-project/pull/125830
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https://github.com/kasuga-fj approved this pull request.
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Previously `#pragma clang loop pipeline` only accepted `disable`. This patch
adds `enable` as a valid argument for this pragma. This allows Software
Pipelining optimization to be applied to some loops instead
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