SixWeining wrote:
> Is there the possibility to set up a buildbot for this architecture?
There is a [buildbot](https://lab.llvm.org/staging/#/builders/20) for
loongarch, but it only run tests for clang and llvm-test-suite.
Do you mean adding a dedicate buildbot for the `offload` sub-project? I
https://github.com/SixWeining closed
https://github.com/llvm/llvm-project/pull/119191
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LGTM
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SixWeining wrote:
Seems that this change causes Segment Fault on multiple targets including
aarch64, loongarch64 and riscv64.
This is detected by a LoongArch
[buildbot](https://lab.llvm.org/staging/#/builders/20/builds/6282) and manually
checked on aarch64 and riscv64 QEMUs.
I wonder why aar
https://github.com/SixWeining approved this pull request.
LGTM for the LoongArch bits.
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@@ -240,7 +240,8 @@ def m_riscv_Features_Group : OptionGroup<"">,
def m_ve_Features_Group : OptionGroup<"">,
Group, DocName<"VE">;
def m_loongarch_Features_Group : OptionGroup<"">,
- Group, DocName<"LoongArch">;
+
@@ -240,7 +240,8 @@ def m_riscv_Features_Group : OptionGroup<"">,
def m_ve_Features_Group : OptionGroup<"">,
Group, DocName<"VE">;
def m_loongarch_Features_Group : OptionGroup<"">,
- Group, DocName<"LoongArch">;
+
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LGTM for the LoongArch bits.
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@@ -1151,6 +1154,317 @@ struct TargetLoongArch64 : public
GenericTarget {
return GenericTarget::integerArgumentType(loc, argTy);
}
+
+ /// Flatten non-basic types, resulting in an array of types containing only
+ /// `IntegerType` and `FloatType`.
+ std::vector flatt
@@ -1151,6 +1154,317 @@ struct TargetLoongArch64 : public
GenericTarget {
return GenericTarget::integerArgumentType(loc, argTy);
}
+
+ /// Flatten non-basic types, resulting in an array of types containing only
+ /// `IntegerType` and `FloatType`.
+ std::vector flatt
@@ -1151,6 +1154,317 @@ struct TargetLoongArch64 : public
GenericTarget {
return GenericTarget::integerArgumentType(loc, argTy);
}
+
+ /// Flatten non-basic types, resulting in an array of types containing only
+ /// `IntegerType` and `FloatType`.
+ std::vector flatt
@@ -1151,6 +1154,317 @@ struct TargetLoongArch64 : public
GenericTarget {
return GenericTarget::integerArgumentType(loc, argTy);
}
+
+ /// Flatten non-basic types, resulting in an array of types containing only
+ /// `IntegerType` and `FloatType`.
+ std::vector flatt
@@ -1151,6 +1154,317 @@ struct TargetLoongArch64 : public
GenericTarget {
return GenericTarget::integerArgumentType(loc, argTy);
}
+
+ /// Flatten non-basic types, resulting in an array of types containing only
+ /// `IntegerType` and `FloatType`.
+ std::vector flatt
@@ -1151,6 +1154,317 @@ struct TargetLoongArch64 : public
GenericTarget {
return GenericTarget::integerArgumentType(loc, argTy);
}
+
+ /// Flatten non-basic types, resulting in an array of types containing only
+ /// `IntegerType` and `FloatType`.
+ std::vector flatt
@@ -1151,6 +1154,317 @@ struct TargetLoongArch64 : public
GenericTarget {
return GenericTarget::integerArgumentType(loc, argTy);
}
+
+ /// Flatten non-basic types, resulting in an array of types containing only
+ /// `IntegerType` and `FloatType`.
+ std::vector flatt
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SixWeining wrote:
Just pick one memory ordering is enough as this test is not sensitive to memory
ordering.
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htt
@@ -807,6 +807,10 @@ def err_drv_loongarch_invalid_simd_option_combination :
Error<
"invalid option combination; LASX depends on LSX">;
def err_drv_loongarch_invalid_msimd_EQ : Error<
"invalid argument '%0' to -msimd=; must be one of: none, lsx, lasx">;
+// Support for oth
@@ -0,0 +1,13 @@
+! RUN: not %flang -### -c --target=loongarch64-unknown-linux -mabi=lp64s %s
2>&1 | FileCheck --check-prefix=INVALID1 %s
+! RUN: not %flang -### -c --target=loongarch64-unknown-linux -mabi=lp64f %s
2>&1 | FileCheck --check-prefix=INVALID2 %s
+! RUN: %flang -###
@@ -0,0 +1,13 @@
+! RUN: not %flang -### -c --target=loongarch64-unknown-linux -mabi=lp64s %s
2>&1 | FileCheck --check-prefix=INVALID1 %s
SixWeining wrote:
Usually `###` is the last option.
```suggestion
! RUN: not %flang -c --target=loongarch64-unknown-linux -m
@@ -0,0 +1,79 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch64 -mattr=+d,-div32 < %s | FileCheck %s
--check-prefix=LA64
+; RUN: llc --mtriple=loongarch64 -mattr=+d,+div32 < %s | FileCheck %s
--check-prefix=LA64-D
@@ -5722,6 +5726,58 @@ bool
LoongArchTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
}
}
+void LoongArchTargetLowering::emitExpandAtomicRMW(AtomicRMWInst *AI) const {
SixWeining wrote:
Please add some comments for this func and add a test (ir -> ir
@@ -118,6 +118,12 @@ def FeatureLAM_BH
"Support amswap[_db].{b/h} and amadd[_db].{b/h}
instructions.">;
def HasLAM_BH : Predicate<"Subtarget->hasLAM_BH()">;
+// Assume div.w[u] and mod.w[u] can handle inputs that are not sign-extended.
+def FeatureDiv3
@@ -0,0 +1,75 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch64 -mattr=+d,-div32 < %s | FileCheck %s
--check-prefix=LA64
+; RUN: llc --mtriple=loongarch64 -mattr=+d,+div32 < %s | FileCheck %s
--check-prefix=LA64-D
@@ -0,0 +1,75 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch64 -mattr=+d,-div32 < %s | FileCheck %s
--check-prefix=LA64
+; RUN: llc --mtriple=loongarch64 -mattr=+d,+div32 < %s | FileCheck %s
--check-prefix=LA64-D
https://github.com/SixWeining commented:
Please remove the changes of #117298.
https://github.com/llvm/llvm-project/pull/116764
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@@ -2011,8 +2011,9 @@ const StringMap sys::getHostCPUFeatures() {
const StringMap sys::getHostCPUFeatures() {
unsigned long hwcap = getauxval(AT_HWCAP);
bool HasFPU = hwcap & (1UL << 3); // HWCAP_LOONGARCH_FPU
- uint32_t cpucfg2 = 0x2;
+ const uint32_t cpucfg2 = 0x2, cpuc
@@ -2011,8 +2011,9 @@ const StringMap sys::getHostCPUFeatures() {
const StringMap sys::getHostCPUFeatures() {
unsigned long hwcap = getauxval(AT_HWCAP);
bool HasFPU = hwcap & (1UL << 3); // HWCAP_LOONGARCH_FPU
- uint32_t cpucfg2 = 0x2;
+ const uint32_t cpucfg2 = 0x2, cpuc
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@@ -2011,8 +2011,9 @@ const StringMap sys::getHostCPUFeatures() {
const StringMap sys::getHostCPUFeatures() {
unsigned long hwcap = getauxval(AT_HWCAP);
bool HasFPU = hwcap & (1UL << 3); // HWCAP_LOONGARCH_FPU
- uint32_t cpucfg2 = 0x2;
+ uint32_t cpucfg2 = 0x2, cpucfg3 =
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LGTM except a nit.
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LGTM. But we can also add this feature in `sys::getHostCPUFeatures` in this PR.
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@@ -100,99 +101,99 @@ define void @cmpxchg_i64_acquire_acquire(ptr %ptr, i64
%cmp, i64 %val) nounwind
}
define void @cmpxchg_i8_acquire_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind
{
SixWeining wrote:
This test doesn't have `LA64` check?
https://github.c
SixWeining wrote:
> the original test is from gcc
>
> ```c++
> int divw(long a, long b) {
> return (int)a / (int)b;
> }
>
> unsigned int divwu(long a, long b) {
> return (unsigned int)a / (unsigned int)b;
> }
>
> int modw(long a, long b) {
> return (int)a % (int)b;
> }
>
> unsigne
@@ -0,0 +1,75 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch64 -mattr=+d,-div32 < %s | FileCheck %s
--check-prefix=LA64
+; RUN: llc --mtriple=loongarch64 -mattr=+d,+div32 < %s | FileCheck %s
--check-prefix=LA64-D
@@ -141,7 +141,8 @@ LoongArchTargetLowering::LoongArchTargetLowering(const
TargetMachine &TM,
setOperationAction(ISD::BITREVERSE, MVT::i32, Custom);
setOperationAction(ISD::BSWAP, MVT::i32, Custom);
-setOperationAction({ISD::UDIV, ISD::UREM}, MVT::i32, Custom);
+
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 -mattr=+d < %s | FileCheck %s
--check-prefix=LA64
+; RUN: llc --mtriple=loongarch64 -mattr=+d,+ld-seq-sa < %s | FileCheck %s
--check-prefix=LA64-LD-SE
SixWeining wrote:
The expectation is at least for this test:
```
define i32 @test(i32 %a, i32 %b) {
%c = udiv i32 %a, %b
ret i32 %c
}
```
### without this feature
```
addi.w $a1, $a1, 0
addi.w $a0, $a0, 0
div.wu $a0, $a0, $a1
ret
```
### with this feature
@@ -118,6 +118,12 @@ def FeatureLAM_BH
"Support amswap[_db].{b/h} and amadd[_db].{b/h}
instructions.">;
def HasLAM_BH : Predicate<"Subtarget->hasLAM_BH()">;
+// Assume div.w[u] and mod.w[u] can handle inputs that are not sign-extended.
+def FeatureDiv3
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https://github.com/SixWeining approved this pull request.
LGTM. Tips: It's not necessary to use force-push to address review comments.
Add new commits and they will be squashed when merge.
https://github.com/llvm/llvm-project/pull/115832
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@@ -14,6 +14,7 @@
#include "clang/Driver/Options.h"
#include "llvm/TargetParser/Host.h"
#include "llvm/TargetParser/LoongArchTargetParser.h"
+#include
SixWeining wrote:
Is this header necessary?
https://github.com/llvm/llvm-project/pull/115832
__
@@ -135,10 +136,15 @@ void loongarch::getLoongArchTargetFeatures(const Driver
&D,
Features.push_back("+lsx");
std::string ArchName;
- if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
-ArchName = A->getValue();
+ const Arg *MArch = Args.getLastArg(options
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@@ -135,8 +135,13 @@ void loongarch::getLoongArchTargetFeatures(const Driver &D,
Features.push_back("+lsx");
std::string ArchName;
- if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
+ if (const Arg *A = Args.getLastArg(options::OPT_march_EQ)) {
ArchName
https://github.com/SixWeining commented:
Could you add the`ual` feature in another PR? Thanks.
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@@ -135,8 +135,13 @@ void loongarch::getLoongArchTargetFeatures(const Driver &D,
Features.push_back("+lsx");
std::string ArchName;
- if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
+ if (const Arg *A = Args.getLastArg(options::OPT_march_EQ)) {
ArchName
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LGTM. Thanks.
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SixWeining wrote:
> > Is it the time to remove the FIXME in those tests?
>
> There are several random inconsistencies and I separated the fixes into
> multiple PRs as suggested by Xuerui. The FIXME is removed in #114513.
Oh, I missed those PRs.
https://github.com/llvm/llvm-project/pull/114511
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https://github.com/SixWeining commented:
Is it the time to remove the FIXME in those tests?
https://github.com/llvm/llvm-project/pull/114511
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LGTM. Thanks.
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@@ -357,7 +357,7 @@ TARGET_BUILTIN(__builtin_lasx_xvmskltz_w, "V8iV8i", "nc",
"lasx")
TARGET_BUILTIN(__builtin_lasx_xvmskltz_d, "V4LLiV4LLi", "nc", "lasx")
TARGET_BUILTIN(__builtin_lasx_xvmskgez_b, "V32ScV32Sc", "nc", "lasx")
-TARGET_BUILTIN(__builtin_lasx_xvmsknz_b, "V16sV16
@@ -357,7 +357,7 @@ TARGET_BUILTIN(__builtin_lasx_xvmskltz_w, "V8iV8i", "nc",
"lasx")
TARGET_BUILTIN(__builtin_lasx_xvmskltz_d, "V4LLiV4LLi", "nc", "lasx")
TARGET_BUILTIN(__builtin_lasx_xvmskgez_b, "V32ScV32Sc", "nc", "lasx")
-TARGET_BUILTIN(__builtin_lasx_xvmsknz_b, "V16sV16
@@ -0,0 +1,6 @@
+// REQUIRES: loongarch-registered-target
+// RUN: %clang_cc1 %s -fsyntax-only -triple loongarch64-linux -target-feature
+lasx
SixWeining wrote:
Add `not` and leave a `FIXME` or `TODO`. Then remove it in next commit.
https://github.com/llvm/llvm
@@ -0,0 +1,6 @@
+// REQUIRES: loongarch-registered-target
+// RUN: %clang_cc1 %s -fsyntax-only -triple loongarch64-linux -target-feature
+lasx
SixWeining wrote:
Should we emphasize linux?
https://github.com/llvm/llvm-project/pull/114509
@@ -0,0 +1,6 @@
+// REQUIRES: loongarch-registered-target
SixWeining wrote:
Seems this is not required.
https://github.com/llvm/llvm-project/pull/114509
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SixWeining wrote:
> Just a heads up, I think this broke documentation builds. After bisecting it
> points to this commit.
Thanks. Fixed by #113632.
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@@ -2088,8 +2088,26 @@ multiclass binary_atomic_op_wd {
(!cast(inst#"__DB_D"#signed) GPR:$rk, GPR:$rj)>;
}
+// Atomic operation for byte and half word
+multiclass binary_atomic_op_bh {
+ def : Pat<(!cast(op#"_i8_monotonic") GPR:$rj, GPR:$rk),
+(!cast(i
@@ -2088,8 +2088,26 @@ multiclass binary_atomic_op_wd {
(!cast(inst#"__DB_D"#signed) GPR:$rk, GPR:$rj)>;
}
+// Atomic operation for byte and half word
+multiclass binary_atomic_op_bh {
+ def : Pat<(!cast(op#"_i8_monotonic") GPR:$rj, GPR:$rk),
+(!cast(i
@@ -0,0 +1,1674 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch32 --mattr=+d,-lam-bh < %s | FileCheck %s
--check-prefix=LA32
+; RUN: llc --mtriple=loongarch32 --mattr=+d,+lam-bh < %s | FileCheck %s
--check-prefix=
@@ -205,7 +205,7 @@ void LoongArchTargetInfo::getTargetDefines(const
LangOptions &Opts,
// TODO: As more features of the V1.1 ISA are supported, a unified "v1.1"
// arch feature set will be used to include all sub-features belonging to
// the V1.1 ISA version
https://github.com/SixWeining closed
https://github.com/llvm/llvm-project/pull/109917
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https://github.com/SixWeining approved this pull request.
https://github.com/llvm/llvm-project/pull/109917
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https://github.com/SixWeining approved this pull request.
LGTM except a nit.
https://github.com/llvm/llvm-project/pull/109917
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@@ -0,0 +1,30 @@
+/// Test -m[no]frecipe options.
+
+// RUN: %clang --target=loongarch64 -mfrecipe -fsyntax-only %s -### 2>&1 | \
+// RUN: FileCheck %s --check-prefix=CC1-FRECIPE
+// RUN: %clang --target=loongarch64 -mno-frecipe -fsyntax-only %s -### 2>&1 | \
+// RUN: File
https://github.com/SixWeining edited
https://github.com/llvm/llvm-project/pull/109917
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SixWeining wrote:
I think that's OK.
https://github.com/llvm/llvm-project/pull/111488
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SixWeining wrote:
> How about now?
The patch doesn't touch lld, so my suggestion is "[Driver] Default enable
LoongArch linker relaxation".
Some additional comments:
- Do we need to consider the `-gsplit-dwarf` issue #56642 resolved by
https://reviews.llvm.org/D130190 ?
- The ``--no-relax`` op
SixWeining wrote:
The title should also be updated.
https://github.com/llvm/llvm-project/pull/111488
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@@ -1462,6 +1462,8 @@ template void
Writer::finalizeAddressDependentContent() {
for (;;) {
bool changed = ctx.target->needsThunks
? tc.createThunks(pass, ctx.outputSections)
+ : ctx.arg.emachine == EM_LOONGARCH && !ctx.arg.relax
@@ -1462,6 +1462,8 @@ template void
Writer::finalizeAddressDependentContent() {
for (;;) {
bool changed = ctx.target->needsThunks
? tc.createThunks(pass, ctx.outputSections)
+ : ctx.arg.emachine == EM_LOONGARCH && !ctx.arg.relax
@@ -5340,6 +5340,10 @@ def mno_lasx : Flag<["-"], "mno-lasx">,
Group,
def msimd_EQ : Joined<["-"], "msimd=">, Group,
Flags<[TargetSpecific]>,
HelpText<"Select the SIMD extension(s) to be enabled in LoongArch either
'none', 'lsx', 'lasx'.">;
+def mannotate_tablejump : Flag
https://github.com/SixWeining commented:
Better to add gcc's links to commit message to let people know the background.
https://github.com/llvm/llvm-project/pull/102411
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