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@@ -7559,6 +7559,32 @@ The attributes ``__arm_in(S)``, ``__arm_out(S)``,
``__arm_inout(S)`` and
}];
}
+def ArmAgnosticDocs : Documentation {
+ let Category = DocCatArmSmeAttributes;
+ let Content = [{
+The ``__arm_agnostic`` keyword applies to prototyped function types an
https://github.com/kmclaughlin-arm approved this pull request.
https://github.com/llvm/llvm-project/pull/121788
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>From 00772b871de43a5e30aca2a65a89675117cafbf1 Mon Sep 17 00:00:00 2001
From: Kerry McLaughlin
Date: Tue, 31 Dec 2024 17:22:02 +
Subject: [PATCH 1/4] [AArch64][SME] Add diagnostics to
CheckConstexpr
https://github.com/kmclaughlin-arm edited
https://github.com/llvm/llvm-project/pull/121777
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@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -fsyntax-only -verify %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -std=c++23 -fsyntax-only
-verify %s
kmclaughlin-arm wrote:
I think adding attributes to lambdas before the parameter li
@@ -1328,4 +1328,57 @@ void SemaARM::handleInterruptAttr(Decl *D, const
ParsedAttr &AL) {
ARMInterruptAttr(getASTContext(), AL, Kind));
}
+// Check if the function definition uses any AArch64 SME features without
+// having the '+sme' feature enabled and warn
@@ -1854,6 +1855,9 @@ bool Sema::CheckConstexprFunctionDefinition(const
FunctionDecl *NewFD,
}
}
+ if (Context.getTargetInfo().getTriple().isAArch64())
+ARM().CheckSMEFunctionDefAttributes(NewFD);
+
kmclaughlin-arm wrote:
Thanks, `ActOnStartOfLamb
https://github.com/kmclaughlin-arm updated
https://github.com/llvm/llvm-project/pull/121777
>From 00772b871de43a5e30aca2a65a89675117cafbf1 Mon Sep 17 00:00:00 2001
From: Kerry McLaughlin
Date: Tue, 31 Dec 2024 17:22:02 +
Subject: [PATCH 1/3] [AArch64][SME] Add diagnostics to
CheckConstexpr
kmclaughlin-arm wrote:
Please can you also extend `mangleSMEAttrs` in ItaniumMangle.cpp to include the
`__arm_agnostic` attribute?
https://github.com/llvm/llvm-project/pull/121788
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>From 00772b871de43a5e30aca2a65a89675117cafbf1 Mon Sep 17 00:00:00 2001
From: Kerry McLaughlin
Date: Tue, 31 Dec 2024 17:22:02 +
Subject: [PATCH 1/2] [AArch64][SME] Add diagnostics to
CheckConstexpr
https://github.com/kmclaughlin-arm created
https://github.com/llvm/llvm-project/pull/121777
CheckFunctionDeclaration emits diagnostics if any SME attributes are used
by a function definition without the required +sme or +sme2 target features.
This patch adds similar diagnostics to CheckConstexpr
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kmclaughlin-arm wrote:
> LGTM 👍 You could maybe add a test to
> `clang/test/CodeGen/AArch64/sme-inline-callees-streaming-attrs.c` too (which
> tests `flatten`/`always_inline` statements).
Thanks for approving the changes!
I did already add some tests to sme-inline-callees-streaming-attrs.c usi
@@ -256,7 +256,7 @@ bool AArch64TTIImpl::areInlineCompatible(const Function
*Caller,
CalleeAttrs.set(SMEAttrs::SM_Enabled, true);
}
- if (CalleeAttrs.isNewZA())
kmclaughlin-arm wrote:
Thanks @MacDue, there should be a similar restriction in Clang whic
https://github.com/kmclaughlin-arm updated
https://github.com/llvm/llvm-project/pull/121338
>From 8b8f191d9c6980f7342c0bea2681ffd8d1dbe90b Mon Sep 17 00:00:00 2001
From: Kerry McLaughlin
Date: Mon, 30 Dec 2024 13:24:34 +
Subject: [PATCH 1/2] [AArch64][SME] Disable inlining of callees with n
https://github.com/kmclaughlin-arm closed
https://github.com/llvm/llvm-project/pull/114209
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https://github.com/llvm/llvm-project/pull/114209
>From c62f48766cf24636045286449e98705a6a5bd76c Mon Sep 17 00:00:00 2001
From: Kerry McLaughlin
Date: Tue, 15 Oct 2024 15:22:56 +
Subject: [PATCH 1/6] [Clang][AArch64] Include SME attributes in the na
https://github.com/kmclaughlin-arm updated
https://github.com/llvm/llvm-project/pull/114209
>From c62f48766cf24636045286449e98705a6a5bd76c Mon Sep 17 00:00:00 2001
From: Kerry McLaughlin
Date: Tue, 15 Oct 2024 15:22:56 +
Subject: [PATCH 1/5] [Clang][AArch64] Include SME attributes in the na
https://github.com/kmclaughlin-arm updated
https://github.com/llvm/llvm-project/pull/114209
>From ff5b6defc0df704f63fffabc731bcd38a1e24d3b Mon Sep 17 00:00:00 2001
From: Kerry McLaughlin
Date: Tue, 15 Oct 2024 15:22:56 +
Subject: [PATCH 1/4] [Clang][AArch64] Include SME attributes in the na
@@ -3535,6 +3536,39 @@ void CXXNameMangler::mangleExtFunctionInfo(const
FunctionType *T) {
// FIXME: noreturn
}
+bool hasSharedState(unsigned SMEAttrs) {
+ switch (SMEAttrs) {
+ case FunctionType::ARM_In:
+ case FunctionType::ARM_Out:
+ case FunctionType::ARM_InOut:
+
@@ -3536,35 +3536,64 @@ void CXXNameMangler::mangleExtFunctionInfo(const
FunctionType *T) {
// FIXME: noreturn
}
-bool hasSharedState(unsigned SMEAttrs) {
+unsigned getZAState(unsigned SMEAttrs) {
switch (SMEAttrs) {
case FunctionType::ARM_In:
+return 1;
case F
https://github.com/kmclaughlin-arm updated
https://github.com/llvm/llvm-project/pull/114209
>From ff5b6defc0df704f63fffabc731bcd38a1e24d3b Mon Sep 17 00:00:00 2001
From: Kerry McLaughlin
Date: Tue, 15 Oct 2024 15:22:56 +
Subject: [PATCH 1/3] [Clang][AArch64] Include SME attributes in the na
https://github.com/kmclaughlin-arm ready_for_review
https://github.com/llvm/llvm-project/pull/114209
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https://github.com/llvm/llvm-project/pull/114209
>From ff5b6defc0df704f63fffabc731bcd38a1e24d3b Mon Sep 17 00:00:00 2001
From: Kerry McLaughlin
Date: Tue, 15 Oct 2024 15:22:56 +
Subject: [PATCH 1/2] [Clang][AArch64] Include SME attributes in the na
https://github.com/kmclaughlin-arm created
https://github.com/llvm/llvm-project/pull/114209
Similar to arm_sve_vector_bits, the mangling of function types is implemented
as a pseudo template if there are any SME attributes present, i.e.
`__SME_ATTRS`
For example, the following function:
https://github.com/kmclaughlin-arm updated
https://github.com/llvm/llvm-project/pull/107581
>From 1e6f25c517d8d1adeeaf59f826141efdcad8f05a Mon Sep 17 00:00:00 2001
From: Kerry McLaughlin
Date: Fri, 6 Sep 2024 10:13:33 +
Subject: [PATCH 1/6] [Clang] Emit error for duplicate mangled names wit
kmclaughlin-arm wrote:
> Oh, that makes sense... so the issue is generally with functions we emit
> lazily?
> I'd say it's reasonable to emit an error if we have two definitions for the
> same symbol, even if we don't end up emitting them because they're deferred.
Yes, I believe so. I've moved
https://github.com/kmclaughlin-arm updated
https://github.com/llvm/llvm-project/pull/107581
>From 1e6f25c517d8d1adeeaf59f826141efdcad8f05a Mon Sep 17 00:00:00 2001
From: Kerry McLaughlin
Date: Fri, 6 Sep 2024 10:13:33 +
Subject: [PATCH 1/5] [Clang] Emit error for duplicate mangled names wit
kmclaughlin-arm wrote:
> For the lambda example, there are only three relevant calls to
> GetOrCreateLLVMFunction; one for each function with IsInDefinition false, but
> then only one with IsInDefinition true.
>
> It's not clear to me why the two cases are different, and I don't really want
>
kmclaughlin-arm wrote:
> For non-lambda methods, the way this works it that we call
> GetOrCreateLLVMFunction for both methods... for the first method, the
> `!Entry->isDeclaration()` would be false, but for the second one, it would be
> true because we've emitted the definition of the first m
@@ -0,0 +1,31 @@
+// REQUIRES: aarch64-registered-target
+
+// RUN: %clang_cc1 -triple aarch64 -emit-llvm -o - %s -verify -DTEST1
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2
-emit-llvm -o - %s -verify -DTEST2
kmclaughlin-arm wro
https://github.com/kmclaughlin-arm updated
https://github.com/llvm/llvm-project/pull/107581
>From 1e6f25c517d8d1adeeaf59f826141efdcad8f05a Mon Sep 17 00:00:00 2001
From: Kerry McLaughlin
Date: Fri, 6 Sep 2024 10:13:33 +
Subject: [PATCH 1/4] [Clang] Emit error for duplicate mangled names wit
https://github.com/kmclaughlin-arm updated
https://github.com/llvm/llvm-project/pull/107581
>From 1e6f25c517d8d1adeeaf59f826141efdcad8f05a Mon Sep 17 00:00:00 2001
From: Kerry McLaughlin
Date: Fri, 6 Sep 2024 10:13:33 +
Subject: [PATCH 1/3] [Clang] Emit error for duplicate mangled names wit
kmclaughlin-arm wrote:
>
> I'm having a bit of trouble understanding the way the new code is structured.
> What makes the definition of lambda call operators special here? Do we not
> call GetOrCreateLLVMFunction with IsForDefinition set?
When I added this error I incorrectly thought GetOrCre
https://github.com/kmclaughlin-arm updated
https://github.com/llvm/llvm-project/pull/107581
>From 1e6f25c517d8d1adeeaf59f826141efdcad8f05a Mon Sep 17 00:00:00 2001
From: Kerry McLaughlin
Date: Fri, 6 Sep 2024 10:13:33 +
Subject: [PATCH 1/2] [Clang] Emit error for duplicate mangled names wit
kmclaughlin-arm wrote:
> Isn't this a bug in the mangler? I mean, it's better to print an error rather
> than silently miscompile, but this doesn't really solve the issue.
Hi @efriedma-quic,
The SME type attributes are not part of the name mangling. We figured an error
message would be useful
https://github.com/kmclaughlin-arm created
https://github.com/llvm/llvm-project/pull/107581
When functions are passed as arguments to a lambda, it's possible for
the mangled names of these functions to be the same despite the prototypes
being different. For example:
```
int non_streaming_fn(i
https://github.com/kmclaughlin-arm closed
https://github.com/llvm/llvm-project/pull/83301
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@@ -214,7 +232,8 @@ declare double @za_shared_callee(double) "aarch64_inout_za"
define double @za_new_caller_to_za_shared_callee(double %x) nounwind noinline
optnone "aarch64_new_za"{
; CHECK-COMMON-LABEL: za_new_caller_to_za_shared_callee:
; CHECK-COMMON: // %bb.0: //
@@ -196,12 +196,14 @@ bool AArch64FunctionInfo::needsAsyncDwarfUnwindInfo(
const MachineFunction &MF) const {
if (!NeedsAsyncDwarfUnwindInfo) {
const Function &F = MF.getFunction();
+const AArch64FunctionInfo *AFI = MF.getInfo();
// The check got "minsize" i
@@ -214,7 +232,8 @@ declare double @za_shared_callee(double) "aarch64_inout_za"
define double @za_new_caller_to_za_shared_callee(double %x) nounwind noinline
optnone "aarch64_new_za"{
; CHECK-COMMON-LABEL: za_new_caller_to_za_shared_callee:
; CHECK-COMMON: // %bb.0: //
@@ -196,12 +196,14 @@ bool AArch64FunctionInfo::needsAsyncDwarfUnwindInfo(
const MachineFunction &MF) const {
if (!NeedsAsyncDwarfUnwindInfo) {
const Function &F = MF.getFunction();
+const AArch64FunctionInfo *AFI = MF.getInfo();
// The check got "minsize" i
@@ -8287,6 +8289,13 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
SDValue InGlue;
if (RequiresSMChange) {
+
+if (Subtarget->hasSVE()) {
kmclaughlin-arm wrote:
I've made changes to `needsAsyncDwarfUnwindInfo` in
AArch64MachineFunctionInfo
@@ -8287,6 +8289,13 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
SDValue InGlue;
if (RequiresSMChange) {
+
+if (Subtarget->hasSVE()) {
kmclaughlin-arm wrote:
If we still emit the spill of VG with `-fno-asynchronous-unwind-tables`, I
don
@@ -8287,6 +8289,13 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
SDValue InGlue;
if (RequiresSMChange) {
+
+if (Subtarget->hasSVE()) {
kmclaughlin-arm wrote:
> when I compile some code with -fno-asynchronous-unwind-tables, it will still
@@ -3768,6 +3768,12 @@ def err_conflicting_attributes_arm_state : Error<
"conflicting attributes for state '%0'">;
def err_sme_streaming_cannot_be_multiversioned : Error<
"streaming function cannot be multi-versioned">;
+def err_sme_streaming_mode_change_no_sve : Error<
+
@@ -1552,6 +1553,57 @@ bool AArch64ExpandPseudo::expandMI(MachineBasicBlock
&MBB,
case AArch64::COALESCER_BARRIER_FPR128:
MI.eraseFromParent();
return true;
+ case AArch64::VGSavePseudo:
+ case AArch64::VGRestorePseudo: {
+ MachineFunction &MF = *MBB.getPa
@@ -1552,6 +1553,57 @@ bool AArch64ExpandPseudo::expandMI(MachineBasicBlock
&MBB,
case AArch64::COALESCER_BARRIER_FPR128:
MI.eraseFromParent();
return true;
+ case AArch64::VGSavePseudo:
+ case AArch64::VGRestorePseudo: {
+ MachineFunction &MF = *MBB.getPa
@@ -221,6 +224,15 @@ def : Pat<(AArch64_smstop (i32 svcr_op:$pstate), (i64
/*AArch64SME::Always*/0)),
(MSRpstatesvcrImm1 svcr_op:$pstate, 0b0)>;
+// Pseudo to insert cfi_offset/cfi_restore instructions. Used to save or
restore
+// the streaming value of VG around
@@ -3730,6 +3730,12 @@ def warn_gnu_inline_cplusplus_without_extern : Warning<
"'gnu_inline' attribute without 'extern' in C++ treated as externally"
" available, this changed in Clang 10">,
InGroup>;
+def warn_sme_streaming_mode_change_no_sve : Warning<
+ "function requ
kmclaughlin-arm wrote:
Gentle ping :)
https://github.com/llvm/llvm-project/pull/83301
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@@ -8001,6 +8007,22 @@ void Sema::checkCall(NamedDecl *FDecl, const
FunctionProtoType *Proto,
}
}
+// SME functions may require SVE to be available for unwinding, as the
+// value of VG needs to be preserved across streaming-mode changes.
+if (CallerFD &
https://github.com/kmclaughlin-arm approved this pull request.
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@@ -108,3 +108,11 @@ svint8_t new_za(svint8_t zd, svbool_t pg, uint32_t
slice_base) __arm_streaming {
// expected-no-warning
return svread_hor_za8_s8_m(zd, pg, 0, slice_base);
}
+
+void missing_zt0(void) __arm_streaming {
+ // expected-warning@+1 {{builtin call is not
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https://github.com/llvm/llvm-project/pull/78961
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https://github.com/llvm/llvm-project/pull/78321
>From 11dce217ed307601d0ea1eb5b016b47f80e67786 Mon Sep 17 00:00:00 2001
From: Kerry McLaughlin
Date: Thu, 11 Jan 2024 17:46:00 +
Subject: [PATCH 1/7] [SME2][Clang] Add tests with ZT0 state
---
llvm/
@@ -342,331 +342,331 @@ let TargetGuard = "sme2" in {
//
let TargetGuard = "sme2" in {
- def SVSMOPA : Inst<"svmopa_za32[_{d}]_m", "viPPdd", "s", MergeNone,
"aarch64_sme_smopa_za32", [IsSharedZA, IsStreaming], [ImmCheck<0,
ImmCheck0_3>]>;
- def SVUSMOPA : Inst<"svmopa_za3
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https://github.com/llvm/llvm-project/pull/77338
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https://github.com/kmclaughlin-arm approved this pull request.
LGTM!
https://github.com/llvm/llvm-project/pull/77792
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https://github.com/kmclaughlin-arm approved this pull request.
LGTM!
https://github.com/llvm/llvm-project/pull/76711
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@@ -0,0 +1,35 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 4
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S
-O2 -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim |
FileC
@@ -1321,12 +1321,17 @@ def SVSET_3_BF16 : SInst<"svset3[_{d}]", "33id", "b",
MergeNone, "", [IsTupleSet
def SVSET_4_BF16 : SInst<"svset4[_{d}]", "44id", "b", MergeNone, "",
[IsTupleSet], [ImmCheck<1, ImmCheck0_3>]>;
}
-let TargetGuard = "sve2p1" in {
- def SVGET_2_B : SIns
@@ -494,7 +494,7 @@ void test_svmls_lane1_f16(uint32_t slice_base, svfloat16_t
zn, svfloat16_t zm) _
//
void test_svmls_lane1_bf16(uint32_t slice_base, svbfloat16_t zn, svbfloat16_t
zm) __arm_streaming __arm_shared_za
{
- SVE_ACLE_FUNC(svmls_lane_za32,,_bf16,,_vg2x1)(slice_
@@ -460,7 +460,7 @@ void test_svmla_single4_u16(uint32_t slice_base,
svuint16x4_t zn, svuint16_t zm)
//
void test_svmla_single4_s16(uint32_t slice_base, svint16x4_t zn, svint16_t zm)
__arm_streaming __arm_shared_za
{
- SVE_ACLE_FUNC(svmla_single_za32,,_s16,,_vg2x4)(slice_ba
https://github.com/kmclaughlin-arm commented:
Thanks for updating this @MDevereau, I think there are just a few more tests
that should be included in this PR.
https://github.com/llvm/llvm-project/pull/76711
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@@ -1952,10 +1952,6 @@ def SVPSEL_B : SInst<"svpsel_lane_b8", "PPPm", "Pc",
MergeNone, "", [IsStreamin
def SVPSEL_H : SInst<"svpsel_lane_b16", "PPPm", "Ps", MergeNone, "",
[IsStreamingCompatible], []>;
def SVPSEL_S : SInst<"svpsel_lane_b32", "PPPm", "Pi", MergeNone, "",
[IsS
https://github.com/kmclaughlin-arm updated
https://github.com/llvm/llvm-project/pull/77097
>From 0cea7a1c7d72493de5533815903aec868543d544 Mon Sep 17 00:00:00 2001
From: Kerry McLaughlin
Date: Fri, 5 Jan 2024 11:44:53 +
Subject: [PATCH 1/2] [Clang][SME2] Fix PSEL builtin predicates
PSEL int
https://github.com/kmclaughlin-arm created
https://github.com/llvm/llvm-project/pull/77097
PSEL intrinsics which return a predicate-as-counter are available
in SVE2p1 & SME2.
>From 0cea7a1c7d72493de5533815903aec868543d544 Mon Sep 17 00:00:00 2001
From: Kerry McLaughlin
Date: Fri, 5 Jan 2024 11
@@ -246,7 +246,7 @@ void test_svmls_single2_f64(uint32_t slice_base,
svfloat64x2_t zn, svfloat64_t z
// CPP-CHECK-NEXT:ret void
//
void test_svmls_single4_f64(uint32_t slice_base, svfloat64x4_t zn, svfloat64_t
zm) __arm_streaming __arm_shared_za {
- SVE_ACLE_FUNC(svmls_s
@@ -246,7 +246,7 @@ void test_svmls_single2_f64(uint32_t slice_base,
svfloat64x2_t zn, svfloat64_t z
// CPP-CHECK-NEXT:ret void
//
void test_svmls_single4_f64(uint32_t slice_base, svfloat64x4_t zn, svfloat64_t
zm) __arm_streaming __arm_shared_za {
- SVE_ACLE_FUNC(svmls_s
https://github.com/kmclaughlin-arm edited
https://github.com/llvm/llvm-project/pull/76711
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https://github.com/kmclaughlin-arm commented:
Thanks for fixing these tests @MDevereau!
There are also some tests in acle_sme2_mlal.c, acle_sme2_mlall.c &
acle_sme2_mlsl.c which have a similar issue, could you please update them in
this patch too?
https://github.com/llvm/llvm-project/pull/7671
https://github.com/kmclaughlin-arm closed
https://github.com/llvm/llvm-project/pull/75821
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https://github.com/kmclaughlin-arm closed
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@@ -2069,21 +2070,20 @@ def SVDOT_LANE_X2_U : SInst<"svdot_lane[_{d}_{2}_{3}]",
"ddhhi", "Ui", MergeNone
def SVDOT_LANE_X2_F : SInst<"svdot_lane[_{d}_{2}_{3}]", "ddhhi", "f",
MergeNone, "aarch64_sve_fdot_lane_x2", [], [ImmCheck<3, ImmCheck0_3>]>;
}
-let TargetGuard = "sve2p
@@ -1,14 +1,20 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// REQUIRES: aarch64-registered-target
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S
-disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S
-p
@@ -11,10 +11,16 @@
// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu
-target-feature +sve2p1 \
// RUN: -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu
-target-feature
@@ -1,14 +1,20 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// REQUIRES: aarch64-registered-target
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S
-disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S
-p
@@ -10,6 +10,10 @@
// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu \
// RUN: -target-feature +sve2p1 -S -O1 -Werror -emit-llvm -o - -x c++ %s |
FileCheck %s -check-prefix=CPP-CHECK
// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-
@@ -11,10 +11,16 @@
// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu
-target-feature +sve2p1 \
// RUN: -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu
-target-feature
https://github.com/kmclaughlin-arm created
https://github.com/llvm/llvm-project/pull/75941
Adds the following SME2 builtins:
- svrinta, svrintm, svrintn, svrintp (x2 & x4)
>From 85674fa6c6b568c900b3728555a3e276439818a2 Mon Sep 17 00:00:00 2001
From: Kerry McLaughlin
Date: Tue, 19 Dec 2023 14:
https://github.com/kmclaughlin-arm closed
https://github.com/llvm/llvm-project/pull/71191
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https://github.com/kmclaughlin-arm closed
https://github.com/llvm/llvm-project/pull/74841
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https://github.com/kmclaughlin-arm created
https://github.com/llvm/llvm-project/pull/75821
This patch enables the following builtins for SME2:
- svld1, svld1_vnum
- svldnt1, svldnt1_vnum
- svst1, svst1_vnum
- svstnt1, svstnt1_vnum
>From 1b2022f34ad3b038f714d8d0559f4e129d5e731a Mon Sep 17 00
@@ -315,6 +315,219 @@ let TargetGuard = "sme2" in {
def SVBMOPS : Inst<"svbmops_za32[_{d}]_m", "viPPdd", "iUi", MergeNone,
"aarch64_sme_bmops_za32", [IsSharedZA, IsStreaming], [ImmCheck<0,
ImmCheck0_3>]>;
}
+// FMLA/FMLS
+let TargetGuard = "sme2" in {
+ def SVMLA_MULTI_VG
@@ -0,0 +1,760 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// REQUIRES: aarch64-registered-target
+
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 -S
-disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p
https://github.com/kmclaughlin-arm approved this pull request.
https://github.com/llvm/llvm-project/pull/75454
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@@ -1,12 +1,20 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S
-O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -t
@@ -1,12 +1,20 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S
-O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -t
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