john-brawn-arm wrote:
Instcombine follow up : https://github.com/llvm/llvm-project/pull/118808
https://github.com/llvm/llvm-project/pull/115894
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@@ -1875,13 +1873,17 @@ Instruction *InstCombinerImpl::visitFPTrunc(FPTruncInst
&FPT) {
// fptrunc (select Cond, (fpext X), Y --> select Cond, X, (fptrunc Y)
Value *NarrowY = Builder.CreateFPTrunc(Y, Ty);
Value *Sel = Builder.CreateSelect(Cond, X, NarrowY, "n
@@ -1875,13 +1873,17 @@ Instruction *InstCombinerImpl::visitFPTrunc(FPTruncInst
&FPT) {
// fptrunc (select Cond, (fpext X), Y --> select Cond, X, (fptrunc Y)
Value *NarrowY = Builder.CreateFPTrunc(Y, Ty);
Value *Sel = Builder.CreateSelect(Cond, X, NarrowY, "n
@@ -1875,13 +1873,17 @@ Instruction *InstCombinerImpl::visitFPTrunc(FPTruncInst
&FPT) {
// fptrunc (select Cond, (fpext X), Y --> select Cond, X, (fptrunc Y)
Value *NarrowY = Builder.CreateFPTrunc(Y, Ty);
Value *Sel = Builder.CreateSelect(Cond, X, NarrowY, "n
john-brawn-arm wrote:
Ping
https://github.com/llvm/llvm-project/pull/115894
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@@ -1875,13 +1873,17 @@ Instruction *InstCombinerImpl::visitFPTrunc(FPTruncInst
&FPT) {
// fptrunc (select Cond, (fpext X), Y --> select Cond, X, (fptrunc Y)
Value *NarrowY = Builder.CreateFPTrunc(Y, Ty);
Value *Sel = Builder.CreateSelect(Cond, X, NarrowY, "n
https://github.com/john-brawn-arm updated
https://github.com/llvm/llvm-project/pull/115894
>From 9001ad621028caa0ca2095156f28fac88deb8525 Mon Sep 17 00:00:00 2001
From: John Brawn
Date: Wed, 6 Nov 2024 12:15:17 +
Subject: [PATCH 1/2] [IR] Allow fast math flags on fptrunc and fpext
This con
https://github.com/john-brawn-arm created
https://github.com/llvm/llvm-project/pull/115894
This consists of:
* Make these instructions part of FPMathOperator.
* Adjust bitcode/ir readers/writers to expect fast math flags on these
instructions.
* Make IRBuilder set the fast math flags on thes
@@ -1823,9 +1823,48 @@ extern "C" void *__libunwind_cet_get_jump_target() {
#endif
class _LIBUNWIND_HIDDEN Registers_arm64 {
+protected:
+ /// The program counter is used effectively as a return address
+ /// when the context is restored therefore protect it with PAC.
+ ///
@@ -1845,8 +1884,14 @@ class _LIBUNWIND_HIDDEN Registers_arm64 {
uint64_t getSP() const { return _registers.__sp; }
void setSP(uint64_t value) { _registers.__sp = value; }
- uint64_t getIP() const { return _registers.__pc; }
- void setIP(uint6
@@ -1823,9 +1823,48 @@ extern "C" void *__libunwind_cet_get_jump_target() {
#endif
class _LIBUNWIND_HIDDEN Registers_arm64 {
+protected:
+ /// The program counter is used effectively as a return address
john-brawn-arm wrote:
"used effectively" should be "eff
@@ -1823,9 +1823,48 @@ extern "C" void *__libunwind_cet_get_jump_target() {
#endif
class _LIBUNWIND_HIDDEN Registers_arm64 {
+protected:
+ /// The program counter is used effectively as a return address
+ /// when the context is restored therefore protect it with PAC.
+ ///
john-brawn-arm wrote:
I'm not especially familiar with how pointer authentication works with
exception unwinding, but this looks OK to me with some minor comments.
https://github.com/llvm/llvm-project/pull/113368
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john-brawn-arm wrote:
> @john-brawn-arm This may be hard to remember, but this a path you've tread
> before could the LLVM_INSTANTIATE_REGISTRY just be changed to a fulll class
> explicit template instantiation?
It looks like the approach you're going for is:
* Registry is declared as extern
john-brawn-arm wrote:
/cherry-pick b32aac4 c649194 3952910
https://github.com/llvm/llvm-project/pull/99335
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https://github.com/llvm/llvm-project/pull/102322
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https://github.com/llvm/llvm-project/pull/102322
>From 1c6cbe68b3d2698cf5958daf84ec25496bb7589a Mon Sep 17 00:00:00 2001
From: John Brawn
Date: Wed, 7 Aug 2024 14:25:29 +0100
Subject: [PATCH 1/2] [libunwind] Fix problems caused by combining BTI and GCS
@@ -680,7 +680,7 @@
DEFINE_LIBUNWIND_FUNCTION(__libunwind_Registers_arm64_jumpto)
ldrx16, [x0, #0x0F8]
ldpx0, x1, [x0, #0x000] // restore x0,x1
movsp,x16 // restore sp
- retx30// jump to pc
john-
https://github.com/john-brawn-arm created
https://github.com/llvm/llvm-project/pull/102322
The libunwind assembly files need adjustment in order to work correctly when
both BTI and GCS are both enabled (which will be the case when using
-mbranch-protection=standard):
* __libunwind_Registers_a
@@ -680,7 +680,7 @@
DEFINE_LIBUNWIND_FUNCTION(__libunwind_Registers_arm64_jumpto)
ldrx16, [x0, #0x0F8]
ldpx0, x1, [x0, #0x000] // restore x0,x1
movsp,x16 // restore sp
- retx30// jump to pc
john-
https://github.com/john-brawn-arm closed
https://github.com/llvm/llvm-project/pull/101973
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john-brawn-arm wrote:
https://github.com/llvm/llvm-project/pull/101973 for being more careful about
enabling GCS.
https://github.com/llvm/llvm-project/pull/99335
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https://github.com/john-brawn-arm created
https://github.com/llvm/llvm-project/pull/101973
We need both GCS to be enabled by the compiler (which we do by checking if
__ARM_FEATURE_GCS_DEFAULT is defined) and for arm_acle.h to define the GCS
intrinsics. Check the latter by checking if _CHKFEAT_
john-brawn-arm wrote:
> Looks like this breaks building on Android:
> https://ci.chromium.org/ui/p/chromium/builders/try/android-arm64-rel/680348/overview
Looks like Android here is being built with
clang-llvmorg-19-init-14561-gecea8371-3004.tar.xz which looks like it's built
from commit http
john-brawn-arm wrote:
/cherry-pick b32aac4358c1f6639de7c453656cd74fbab75d71
https://github.com/llvm/llvm-project/pull/99335
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john-brawn-arm wrote:
> This seems to add a new feature, is it really relevant for a backport?
This is the last piece of work to enable GCS in the LLVM toolchain (clang and
lld support went in a while ago), and I was hoping to get everything in to LLVM
19. It would be rather annoying to have t
https://github.com/john-brawn-arm closed
https://github.com/llvm/llvm-project/pull/99335
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https://github.com/john-brawn-arm updated
https://github.com/llvm/llvm-project/pull/99335
>From e0f71863bd2f797c9208bdfc559bb69ade5a653a Mon Sep 17 00:00:00 2001
From: John Brawn
Date: Wed, 17 Jul 2024 15:18:46 +0100
Subject: [PATCH 1/4] [libunwind] Add GCS support for AArch64
AArch64 GCS (Gua
john-brawn-arm wrote:
> LGTM. Sorry for the delay.
>
> Q: Is there a way to play with the GCS feature in a VM? Do you have setup
> instructions?
https://git.yoctoproject.org/meta-arm/log/?h=testing/gcs is a demonstration
embedded linux that support GCS, including an emulator capable of runnin
john-brawn-arm wrote:
Sorry to pester you about this, but would it be possible to get this approved
in time for LLVM19 RC2 on Monday? This is the last piece of GCS work and it
would be nice to have it all in a single LLVM release.
https://github.com/llvm/llvm-project/pull/99335
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john-brawn-arm wrote:
Ping
https://github.com/llvm/llvm-project/pull/99335
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https://github.com/llvm/llvm-project/pull/99335
>From e0f71863bd2f797c9208bdfc559bb69ade5a653a Mon Sep 17 00:00:00 2001
From: John Brawn
Date: Wed, 17 Jul 2024 15:18:46 +0100
Subject: [PATCH 1/3] [libunwind] Add GCS support for AArch64
AArch64 GCS (Gua
https://github.com/john-brawn-arm created
https://github.com/llvm/llvm-project/pull/99335
AArch64 GCS (Guarded Control Stack) is similar enough to CET that we can re-use
the existing code that is guarded by _LIBUNWIND_USE_CET, so long as we also add
defines to locate the GCS stack and pop the
https://github.com/john-brawn-arm closed
https://github.com/llvm/llvm-project/pull/96903
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john-brawn-arm wrote:
> Thanks, LGTM.
>
> As a follow-up, can you check that the instructions generated from this
> builtin do inhibit the machine outliner? Maybe all GCS-modifying functions
> have to inhibit the machine outliner, I'm not 100% sure.
The GCS instructions don't inhibit the mach
john-brawn-arm wrote:
I've added a new change to work around a problem in intrinsic handling that's
detailed in
https://discourse.llvm.org/t/intrinsic-with-sideeffect-is-optimized-out/66053
(I previously had this workaround in, but removed it because it looked like it
was no longer needed, bu
https://github.com/john-brawn-arm updated
https://github.com/llvm/llvm-project/pull/96903
>From 123ebe17131fcfc7662be6759327b311e90fb16d Mon Sep 17 00:00:00 2001
From: John Brawn
Date: Tue, 25 Jun 2024 15:35:18 +0100
Subject: [PATCH 1/3] [AArch64] Implement GCS ACLE intrinsics
This adds intrin
@@ -855,6 +863,25 @@ __rndrrs(uint64_t *__p) {
}
#endif
+/* 11.2 Guarded Control Stack intrinsics */
+#if defined(__ARM_64BIT_STATE) && __ARM_64BIT_STATE
+static __inline__ void * __attribute__((__always_inline__, __nodebug__))
+__gcspr() {
+ return (void *)__builtin_arm_rsr6
https://github.com/john-brawn-arm created
https://github.com/llvm/llvm-project/pull/96903
This adds intrinsics defined in ARM-software/acle#260
Doing this requires some changes to the GCS instruction definitions, as these
intrinsics make use of how some instructions don't modify the input regi
https://github.com/john-brawn-arm closed
https://github.com/llvm/llvm-project/pull/94632
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>From c490a8c7d16e03066a3a4ef4985fa64fb28d Mon Sep 17 00:00:00 2001
From: John Brawn
Date: Thu, 14 Mar 2024 16:17:03 +
Subject: [PATCH] [DebugInfo] Change handling of structured bindings of
bitfie
https://github.com/john-brawn-arm edited
https://github.com/llvm/llvm-project/pull/94632
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https://github.com/john-brawn-arm ready_for_review
https://github.com/llvm/llvm-project/pull/94632
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https://github.com/llvm/llvm-project/pull/94632
>From c490a8c7d16e03066a3a4ef4985fa64fb28d Mon Sep 17 00:00:00 2001
From: John Brawn
Date: Thu, 14 Mar 2024 16:17:03 +
Subject: [PATCH] [DebugInfo] Change handling of structured bindings of
bitfie
https://github.com/john-brawn-arm created
https://github.com/llvm/llvm-project/pull/94632
Currently we use DW_OP_plus_uconst to handle the bitfield offset and handle the
bitfield size by choosing a type size that matches, but this doesn't work if
either offset or size aren't byte-aligned. Extr
https://github.com/john-brawn-arm closed
https://github.com/llvm/llvm-project/pull/85665
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john-brawn-arm wrote:
After doing some more testing it turns out that DW_OP_bit_piece actually
doesn't work when we have a signed bitfield, as both gdb and lldb treat the
upper bits as zero. I think instead we have to do a sequence of operations to
extract the relevant bits from the value. I'v
@@ -6178,10 +6178,16 @@ The current supported opcode vocabulary is limited:
the last entry from the second last entry and appends the result to the
expression stack.
- ``DW_OP_plus_uconst, 93`` adds ``93`` to the working expression.
-- ``DW_OP_LLVM_fragment, 16, 8`` specifi
@@ -6178,10 +6178,16 @@ The current supported opcode vocabulary is limited:
the last entry from the second last entry and appends the result to the
expression stack.
- ``DW_OP_plus_uconst, 93`` adds ``93`` to the working expression.
-- ``DW_OP_LLVM_fragment, 16, 8`` specifi
@@ -6178,10 +6178,16 @@ The current supported opcode vocabulary is limited:
the last entry from the second last entry and appends the result to the
expression stack.
- ``DW_OP_plus_uconst, 93`` adds ``93`` to the working expression.
-- ``DW_OP_LLVM_fragment, 16, 8`` specifi
@@ -6178,10 +6178,16 @@ The current supported opcode vocabulary is limited:
the last entry from the second last entry and appends the result to the
expression stack.
- ``DW_OP_plus_uconst, 93`` adds ``93`` to the working expression.
-- ``DW_OP_LLVM_fragment, 16, 8`` specifi
https://github.com/john-brawn-arm updated
https://github.com/llvm/llvm-project/pull/85665
>From 665d4034a1428d9b5cf1c4d4e89a16fa00b94fb5 Mon Sep 17 00:00:00 2001
From: John Brawn
Date: Thu, 14 Mar 2024 16:17:03 +
Subject: [PATCH 1/4] [DebugInfo] Use DW_op_bit_piece for structured bindings
https://github.com/john-brawn-arm updated
https://github.com/llvm/llvm-project/pull/85665
>From 665d4034a1428d9b5cf1c4d4e89a16fa00b94fb5 Mon Sep 17 00:00:00 2001
From: John Brawn
Date: Thu, 14 Mar 2024 16:17:03 +
Subject: [PATCH 1/3] [DebugInfo] Use DW_op_bit_piece for structured bindings
https://github.com/john-brawn-arm updated
https://github.com/llvm/llvm-project/pull/85665
>From 665d4034a1428d9b5cf1c4d4e89a16fa00b94fb5 Mon Sep 17 00:00:00 2001
From: John Brawn
Date: Thu, 14 Mar 2024 16:17:03 +
Subject: [PATCH 1/2] [DebugInfo] Use DW_op_bit_piece for structured bindings
john-brawn-arm wrote:
Ping.
https://github.com/llvm/llvm-project/pull/85665
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@@ -8,8 +8,8 @@ struct S0 {
// CHECK-LABEL: define dso_local void @_Z3fS0v
// CHECK:alloca %struct.S0, align 4
// CHECK-NEXT:[[TMP0:%.*]] = alloca %struct.S0, align 4
-// CHECK: call void @llvm.dbg.declare(metadata ptr [[TMP0]], metadata
[[S
@@ -8,8 +8,8 @@ struct S0 {
// CHECK-LABEL: define dso_local void @_Z3fS0v
// CHECK:alloca %struct.S0, align 4
// CHECK-NEXT:[[TMP0:%.*]] = alloca %struct.S0, align 4
-// CHECK: call void @llvm.dbg.declare(metadata ptr [[TMP0]], metadata
[[S
@@ -8,8 +8,8 @@ struct S0 {
// CHECK-LABEL: define dso_local void @_Z3fS0v
// CHECK:alloca %struct.S0, align 4
// CHECK-NEXT:[[TMP0:%.*]] = alloca %struct.S0, align 4
-// CHECK: call void @llvm.dbg.declare(metadata ptr [[TMP0]], metadata
[[S
https://github.com/john-brawn-arm created
https://github.com/llvm/llvm-project/pull/85665
Currently we use DW_OP_plus_uconst to handle the bitfield offset and handle the
bitfield size by choosing a type size that matches, but this doesn't work if
either offset or size aren't byte-aligned. Usin
https://github.com/john-brawn-arm closed
https://github.com/llvm/llvm-project/pull/75486
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john-brawn-arm wrote:
Ping.
https://github.com/llvm/llvm-project/pull/75486
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https://github.com/john-brawn-arm updated
https://github.com/llvm/llvm-project/pull/75486
>From cceb8766d2c93cadc940b45f0817abc5e6d0a225 Mon Sep 17 00:00:00 2001
From: John Brawn
Date: Wed, 13 Dec 2023 16:20:33 +
Subject: [PATCH] [clang][AArch64] Add a -mbranch-protection option to enable
https://github.com/john-brawn-arm created
https://github.com/llvm/llvm-project/pull/75486
-mbranch-protection=gcs (enabled by -mbranch-protection=standard) causes
generated objects to be marked with the gcs feature. This is done via the
guarded-control-stack module flag, in a similar way to
b
Author: John Brawn
Date: 2023-08-18T12:39:37+01:00
New Revision: 9e11a6d8fdd745f20bada10473b701d2e21492a5
URL:
https://github.com/llvm/llvm-project/commit/9e11a6d8fdd745f20bada10473b701d2e21492a5
DIFF:
https://github.com/llvm/llvm-project/commit/9e11a6d8fdd745f20bada10473b701d2e21492a5.diff
LO
Author: John Brawn
Date: 2023-08-17T15:25:53+01:00
New Revision: 6244e3840694e513ef885e8505e7744de8c9b959
URL:
https://github.com/llvm/llvm-project/commit/6244e3840694e513ef885e8505e7744de8c9b959
DIFF:
https://github.com/llvm/llvm-project/commit/6244e3840694e513ef885e8505e7744de8c9b959.diff
LO
Author: John Brawn
Date: 2023-07-25T12:30:41+01:00
New Revision: d031ff38779bd688c514136dbdcce3169ee82b6e
URL:
https://github.com/llvm/llvm-project/commit/d031ff38779bd688c514136dbdcce3169ee82b6e
DIFF:
https://github.com/llvm/llvm-project/commit/d031ff38779bd688c514136dbdcce3169ee82b6e.diff
LO
Author: John Brawn
Date: 2023-07-24T13:30:26+01:00
New Revision: dc3cd5926423c56d4673308617f035713aa024d6
URL:
https://github.com/llvm/llvm-project/commit/dc3cd5926423c56d4673308617f035713aa024d6
DIFF:
https://github.com/llvm/llvm-project/commit/dc3cd5926423c56d4673308617f035713aa024d6.diff
LO
Author: John Brawn
Date: 2023-07-24T13:11:30+01:00
New Revision: dfca88341794eec88c5009a93c569172fff62635
URL:
https://github.com/llvm/llvm-project/commit/dfca88341794eec88c5009a93c569172fff62635
DIFF:
https://github.com/llvm/llvm-project/commit/dfca88341794eec88c5009a93c569172fff62635.diff
LO
Author: John Brawn
Date: 2023-07-06T11:54:45+01:00
New Revision: 626c789d92bc917e7db30478e9b6d4c9b567ee17
URL:
https://github.com/llvm/llvm-project/commit/626c789d92bc917e7db30478e9b6d4c9b567ee17
DIFF:
https://github.com/llvm/llvm-project/commit/626c789d92bc917e7db30478e9b6d4c9b567ee17.diff
LO
Author: John Brawn
Date: 2023-07-05T17:54:50+01:00
New Revision: 25784cd6a962ac59e7bde07761fc3ba450da6628
URL:
https://github.com/llvm/llvm-project/commit/25784cd6a962ac59e7bde07761fc3ba450da6628
DIFF:
https://github.com/llvm/llvm-project/commit/25784cd6a962ac59e7bde07761fc3ba450da6628.diff
LO
Author: John Brawn
Date: 2023-07-05T17:39:59+01:00
New Revision: 258322105892bd895a89ccbe89487885581f5a47
URL:
https://github.com/llvm/llvm-project/commit/258322105892bd895a89ccbe89487885581f5a47
DIFF:
https://github.com/llvm/llvm-project/commit/258322105892bd895a89ccbe89487885581f5a47.diff
LO
Author: John Brawn
Date: 2023-07-05T16:02:40+01:00
New Revision: 4ade8b7ed9976303b23cff3525223826e65b46e7
URL:
https://github.com/llvm/llvm-project/commit/4ade8b7ed9976303b23cff3525223826e65b46e7
DIFF:
https://github.com/llvm/llvm-project/commit/4ade8b7ed9976303b23cff3525223826e65b46e7.diff
LO
Author: John Brawn
Date: 2023-06-01T17:37:50+01:00
New Revision: 844e9534c6d99ddb6bada740839760fa24d17cb6
URL:
https://github.com/llvm/llvm-project/commit/844e9534c6d99ddb6bada740839760fa24d17cb6
DIFF:
https://github.com/llvm/llvm-project/commit/844e9534c6d99ddb6bada740839760fa24d17cb6.diff
LO
Author: John Brawn
Date: 2023-05-25T11:55:44+01:00
New Revision: 0123deb3a6f0a83095287f51b07c77b7b43ab847
URL:
https://github.com/llvm/llvm-project/commit/0123deb3a6f0a83095287f51b07c77b7b43ab847
DIFF:
https://github.com/llvm/llvm-project/commit/0123deb3a6f0a83095287f51b07c77b7b43ab847.diff
LO
Author: John Brawn
Date: 2023-05-24T17:28:41+01:00
New Revision: 78bf8a0a2212c1826ce2a9c0f98c73e9b9b16367
URL:
https://github.com/llvm/llvm-project/commit/78bf8a0a2212c1826ce2a9c0f98c73e9b9b16367
DIFF:
https://github.com/llvm/llvm-project/commit/78bf8a0a2212c1826ce2a9c0f98c73e9b9b16367.diff
LO
Author: John Brawn
Date: 2023-05-17T15:21:20+01:00
New Revision: e55d52cd34fb7a6a6617639d147b9d0abaceeeab
URL:
https://github.com/llvm/llvm-project/commit/e55d52cd34fb7a6a6617639d147b9d0abaceeeab
DIFF:
https://github.com/llvm/llvm-project/commit/e55d52cd34fb7a6a6617639d147b9d0abaceeeab.diff
LO
Author: John Brawn
Date: 2023-05-17T11:49:49+01:00
New Revision: 22e3f587fd1ff97185014cb1ba723579ed2150d3
URL:
https://github.com/llvm/llvm-project/commit/22e3f587fd1ff97185014cb1ba723579ed2150d3
DIFF:
https://github.com/llvm/llvm-project/commit/22e3f587fd1ff97185014cb1ba723579ed2150d3.diff
LO
Author: John Brawn
Date: 2023-04-24T15:35:37+01:00
New Revision: 78086af43ade0c91546a2688bb6e97906eee6c2a
URL:
https://github.com/llvm/llvm-project/commit/78086af43ade0c91546a2688bb6e97906eee6c2a
DIFF:
https://github.com/llvm/llvm-project/commit/78086af43ade0c91546a2688bb6e97906eee6c2a.diff
LO
Author: John Brawn
Date: 2023-04-24T14:07:41+01:00
New Revision: 524ed4b1ba518d5dd5d67fb9593e0864b0e664a4
URL:
https://github.com/llvm/llvm-project/commit/524ed4b1ba518d5dd5d67fb9593e0864b0e664a4
DIFF:
https://github.com/llvm/llvm-project/commit/524ed4b1ba518d5dd5d67fb9593e0864b0e664a4.diff
LO
Author: John Brawn
Date: 2023-03-20T17:36:01Z
New Revision: 72073fc95cd4793a853925ddc8cc3fb2118808a5
URL:
https://github.com/llvm/llvm-project/commit/72073fc95cd4793a853925ddc8cc3fb2118808a5
DIFF:
https://github.com/llvm/llvm-project/commit/72073fc95cd4793a853925ddc8cc3fb2118808a5.diff
LOG: [S
Author: John Brawn
Date: 2023-03-07T18:06:41Z
New Revision: 9b2895469badad470dca186801fe025c52f5364c
URL:
https://github.com/llvm/llvm-project/commit/9b2895469badad470dca186801fe025c52f5364c
DIFF:
https://github.com/llvm/llvm-project/commit/9b2895469badad470dca186801fe025c52f5364c.diff
LOG: Us
Author: John Brawn
Date: 2023-03-07T16:20:43Z
New Revision: 128f7dac82ea4b996ddfd0db86edfdac4013b1da
URL:
https://github.com/llvm/llvm-project/commit/128f7dac82ea4b996ddfd0db86edfdac4013b1da
DIFF:
https://github.com/llvm/llvm-project/commit/128f7dac82ea4b996ddfd0db86edfdac4013b1da.diff
LOG: [L
Author: John Brawn
Date: 2023-02-23T16:18:24Z
New Revision: 25d23b1970ea023d83d462402fd43038b41c13a3
URL:
https://github.com/llvm/llvm-project/commit/25d23b1970ea023d83d462402fd43038b41c13a3
DIFF:
https://github.com/llvm/llvm-project/commit/25d23b1970ea023d83d462402fd43038b41c13a3.diff
LOG: [C
Author: John Brawn
Date: 2023-02-14T13:55:03Z
New Revision: 463fa25c34d6e569862a9b74b24db3aa5522d84b
URL:
https://github.com/llvm/llvm-project/commit/463fa25c34d6e569862a9b74b24db3aa5522d84b
DIFF:
https://github.com/llvm/llvm-project/commit/463fa25c34d6e569862a9b74b24db3aa5522d84b.diff
LOG: [c
Author: John Brawn
Date: 2022-11-29T13:09:52Z
New Revision: 6b8900f7f91de489302886c7e48033407d13f8c1
URL:
https://github.com/llvm/llvm-project/commit/6b8900f7f91de489302886c7e48033407d13f8c1
DIFF:
https://github.com/llvm/llvm-project/commit/6b8900f7f91de489302886c7e48033407d13f8c1.diff
LOG: [c
Author: John Brawn
Date: 2022-11-21T16:02:54Z
New Revision: 9e3264ab2021e07246e2cb491497d9cd514c213c
URL:
https://github.com/llvm/llvm-project/commit/9e3264ab2021e07246e2cb491497d9cd514c213c
DIFF:
https://github.com/llvm/llvm-project/commit/9e3264ab2021e07246e2cb491497d9cd514c213c.diff
LOG: [F
Author: John Brawn
Date: 2022-04-14T16:51:22+01:00
New Revision: 1b1466c346694c02ff0e30c96a50701b58bc4830
URL:
https://github.com/llvm/llvm-project/commit/1b1466c346694c02ff0e30c96a50701b58bc4830
DIFF:
https://github.com/llvm/llvm-project/commit/1b1466c346694c02ff0e30c96a50701b58bc4830.diff
LO
Author: John Brawn
Date: 2022-02-04T12:55:38Z
New Revision: bca998ed3c9a2e520724baa5d9395f6a5d8ca49d
URL:
https://github.com/llvm/llvm-project/commit/bca998ed3c9a2e520724baa5d9395f6a5d8ca49d
DIFF:
https://github.com/llvm/llvm-project/commit/bca998ed3c9a2e520724baa5d9395f6a5d8ca49d.diff
LOG: [A
Author: John Brawn
Date: 2021-04-21T14:00:38+01:00
New Revision: 5f02c308e68d2412e2555017d4dbe3e2cc122913
URL:
https://github.com/llvm/llvm-project/commit/5f02c308e68d2412e2555017d4dbe3e2cc122913
DIFF:
https://github.com/llvm/llvm-project/commit/5f02c308e68d2412e2555017d4dbe3e2cc122913.diff
LO
Author: John Brawn
Date: 2021-03-30T18:33:10+01:00
New Revision: eae3b2a715d7fd1aea0ce1c78ac7a04957b72728
URL:
https://github.com/llvm/llvm-project/commit/eae3b2a715d7fd1aea0ce1c78ac7a04957b72728
DIFF:
https://github.com/llvm/llvm-project/commit/eae3b2a715d7fd1aea0ce1c78ac7a04957b72728.diff
LO
Author: John Brawn
Date: 2021-03-30T18:33:10+01:00
New Revision: eae3b2a715d7fd1aea0ce1c78ac7a04957b72728
URL:
https://github.com/llvm/llvm-project/commit/eae3b2a715d7fd1aea0ce1c78ac7a04957b72728
DIFF:
https://github.com/llvm/llvm-project/commit/eae3b2a715d7fd1aea0ce1c78ac7a04957b72728.diff
LO
Author: John Brawn
Date: 2020-10-21T17:40:02+01:00
New Revision: ba60de5250ce1c4baa4a7bb7098ac67349f88a99
URL:
https://github.com/llvm/llvm-project/commit/ba60de5250ce1c4baa4a7bb7098ac67349f88a99
DIFF:
https://github.com/llvm/llvm-project/commit/ba60de5250ce1c4baa4a7bb7098ac67349f88a99.diff
LO
Author: John Brawn
Date: 2020-10-21T11:19:38+01:00
New Revision: 0c66606230df39e0bf4190f1fc2c2e2fb37a81ea
URL:
https://github.com/llvm/llvm-project/commit/0c66606230df39e0bf4190f1fc2c2e2fb37a81ea
DIFF:
https://github.com/llvm/llvm-project/commit/0c66606230df39e0bf4190f1fc2c2e2fb37a81ea.diff
LO
Author: John Brawn
Date: 2020-06-29T13:13:12+01:00
New Revision: ce1fa201af77e60d31b48571ffa1f85b919f6245
URL:
https://github.com/llvm/llvm-project/commit/ce1fa201af77e60d31b48571ffa1f85b919f6245
DIFF:
https://github.com/llvm/llvm-project/commit/ce1fa201af77e60d31b48571ffa1f85b919f6245.diff
LO
Author: John Brawn
Date: 2020-05-26T13:29:59+01:00
New Revision: 6c906f7785dad3a1dea5357cfde0762952c2a2bd
URL:
https://github.com/llvm/llvm-project/commit/6c906f7785dad3a1dea5357cfde0762952c2a2bd
DIFF:
https://github.com/llvm/llvm-project/commit/6c906f7785dad3a1dea5357cfde0762952c2a2bd.diff
LO
Author: John Brawn
Date: 2020-03-26T15:01:57Z
New Revision: 0cff81cff05d8e0a24391e3dec5b97174351ea55
URL:
https://github.com/llvm/llvm-project/commit/0cff81cff05d8e0a24391e3dec5b97174351ea55
DIFF:
https://github.com/llvm/llvm-project/commit/0cff81cff05d8e0a24391e3dec5b97174351ea55.diff
LOG: Ad
Thanks, I was about to fix that myself (I was sure I'd built and tested
everything before committing,
but it appears I failed somehow).
John
From: cfe-commits on behalf of Hans
Wennborg via cfe-commits
Sent: 25 March 2020 14:43
To: cfe-commits@lists.llvm.org
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