https://github.com/Stylie777 approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/139055
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@@ -1109,10 +1125,12 @@ class ProcessorAlias {
def : ProcessorModel<"generic", CortexA510Model, ProcessorFeatures.Generic,
[FeatureFuseAES, FeatureFuseAdrpAdd,
FeaturePostRAScheduler,
FeatureEnableSelectOptimize]>;
-def : ProcessorMod
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https://github.com/llvm/llvm-project/pull/137771
#137595 changed the behaviour for SIMD on ARM to ensure it is enabled and
disabled correctly depending on the options used by the user. In this, the
functionality to disable all features that depend on SIMD w
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@@ -781,6 +781,30 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
if (FPUKind == llvm::ARM::FK_FPV5_D16 || FPUKind ==
llvm::ARM::FK_FPV5_SP_D16)
Features.push_back("-mve.fp");
+ // If SIMD has been disabled and the selected FPU support NEON, then feat
https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/137595
>From 2400745e8724ea8616f68899fb5b6a71a1cf522e Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Fri, 25 Apr 2025 14:57:40 +0100
Subject: [PATCH 1/4] [ARM][Driver] Ensure NEON is enabled and Disabled
correctly
@@ -803,12 +830,25 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
llvm::find_if(llvm::reverse(Features), [](const StringRef F) {
return F.contains("crypto") || F.contains("aes");
});
- const bool FoundSHA2 = ItSHA2 != Features.rend();
-
https://github.com/Stylie777 commented:
Thanks for the review @sivan-shani! I have made some updates based on your
comments.
https://github.com/llvm/llvm-project/pull/137595
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@@ -803,12 +830,25 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
llvm::find_if(llvm::reverse(Features), [](const StringRef F) {
return F.contains("crypto") || F.contains("aes");
});
- const bool FoundSHA2 = ItSHA2 != Features.rend();
-
@@ -781,6 +781,30 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
if (FPUKind == llvm::ARM::FK_FPV5_D16 || FPUKind ==
llvm::ARM::FK_FPV5_SP_D16)
Features.push_back("-mve.fp");
+ // If SIMD has been disabled and the selected FPU support NEON, then feat
@@ -803,12 +830,25 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
llvm::find_if(llvm::reverse(Features), [](const StringRef F) {
return F.contains("crypto") || F.contains("aes");
});
- const bool FoundSHA2 = ItSHA2 != Features.rend();
-
@@ -781,6 +781,30 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
if (FPUKind == llvm::ARM::FK_FPV5_D16 || FPUKind ==
llvm::ARM::FK_FPV5_SP_D16)
Features.push_back("-mve.fp");
+ // If SIMD has been disabled and the selected FPU support NEON, then feat
@@ -781,6 +781,30 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
if (FPUKind == llvm::ARM::FK_FPV5_D16 || FPUKind ==
llvm::ARM::FK_FPV5_SP_D16)
Features.push_back("-mve.fp");
+ // If SIMD has been disabled and the selected FPU support NEON, then feat
@@ -803,12 +830,25 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
llvm::find_if(llvm::reverse(Features), [](const StringRef F) {
return F.contains("crypto") || F.contains("aes");
});
- const bool FoundSHA2 = ItSHA2 != Features.rend();
-
@@ -803,12 +830,25 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
llvm::find_if(llvm::reverse(Features), [](const StringRef F) {
return F.contains("crypto") || F.contains("aes");
});
- const bool FoundSHA2 = ItSHA2 != Features.rend();
-
@@ -781,6 +781,30 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
if (FPUKind == llvm::ARM::FK_FPV5_D16 || FPUKind ==
llvm::ARM::FK_FPV5_SP_D16)
Features.push_back("-mve.fp");
+ // If SIMD has been disabled and the selected FPU support NEON, then feat
https://github.com/Stylie777 edited
https://github.com/llvm/llvm-project/pull/137595
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>From 2400745e8724ea8616f68899fb5b6a71a1cf522e Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Fri, 25 Apr 2025 14:57:40 +0100
Subject: [PATCH 1/3] [ARM][Driver] Ensure NEON is enabled and Disabled
correctly
@@ -781,6 +781,30 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
if (FPUKind == llvm::ARM::FK_FPV5_D16 || FPUKind ==
llvm::ARM::FK_FPV5_SP_D16)
Features.push_back("-mve.fp");
+ // If SIMD has been disabled and the selected FPU support NEON, then feat
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https://github.com/llvm/llvm-project/pull/137595
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>From 2400745e8724ea8616f68899fb5b6a71a1cf522e Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Fri, 25 Apr 2025 14:57:40 +0100
Subject: [PATCH 1/2] [ARM][Driver] Ensure NEON is enabled and Disabled
correctly
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https://github.com/llvm/llvm-project/pull/137595
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https://github.com/Stylie777 created
https://github.com/llvm/llvm-project/pull/137595
In #130623 support was added for `+nosimd` in the clang driver. Following this
PR, it was discovered that, if NEONS is disabled in the command line, it did
not disable features that have NEON as a requirement
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https://github.com/llvm/llvm-project/pull/130623
>From 978d9a153f9c5a98f6c20b94281f1acd02ecae4e Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Fri, 7 Mar 2025 15:51:34 +
Subject: [PATCH 1/9] [NFC][ARM] Split SIMD identifier away from MVE
Previously, t
https://github.com/Stylie777 edited
https://github.com/llvm/llvm-project/pull/130623
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https://github.com/Stylie777 commented:
Thanks @davemgreen for the review.
https://github.com/llvm/llvm-project/pull/130623
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@@ -419,6 +419,9 @@ Bug Fixes to Attribute Support
- No longer crashing on ``__attribute__((align_value(N)))`` during template
instantiation when the function parameter type is not a pointer or reference.
(#GH26612)
+- The ``+nosimd`` attribute is now fully supported for AA
https://github.com/Stylie777 edited
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Stylie777 wrote:
I have rebased this now after #134612 has been merged. This PR is only now
looking at enabling +nosimd for ARM targets.
https://github.com/llvm/llvm-project/pull/130623
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https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/130623
>From 978d9a153f9c5a98f6c20b94281f1acd02ecae4e Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Fri, 7 Mar 2025 15:51:34 +
Subject: [PATCH 1/8] [NFC][ARM] Split SIMD identifier away from MVE
Previously, t
Stylie777 wrote:
> But as we currently have the special cases for Windows/Darwin here, I would
> rather prefer to not touch that within this change, but do such cleanup in a
> later separate PR.
+1 to this, I agree this should be done in a separate patch.
Thanks all for your reviews.
https://
https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/134612
>From a5b81d22fef03a87f37b9f7c461f464a1c245df4 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Fri, 7 Mar 2025 15:49:00 +
Subject: [PATCH 1/5] [Clang] [ARM] Ensure FPU Features are collected when
using t
@@ -38,6 +38,9 @@ Potentially Breaking Changes
- Fix missing diagnostics for uses of declarations when performing typename
access,
such as when performing member access on a '[[deprecated]]' type alias.
(#GH58547)
+- For ARM targets, when using cc1as, the features included
https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/134612
>From a5b81d22fef03a87f37b9f7c461f464a1c245df4 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Fri, 7 Mar 2025 15:49:00 +
Subject: [PATCH 1/4] [Clang] [ARM] Ensure FPU Features are collected when
using t
@@ -463,6 +466,7 @@ X86 Support
Arm and AArch64 Support
^^^
+- For ARM targets, cc1as now considers the FPU's features for the selected CPU
or Arch.
Stylie777 wrote:
Done
https://github.com/llvm/llvm-project/pull/134612
_
@@ -0,0 +1,8 @@
+// Ensure that we can assemble NEON by just specifying an armv7
+// Apple or Windows target.
+
+// REQUIRES: arm-registered-target
+// RUN: %clang -c -target armv7-apple-darwin -o /dev/null %s
+// RUN: %clang -c -target armv7-windows -o /dev/null %s
--
https://github.com/Stylie777 edited
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@@ -0,0 +1,8 @@
+// Ensure that we can assemble NEON by just specifying an armv7
+// Apple or Windows target.
+
+// REQUIRES: arm-registered-target
+// RUN: %clang -c -target armv7-apple-darwin -o /dev/null %s
+// RUN: %clang -c -target armv7-windows -o /dev/null %s
--
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@@ -0,0 +1,8 @@
+// Ensure that we can assemble NEON by just specifying an armv7
+// Apple or Windows target.
+
+// REQUIRES: arm-registered-target
+// RUN: %clang -c -target armv7-apple-darwin -o /dev/null %s
+// RUN: %clang -c -target armv7-windows -o /dev/null %s
--
Stylie777 wrote:
I have created https://github.com/llvm/llvm-project/pull/134612 so I will now
close this PR.
@DavidSpickett your comments for the Release Notes have been worked on in the
new PR.
https://github.com/llvm/llvm-project/pull/134366
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https://github.com/Stylie777 created
https://github.com/llvm/llvm-project/pull/134612
Previously, `cc1as` did not consider the Features that can be included from a
target's FPU. This could lead to a situation where assembly files could not
compile as cc1as did not know if a feature was support
https://github.com/Stylie777 edited
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https://github.com/Stylie777 commented:
Adding my review here so it can be tracked. I will make the changes in the PR I
will open today @mstorsjo so these changes can be merged.
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@@ -0,0 +1,31 @@
+// Ensures that when targeting an ARM target with an Asm file, clang
+// collects the features from the FPU. This is critical in the
+// activation of NEON for supported targets. The Cortex-R52 will be
+// used and tested for VFP and NEON Support
+
+// RUN: %clan
https://github.com/Stylie777 commented:
Thanks @davemgreen for the re-review. I have made some updated based on your
comments.
https://github.com/llvm/llvm-project/pull/130623
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Stylie777 wrote:
I think we close it and I will open a new PR under my name next week.
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@@ -659,13 +659,21 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
CPUArgFPUKind != llvm::ARM::FK_INVALID ? CPUArgFPUKind :
ArchArgFPUKind;
(void)llvm::ARM::getFPUFeatures(FPUKind, Features);
} else {
+bool Generic = true;
if (!ForAS) {
@@ -659,13 +659,21 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
CPUArgFPUKind != llvm::ARM::FK_INVALID ? CPUArgFPUKind :
ArchArgFPUKind;
(void)llvm::ARM::getFPUFeatures(FPUKind, Features);
} else {
+bool Generic = true;
if (!ForAS) {
@@ -659,13 +659,21 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
CPUArgFPUKind != llvm::ARM::FK_INVALID ? CPUArgFPUKind :
ArchArgFPUKind;
(void)llvm::ARM::getFPUFeatures(FPUKind, Features);
} else {
+bool Generic = true;
if (!ForAS) {
@@ -0,0 +1,31 @@
+// Ensures that when targeting an ARM target with an Asm file, clang
+// collects the features from the FPU. This is critical in the
+// activation of NEON for supported targets. The Cortex-R52 will be
+// used and tested for VFP and NEON Support
+
+// RUN: %clan
https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/130623
>From 8b2ad7c1475ff4aee065e9feb21469d184320472 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Fri, 7 Mar 2025 15:51:34 +
Subject: [PATCH 01/10] [NFC][ARM] Split SIMD identifier away from MVE
Previously,
https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/130623
>From 8b2ad7c1475ff4aee065e9feb21469d184320472 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Fri, 7 Mar 2025 15:51:34 +
Subject: [PATCH 1/9] [NFC][ARM] Split SIMD identifier away from MVE
Previously, t
@@ -38,6 +38,9 @@ Potentially Breaking Changes
- Fix missing diagnostics for uses of declarations when performing typename
access,
such as when performing member access on a '[[deprecated]]' type alias.
(#GH58547)
+- For ARM targets, when using cc1as, the features included
@@ -679,20 +679,18 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
CPUArgFPUKind != llvm::ARM::FK_INVALID ? CPUArgFPUKind :
ArchArgFPUKind;
(void)llvm::ARM::getFPUFeatures(FPUKind, Features);
} else {
-bool Generic = true;
-if (!ForAS) {
https://github.com/Stylie777 edited
https://github.com/llvm/llvm-project/pull/130623
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@@ -679,20 +679,18 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
CPUArgFPUKind != llvm::ARM::FK_INVALID ? CPUArgFPUKind :
ArchArgFPUKind;
(void)llvm::ARM::getFPUFeatures(FPUKind, Features);
} else {
-bool Generic = true;
-if (!ForAS) {
https://github.com/Stylie777 edited
https://github.com/llvm/llvm-project/pull/130623
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https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/130623
>From 8b2ad7c1475ff4aee065e9feb21469d184320472 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Fri, 7 Mar 2025 15:51:34 +
Subject: [PATCH 1/8] [NFC][ARM] Split SIMD identifier away from MVE
Previously, t
@@ -85,6 +85,9 @@ Changes to the AMDGPU Backend
Changes to the ARM Backend
--
+* The `+nosimd` attribute is now fully supported. Previously, this had no
effect when being used with
+AArch32 targets, however this will now disable NEON instructions being
https://github.com/Stylie777 created
https://github.com/llvm/llvm-project/pull/130623
`+simd` and `+nosimd` are used to emable or disable NEON Instructions
when compiling for AArch32 Targets. However, up until now, using these
has not been possible. To enable this, these options are mapped to th
Stylie777 wrote:
No worries 😀
If we remove `ARM::AEK_SIMD` is removed, the target will not be able to process
or generate NEON instructions. I have added it to all ArmV8-a (and beyond)
architectures and the Cortex-R52 CPU. This should cover all the Cortex-A and
Cortex-R targets that support i
Stylie777 wrote:
I have just pushed an update for the Unit Tests that should turn the CI green.
This is now ready for re-review @davemgreen
https://github.com/llvm/llvm-project/pull/130623
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https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/130623
>From 7c0b94752285f2734d79e9e8d38aa20b3f7e8e61 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Fri, 7 Mar 2025 15:51:34 +
Subject: [PATCH 1/7] [NFC][ARM] Split SIMD identifier away from MVE
Previously, t
https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/130623
>From 7c0b94752285f2734d79e9e8d38aa20b3f7e8e61 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Fri, 7 Mar 2025 15:51:34 +
Subject: [PATCH 1/4] [NFC][ARM] Split SIMD identifier away from MVE
Previously, t
https://github.com/Stylie777 edited
https://github.com/llvm/llvm-project/pull/130623
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https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/130623
>From 7c0b94752285f2734d79e9e8d38aa20b3f7e8e61 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Fri, 7 Mar 2025 15:51:34 +
Subject: [PATCH 1/6] [NFC][ARM] Split SIMD identifier away from MVE
Previously, t
@@ -334,8 +334,8 @@ ARM_CPU_NAME("cortex-r7", ARMV7R, FK_VFPV3_D16_FP16, false,
(ARM::AEK_MP | ARM::AEK_HWDIVARM))
ARM_CPU_NAME("cortex-r8", ARMV7R, FK_VFPV3_D16_FP16, false,
(ARM::AEK_MP | ARM::AEK_HWDIVARM))
-ARM_CPU_NAME("cortex-r52", ARMV8R, FK_NEO
@@ -334,8 +334,8 @@ ARM_CPU_NAME("cortex-r7", ARMV7R, FK_VFPV3_D16_FP16, false,
(ARM::AEK_MP | ARM::AEK_HWDIVARM))
ARM_CPU_NAME("cortex-r8", ARMV7R, FK_VFPV3_D16_FP16, false,
(ARM::AEK_MP | ARM::AEK_HWDIVARM))
-ARM_CPU_NAME("cortex-r52", ARMV8R, FK_NEO
https://github.com/Stylie777 edited
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@@ -334,8 +334,8 @@ ARM_CPU_NAME("cortex-r7", ARMV7R, FK_VFPV3_D16_FP16, false,
(ARM::AEK_MP | ARM::AEK_HWDIVARM))
ARM_CPU_NAME("cortex-r8", ARMV7R, FK_VFPV3_D16_FP16, false,
(ARM::AEK_MP | ARM::AEK_HWDIVARM))
-ARM_CPU_NAME("cortex-r52", ARMV8R, FK_NEO
https://github.com/Stylie777 commented:
Thanks for the comments @davemgreen. I need to do some more investigation here
as I think there is more going wrong than I initially thought after this change
is introduced.
https://github.com/llvm/llvm-project/pull/130623
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Stylie777 wrote:
The description is fixed. Thanks @DavidSpickett and @jthackray (I will publish
a commit to your improvements once I have a green CI so I know all is good).
https://github.com/llvm/llvm-project/pull/130623
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Stylie777 wrote:
Thanks @jthackray. The CI Failure seems to be unrelated.
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@@ -85,6 +85,9 @@ Changes to the AMDGPU Backend
Changes to the ARM Backend
--
+* The `+nosimd` attribute is now fully supported. Previously, this had no
effect when being used with
+AArch32 targets, however will now disable NEON instructions being gene
@@ -85,6 +85,9 @@ Changes to the AMDGPU Backend
Changes to the ARM Backend
--
+* The `+nosimd` attribute is now fully supported. Previously, this had no
effect when being used with
+AArch32 targets, however will now disable NEON instructions being gene
https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/130623
>From d6772d64ff6fd515621c073b6545c40e918893b5 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Fri, 7 Mar 2025 15:51:34 +
Subject: [PATCH 1/3] [NFC][ARM] Split SIMD identifier away from MVE
Previously, t
https://github.com/Stylie777 edited
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Stylie777 wrote:
I don't believe the above CI test failure to be related. This change targets
ARM. This is an unchanged architecture.
https://github.com/llvm/llvm-project/pull/124935
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@@ -1013,3 +1013,41 @@
// CHECK-MVE1_2: #define __ARM_FEATURE_MVE 1
// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve.fp -x c -E
-dM %s -o - | FileCheck -check-prefix=CHECK-MVE3 %s
// CHECK-MVE3: #define __ARM_FEATURE_MVE 3
+
+// Cortex-R52 and Cortex-R52Plus
https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/124935
>From 8da3a78692c4c0c4d4a47610d7b705f1a55f6f14 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Wed, 29 Jan 2025 15:19:46 +
Subject: [PATCH 1/4] [ARM] Ensure FPU Selection can select mode correctly
Previo
@@ -1013,3 +1013,19 @@
// CHECK-MVE1_2: #define __ARM_FEATURE_MVE 1
// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve.fp -x c -E
-dM %s -o - | FileCheck -check-prefix=CHECK-MVE3 %s
// CHECK-MVE3: #define __ARM_FEATURE_MVE 3
+
+// Cortex-R52 and Cortex-R52Plus
https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/124935
>From 8da3a78692c4c0c4d4a47610d7b705f1a55f6f14 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Wed, 29 Jan 2025 15:19:46 +
Subject: [PATCH 1/3] [ARM] Ensure FPU Selection can select mode correctly
Previo
https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/124935
>From 1b12ad277c63e707c1b4268fc46f942349bbb1d9 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Wed, 29 Jan 2025 15:19:46 +
Subject: [PATCH 1/2] [ARM] Ensure FPU Selection can select mode correctly
Previo
https://github.com/Stylie777 created
https://github.com/llvm/llvm-project/pull/124935
Previously, when selecting a Single Precision FPU, LLVM would ensure all
elements of the Candidate FPU matched the InputFPU that was given. However, for
cases such as Cortex-R52, there are FPU options where n
https://github.com/Stylie777 closed
https://github.com/llvm/llvm-project/pull/123028
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https://github.com/Stylie777 approved this pull request.
LGTM! Thanks
https://github.com/llvm/llvm-project/pull/123028
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https://github.com/Stylie777 commented:
Was there any tests that need changing/updating for this? If we don't have
tests for this it might be worth adding some.
https://github.com/llvm/llvm-project/pull/123028
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https://github.com/Stylie777 closed
https://github.com/llvm/llvm-project/pull/112171
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https://github.com/Stylie777 approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/113496
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@@ -799,6 +802,24 @@ bool CFI_Parser::parseFDEInstructions(A &addressSpace,
}
break;
+#if defined(_LIBUNWIND_TARGET_AARCH64)
+ case DW_CFA_AARCH64_negate_ra_state_with_pc: {
+int64_t value =
+results->savedRegisters[UNW_AARCH64_RA_SIGN_
@@ -833,8 +841,8 @@ def HasV9_5aOps : Architecture64<9, 5, "a", "v9.5a",
[HasV9_4aOps, FeatureCPA],
!listconcat(HasV9_4aOps.DefaultExts, [FeatureCPA, FeatureLUT,
FeatureFAMINMAX])>;
def HasV9_6aOps : Architecture64<9, 6, "a", "v9.6a",
- [HasV9_5aOps],
- !listconcat(HasV
https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/112171
>From a702473aacc6a9c47eb80b204ee3200c2ff2eb26 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Thu, 3 Oct 2024 14:20:10 +0100
Subject: [PATCH 1/6] [PAuthLR] Add support for FEAT_PAuth_LR to libunwind
This in
https://github.com/Stylie777 reopened
https://github.com/llvm/llvm-project/pull/112341
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Stylie777 wrote:
It might be worth splitting each feature into its own commit rather than one
big commit, it makes the review easier. Currently it's difficult to determine
which section belongs to which feature.
https://github.com/llvm/llvm-project/pull/112341
_
https://github.com/Stylie777 closed
https://github.com/llvm/llvm-project/pull/112341
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