[PATCH] D151439: [Clang][SVE2.1] Add builtins for 2-way svdot (vectors, indexed)

2023-10-18 Thread Dinar Temirbulatov via Phabricator via cfe-commits
dtemirbulatov accepted this revision. dtemirbulatov added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D151439/new/ https://reviews.llvm.org/D151439

[PATCH] D151439: [Clang][SVE2.1] Add builtins for 2-way svdot (vectors, indexed)

2023-10-18 Thread Dinar Temirbulatov via Phabricator via cfe-commits
dtemirbulatov added inline comments. Comment at: clang/test/Sema/aarch64-sve2p1-intrinsics/acle_sve2p1_imm.cpp:112 + svfloat32_t f32, svfloat16_t f16) { + svdot_lane_s32_s16_s16(s32, s16, s16, 1); // expected-error {{argument value 4 is outside the vali

[PATCH] D151439: [Clang][SVE2.1] Add builtins for 2-way svdot (vectors, indexed)

2023-10-18 Thread Dinar Temirbulatov via Phabricator via cfe-commits
dtemirbulatov added inline comments. Comment at: clang/test/Sema/aarch64-sve2p1-intrinsics/acle_sve2p1_imm.cpp:112 + svfloat32_t f32, svfloat16_t f16) { + svdot_lane_s32_s16_s16(s32, s16, s16, 1); // expected-error {{argument value 4 is outside the vali

[PATCH] D151199: [Clang][SVE2.1] Add pfalse builtin

2023-10-18 Thread Dinar Temirbulatov via Phabricator via cfe-commits
dtemirbulatov accepted this revision. dtemirbulatov added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D151199/new/ https://reviews.llvm.org/D151199

[PATCH] D151307: [Clang][SVE2.1] Add svwhile (predicate-as-counter) builtins

2023-05-31 Thread Dinar Temirbulatov via Phabricator via cfe-commits
dtemirbulatov added inline comments. Comment at: clang/include/clang/Basic/arm_sve.td:2129 +def SVWHILEGE_COUNT : SInst<"svwhilege_{d}", "}lli", "QcQsQiQl", MergeNone, "aarch64_sve_whilege_{d}", [IsOverloadNone], [ImmCheck<2, ImmCheck2_4_Mul2>]>; +def SVWHILEGT_COUNT : SIns

[PATCH] D151709: [Clang][SVE2.1] Add builtins for svrevd

2023-05-31 Thread Dinar Temirbulatov via Phabricator via cfe-commits
dtemirbulatov accepted this revision. dtemirbulatov added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D151709/new/ https://reviews.llvm.org/D151709

[PATCH] D123303: [Clang][AArch64][SVE] Add shift operators for SVE vector types

2022-04-08 Thread Dinar Temirbulatov via Phabricator via cfe-commits
dtemirbulatov added a comment. LGTM, Any remarks from others? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D123303/new/ https://reviews.llvm.org/D123303 ___ cfe-commits mailing list cfe-commits@lists.llv

[PATCH] D33406: PR28129 expand vector oparation to an IR constant.

2017-06-15 Thread Dinar Temirbulatov via Phabricator via cfe-commits
dtemirbulatov updated this revision to Diff 102717. dtemirbulatov added a comment. Update formatting, comments https://reviews.llvm.org/D33406 Files: lib/CodeGen/CGBuiltin.cpp test/CodeGen/avx-builtins.c Index: test/CodeGen/avx-builtins.c ===

[PATCH] D33406: PR28129 expand vector oparation to an IR constant.

2017-06-15 Thread Dinar Temirbulatov via Phabricator via cfe-commits
dtemirbulatov updated this revision to Diff 102673. dtemirbulatov added a reviewer: hfinkel. dtemirbulatov added a comment. Update after http://lists.llvm.org/pipermail/llvm-dev/2017-June/114120.html. Added 0x1b(_CMP_FALSE_OS), 0x1f(_CMP_TRUE_US) handling. https://reviews.llvm.org/D33406 Files

[PATCH] D33406: PR28129 expand vector oparation to an IR constant.

2017-06-05 Thread Dinar Temirbulatov via Phabricator via cfe-commits
dtemirbulatov added a comment. Ping. [andrew.w.kaylor, scanon] Is it OK to assume that FP exceptions are off by default and allow such transformation to constants in the IR since we know that we would have exception with "1.00 -nan" for _mm256_cmp_ps(a, b, 15)? https://reviews.llvm.org/D3340

[PATCH] D33406: PR28129 expand vector oparation to an IR constant.

2017-05-31 Thread Dinar Temirbulatov via Phabricator via cfe-commits
dtemirbulatov added a comment. > We should've asked this first: is that fold allowed in the default FPENV > state that we assume that clang is operating in? I suppose it is FE_ALL_EXCEPT. https://reviews.llvm.org/D33406 ___ cfe-commits mailing lis

[PATCH] D33406: PR28129 expand vector oparation to an IR constant.

2017-05-24 Thread Dinar Temirbulatov via Phabricator via cfe-commits
dtemirbulatov added a comment. > Should we handle the 'pd256' version the same way? > How about the 0xb ('false') constant? It should produce a zero here? > Can or should we deal with the signalling versions (0x1b, 0x1f) too? hm looks like 0xb(_CMP_FALSE_OQ) is ordered, so it is not possible and

[PATCH] D33406: PR28129 expand vector oparation to an IR constant.

2017-05-24 Thread Dinar Temirbulatov via Phabricator via cfe-commits
dtemirbulatov updated this revision to Diff 100089. dtemirbulatov added a comment. add _mm256_cmp_pd double version add comments in lib/CodeGen/CGBuiltin.cpp replaced 0xf to _CMP_TRUE_UQ in avx-builtins.c https://reviews.llvm.org/D33406 Files: lib/CodeGen/CGBuiltin.cpp test/CodeGen/avx-buil