https://github.com/MacDue updated
https://github.com/llvm/llvm-project/pull/160905
>From 33dc84e9a4402b8fa19185654d946006561e534c Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell
Date: Fri, 26 Sep 2025 14:06:56 +
Subject: [PATCH 1/2] [libunwind] Call `__arm_za_disable` before entering EH
Th
https://github.com/MacDue created
https://github.com/llvm/llvm-project/pull/160905
This is done by defining ` __arm_za_disable` as a weak symbol with the
assumption that if libunwind is being linked against SME-aware code, the ABI
routines will be provided (by libgcc or compiler-rt).
>From 33
@@ -3976,6 +3976,9 @@ def warn_sme_streaming_pass_return_vl_to_non_streaming :
Warning<
"%select{returning|passing}0 a VL-dependent argument %select{from|to}0 a
function with a different"
" streaming-mode is undefined behaviour when the streaming and non-streaming
vector
MacDue wrote:
Note: Failing tests are:
```
FAIL: lldb-api::TestVectorOfVectorsFromStdModule.py
FAIL: lldb-api::TestDbgInfoContentVectorFromStdModule.py
```
Which appear unrelated (and failing on other PRs too).
https://github.com/llvm/llvm-project/pull/158120
https://github.com/MacDue updated
https://github.com/llvm/llvm-project/pull/158120
>From 6f14b6da1355898c070e4bf836ca05974d65b5a7 Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell
Date: Thu, 11 Sep 2025 14:51:51 +
Subject: [PATCH 1/6] [ADT] Add and use (for AArch64) `ValueWithSentinel`
This
https://github.com/MacDue updated
https://github.com/llvm/llvm-project/pull/158120
>From 6f14b6da1355898c070e4bf836ca05974d65b5a7 Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell
Date: Thu, 11 Sep 2025 14:51:51 +
Subject: [PATCH 1/9] [ADT] Add and use (for AArch64) `ValueWithSentinel`
This
MacDue wrote:
> > That looks like a slightly less general version of this class, so
> > UnsignedOrNone could be implemented as `UnsignedOrNone =
> > ValueOrSentinel`.
>
> Actually could not. Some `UnsignedOrNone` values are stored in bit-fields
> which are less then 32 bits, so the sentinel i
https://github.com/MacDue updated
https://github.com/llvm/llvm-project/pull/158120
>From 6f14b6da1355898c070e4bf836ca05974d65b5a7 Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell
Date: Thu, 11 Sep 2025 14:51:51 +
Subject: [PATCH 1/5] [ADT] Add and use (for AArch64) `ValueWithSentinel`
This
@@ -0,0 +1,86 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apac
https://github.com/MacDue updated
https://github.com/llvm/llvm-project/pull/158120
>From 6f14b6da1355898c070e4bf836ca05974d65b5a7 Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell
Date: Thu, 11 Sep 2025 14:51:51 +
Subject: [PATCH 1/8] [ADT] Add and use (for AArch64) `ValueWithSentinel`
This
https://github.com/MacDue updated
https://github.com/llvm/llvm-project/pull/158120
>From 6f14b6da1355898c070e4bf836ca05974d65b5a7 Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell
Date: Thu, 11 Sep 2025 14:51:51 +
Subject: [PATCH 1/7] [ADT] Add and use (for AArch64) `ValueWithSentinel`
This
https://github.com/MacDue approved this pull request.
Generally LGTM (mainly looking at the MLIR side), just a few final comments:
https://github.com/llvm/llvm-project/pull/154761
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@@ -6,49 +6,55 @@
#include
-// CHECK-C-LABEL: define dso_local i64 @test_svcntsb(
+// CHECK-C-LABEL: define dso_local range(i64 0, -9223372036854775808) i64
@test_svcntsb(
MacDue wrote:
Do you know where these range attributes have come from? From the lang
@@ -14,6 +14,21 @@
namespace mlir::arm_sme {
+unsigned getSizeInBytes(TypeSize type) {
+ switch (type) {
+ case arm_sme::TypeSize::Byte:
+return 1;
+ case arm_sme::TypeSize::Half:
+return 2;
+ case arm_sme::TypeSize::Word:
+return 4;
+ case arm_sme::TypeSize:
@@ -937,6 +940,26 @@ bool AArch64DAGToDAGISel::SelectRDVLImm(SDValue N, SDValue
&Imm) {
return false;
}
+// Given cntsd = (rdsvl, #1) >> 3, attempt to return a suitable multiplier
+// for RDSVL to calculate the streaming vector length in bytes * N. i.e.
+// rdsvl, #(ShlIm
@@ -6,49 +6,55 @@
#include
-// CHECK-C-LABEL: define dso_local i64 @test_svcntsb(
+// CHECK-C-LABEL: define dso_local range(i64 0, -9223372036854775808) i64
@test_svcntsb(
MacDue wrote:
I think you're right... I just read `range(i64 0, -9223372036854775808
@@ -937,6 +940,26 @@ bool AArch64DAGToDAGISel::SelectRDVLImm(SDValue N, SDValue
&Imm) {
return false;
}
+// Given cntsd = (rdsvl, #1) >> 3, attempt to return a suitable multiplier
+// for RDSVL to calculate the streaming vector length in bytes * N. i.e.
+// rdsvl, #(ShlIm
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https://github.com/llvm/llvm-project/pull/154761
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@@ -822,16 +822,18 @@ struct OuterProductWideningOpConversion
}
};
-/// Lower `arm_sme.streaming_vl` to SME CNTS intrinsics.
+/// Lower `arm_sme.streaming_vl` to SME CNTSD intrinsic.
///
/// Example:
///
/// %0 = arm_sme.streaming_vl
///
/// is converted to:
///
-/
@@ -2825,13 +2825,7 @@ AArch64TTIImpl::instCombineIntrinsic(InstCombiner &IC,
case Intrinsic::aarch64_sve_cntb:
return instCombineSVECntElts(IC, II, 16);
case Intrinsic::aarch64_sme_cntsd:
-return instCombineSMECntsElts(IC, II, 2, ST);
- case Intrinsic::aarch64_sme
@@ -937,6 +940,23 @@ bool AArch64DAGToDAGISel::SelectRDVLImm(SDValue N, SDValue
&Imm) {
return false;
}
+template
+bool AArch64DAGToDAGISel::SelectRDSVLShiftImm(SDValue N, SDValue &Imm) {
+ if (!isa(N))
+return false;
+
MacDue wrote:
Could you add a
https://github.com/MacDue edited
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https://github.com/MacDue commented:
A few little comments:
https://github.com/llvm/llvm-project/pull/154761
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@@ -4918,6 +4919,31 @@ Value
*CodeGenFunction::EmitAArch64SMEBuiltinExpr(unsigned BuiltinID,
// Handle builtins which require their multi-vector operands to be swapped
swapCommutativeSMEOperands(BuiltinID, Ops);
+ auto isCntsBuiltin = [&](int64_t &Mul) {
+switch (Bui
https://github.com/MacDue closed
https://github.com/llvm/llvm-project/pull/144368
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https://github.com/llvm/llvm-project/pull/144368
>From 2b50682f230efa03c3b9a1f5c5e48e708734bf4d Mon Sep 17 00:00:00 2001
From: Roman A <121314722+gamero...@users.noreply.github.com>
Date: Mon, 16 Jun 2025 15:59:01 +0100
Subject: [PATCH] A couple of grammar fixes
https://github.com/MacDue approved this pull request.
LGTM, will merge if CI passes
https://github.com/llvm/llvm-project/pull/144368
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>From c4d1c6dad4edd2ce1263de982f141519346621bc Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell
Date: Tue, 12 Aug 2025 08:27:47 +
Subject: [PATCH 1/2] [libunwind] Add support for the AArch64 "Vector Granule"
@@ -1895,11 +1907,27 @@ inline bool Registers_arm64::validRegister(int regNum)
const {
return false;
if (regNum == UNW_AARCH64_RA_SIGN_STATE)
return true;
+ if (regNum == UNW_AARCH64_VG)
+return true;
if ((regNum > 32) && (regNum < 64))
return false;
https://github.com/MacDue created
https://github.com/llvm/llvm-project/pull/153565
The vector granule (AArch64 DWARF register 46) is a pseudo-register that
contains the available size in bits of SVE vector registers in the current call
frame, divided by 64. The vector granule can be used in DW
https://github.com/MacDue closed
https://github.com/llvm/llvm-project/pull/150917
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This is handled by the instcombine added in #147930; there is no need for any
clang-specific folding. NFC as all clang tests for `__arm_in_streaming_mode()`
used -O1, which applies the LLVM instcombines.
>From
@@ -0,0 +1,54 @@
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme
-fsyntax-only -verify %s
+
+#include
+
+void test_streaming(svint32_t *out, svint32_t *in) __arm_streaming {
+ *out = *in;
+}
+
+void test_non_streaming(svint32_t *out, svint32_t *in) {
+
https://github.com/MacDue approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/150592
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@@ -5988,11 +5988,9 @@ bool clang::IsArmStreamingFunction(const FunctionDecl
*FD,
if (FD->hasAttr())
return true;
- if (const Type *Ty = FD->getType().getTypePtrOrNull())
MacDue wrote:
> operator-> that returns the Type* has an explicit assert tha
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@@ -5988,11 +5988,9 @@ bool clang::IsArmStreamingFunction(const FunctionDecl
*FD,
if (FD->hasAttr())
return true;
- if (const Type *Ty = FD->getType().getTypePtrOrNull())
MacDue wrote:
> If for example, I were to call FD->dump() in this function,
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@@ -0,0 +1,31 @@
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme
-fsyntax-only -verify %s
+
+#include
+
+void test_streaming(svint32_t *out, svint32_t *in) __arm_streaming {
+ *out = *in;
+}
+
+void test_non_streaming(svint32_t *out, svint32_t *in) {
+
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Thanks! LGTM!
https://github.com/llvm/llvm-project/pull/146453
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@@ -34,6 +34,7 @@ page](https://llvm.org/releases/).
* -floop-interchange is now recognized by flang.
* -floop-interchange is enabled by default at -O2 and above.
+* -fveclib=libmvec is supported for AArch64 (same as Flang/x86 and
Clang/AArch64)
MacDue wrote:
https://github.com/MacDue commented:
You may also want to change `Options.td` currently the note about needing GLIBC
2.40 is only displayed for Clang as it's under `
HelpTextForVariants<[ClangOption, CC1Option]`:
https://github.com/llvm/llvm-project/blob/cb806510914ed909b934d285062a9efb13b1cea4
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https://github.com/MacDue commented:
I double-checked the functions added cover up to 2.40 -- I think they do :+1::
Generally, LGTM -- but I'll leave final approval to Sander/Paul.
https://github.com/llvm/llvm-project/pull/143696
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@@ -1360,8 +1360,15 @@ void
TargetLibraryInfoImpl::addVectorizableFunctionsFromVecLib(
addVectorizableFunctions(VecFuncs_DarwinLibSystemM);
break;
}
- case LIBMVEC_X86: {
-addVectorizableFunctions(VecFuncs_LIBMVEC_X86);
+ case LIBMVEC: {
+switch (TargetTrip
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LGTM, thanks :+1:
https://github.com/llvm/llvm-project/pull/138262
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LGTM, thanks :+1:
There's one other use of "LIBMVEC" in flang that looks suspicious, but I've not
check if it's actually an issue:
https://github.com/llvm/llvm-project/blob/d6dbe7799e638702309e23fc7b73d4be2231e2ac/flang/lib/Frontend/Compil
@@ -934,7 +934,7 @@ void tools::addLTOOptions(const ToolChain &ToolChain, const
ArgList &Args,
std::optional OptVal =
llvm::StringSwitch>(ArgVecLib->getValue())
.Case("Accelerate", "Accelerate")
-.Case("LIBMVEC", "LIBMVEC-X86")
+
@@ -934,7 +934,7 @@ void tools::addLTOOptions(const ToolChain &ToolChain, const
ArgList &Args,
std::optional OptVal =
llvm::StringSwitch>(ArgVecLib->getValue())
.Case("Accelerate", "Accelerate")
-.Case("LIBMVEC", "LIBMVEC-X86")
+
@@ -0,0 +1,8530 @@
+//===-- AArch64.cpp - Emit LLVM Code for builtins
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: A
https://github.com/MacDue approved this pull request.
https://github.com/llvm/llvm-project/pull/132310
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MacDue wrote:
> This makes a lot of sense to me, just wondering why you chose
> `clang/lib/CodeGen/BuiltinTargets/` rather than
> `clang/lib/CodeGen/TargetBuiltins/`? The former shounds like it contains the
> list of all builtin targets, rather than the codegen for target-specific
> builtins.
https://github.com/MacDue approved this pull request.
https://github.com/llvm/llvm-project/pull/133375
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@@ -0,0 +1,8530 @@
+//===-- AArch64.cpp - Emit LLVM Code for builtins
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: A
MacDue wrote:
Thanks for the report :+1: It looks like all we have to do is set the
legalization rule for f32 to "Promote". Looks like there's actually already
logic to do this for a bunch of other nodes:
>From X86ISelLowering.cpp:
```c++
// On 32 bit MSVC, `fmodf(f32)` is not defined - only
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Reverts
https://github.com/llvm/llvm-project/commit/c40f0fe4348bb9304b95bd317665bf1cb2bdcc85
Original description:
This updates the existing modf[f|l] builtin to be lowered via the llvm.modf.*
intrinsic (rather
https://github.com/MacDue approved this pull request.
LGTM too, and lines up with the ACLE update + sysreg spec.
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https://github.com/MacDue created
https://github.com/llvm/llvm-project/pull/129885
Reverts llvm/llvm-project#127987
Original description:
This updates the existing modf[f|l] builtin to be lowered via the llvm.modf.*
intrinsic (rather than directly to a library call).
The legalization issues e
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MacDue wrote:
I think with the `AllowMisalignedMemAccesses` check (preventing this applying
when `+strict-align` is set) this _probably_ okay. The `LDR ZPR` notes:
> The load is performed as contiguous byte accesses, with no endian conversion
> and no guarantee of single-copy atomicity larger
https://github.com/MacDue updated
https://github.com/llvm/llvm-project/pull/127065
>From a9631573a2b6d26e8b41de67fac67247ce0b0829 Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell
Date: Thu, 13 Feb 2025 14:23:33 +
Subject: [PATCH 1/2] [clang] Add `__builtin_sincospi` that lowers to
`llvm.sin
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Reverts llvm/llvm-project#126750
Revering while I investigate:
https://lab.llvm.org/buildbot/#/builders/72/builds/8406
>From e082cbf5fd4f889762e12062d2544f862339b959 Mon Sep 17 00:00:00 2001
From: Benjamin Max
MacDue wrote:
I think this patch should fix the issue:
https://github.com/llvm/llvm-project/pull/127895
https://github.com/llvm/llvm-project/pull/126750
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MacDue wrote:
> From this patch? https://lab.llvm.org/buildbot/#/builders/72/builds/8380
>
> FYI @fmayer
Looks like it, I had missed it in the log but the actual error is:
> ExpandFloatResult #0: t57: ppcf128,ppcf128 = fmodf
> ConstantFP:ppcf128,
> llvm-project/compiler-rt/lib/msan/tests/msan
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MacDue wrote:
> I'm a hard no on making this a target dependent option. Just enable it
> unconditionally and take the regression
Fine, I don't mind the regression as it does not affect targets I work on, I
just wanted to make the changes needed for AArch64 without knowingly slightly
regressin
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https://github.com/llvm/llvm-project/pull/121763
>From 42b096396f36adc6f1ad34de263a80dd7e4e0960 Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell
Date: Mon, 6 Jan 2025 11:49:48 +
Subject: [PATCH 1/5] [clang] Lower non-builtin sincos[f|l] calls to
llvm.sincos
https://github.com/MacDue updated
https://github.com/llvm/llvm-project/pull/121763
>From 42b096396f36adc6f1ad34de263a80dd7e4e0960 Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell
Date: Mon, 6 Jan 2025 11:49:48 +
Subject: [PATCH 1/4] [clang] Lower non-builtin sincos[f|l] calls to
llvm.sincos
MacDue wrote:
I've pushed a change to restrict this to AArch64 (other targets could enable it
too) given no reply above, or progress on
https://github.com/llvm/llvm-project/pull/123787.
https://github.com/llvm/llvm-project/pull/121763
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https://github.com/MacDue edited
https://github.com/llvm/llvm-project/pull/121763
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https://github.com/MacDue updated
https://github.com/llvm/llvm-project/pull/121763
>From 42b096396f36adc6f1ad34de263a80dd7e4e0960 Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell
Date: Mon, 6 Jan 2025 11:49:48 +
Subject: [PATCH 1/3] [clang] Lower non-builtin sincos[f|l] calls to
llvm.sincos
MacDue wrote:
I've disabled the intrinsic lowering for both `sincos`/`sincospi` when strictfp
is enabled (and added a test for that).
I think I might need to cherry-pick the `sincos` fix onto the release 20.x
branch too.
https://github.com/llvm/llvm-project/pull/127065
__
https://github.com/MacDue updated
https://github.com/llvm/llvm-project/pull/126750
>From eee5bc815c4b6b7e5a18503959b2a2354d73058b Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell
Date: Tue, 11 Feb 2025 15:32:23 +
Subject: [PATCH 1/5] [clang] Lower modf builtin using `llvm.modf` intrinsic
Th
https://github.com/MacDue updated
https://github.com/llvm/llvm-project/pull/127065
>From f98f80df7b93722581c04d181eea4273d4f1 Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell
Date: Thu, 13 Feb 2025 14:23:33 +
Subject: [PATCH 1/2] [clang] Add `__builtin_sincospi` that lowers to
`llvm.sin
https://github.com/MacDue edited
https://github.com/llvm/llvm-project/pull/126750
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https://github.com/MacDue edited
https://github.com/llvm/llvm-project/pull/126750
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@@ -4096,6 +4114,15 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl
GD, unsigned BuiltinID,
case Builtin::BI__builtin_frexpf128:
case Builtin::BI__builtin_frexpf16:
return RValue::get(emitFrexpBuiltin(*this, E, Intrinsic::frexp));
+ case Builtin::BImodf:
+
MacDue wrote:
> So to handle this, we need different lowering in strictfp mode, probably to a
> "constrained" intrinsic.
I've updated the lowering to simply bail out when
`Builder.getIsFPConstrained()` set (which I think corresponds to `strictfp`).
So now in the `HAS_MAYTRAP` case the lowerin
https://github.com/MacDue updated
https://github.com/llvm/llvm-project/pull/126750
>From eee5bc815c4b6b7e5a18503959b2a2354d73058b Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell
Date: Tue, 11 Feb 2025 15:32:23 +
Subject: [PATCH 1/4] [clang] Lower modf builtin using `llvm.modf` intrinsic
Th
https://github.com/MacDue closed
https://github.com/llvm/llvm-project/pull/127183
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https://github.com/MacDue approved this pull request.
LGTM, thanks!
https://github.com/llvm/llvm-project/pull/127183
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https://github.com/MacDue edited
https://github.com/llvm/llvm-project/pull/127183
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