On Tue, 7 Jan 2025 13:07:03 GMT, Robbin Ehn wrote:
>> Hi please consider.
>>
>> This adds below to hs_err:
>>
>> Floating point state:
>> fcsr=1
>> Floating point registers:
>> f0=0x44a72000 | 1.84467e+19
>> f1=0x44a72000 | 1.84467e+19
>>
>> f31=0x44a72000 | 1.84467
On Tue, 7 Jan 2025 13:07:03 GMT, Robbin Ehn wrote:
>> Hi please consider.
>>
>> This adds below to hs_err:
>>
>> Floating point state:
>> fcsr=1
>> Floating point registers:
>> f0=0x44a72000 | 1.84467e+19
>> f1=0x44a72000 | 1.84467e+19
>>
>> f31=0x44a72000 | 1.84467
On Tue, 7 Jan 2025 13:07:03 GMT, Robbin Ehn wrote:
>> Hi please consider.
>>
>> This adds below to hs_err:
>>
>> Floating point state:
>> fcsr=1
>> Floating point registers:
>> f0=0x44a72000 | 1.84467e+19
>> f1=0x44a72000 | 1.84467e+19
>>
>> f31=0x44a72000 | 1.84467
> Hi please consider.
>
> This adds below to hs_err:
>
> Floating point state:
> fcsr=1
> Floating point registers:
> f0=0x44a72000 | 1.84467e+19
> f1=0x44a72000 | 1.84467e+19
>
> f31=0x44a72000 | 1.84467e+19
>
> Vector state:
> vstart=0x
> vl=0x0
On Mon, 30 Dec 2024 04:55:38 GMT, Fei Yang wrote:
>> Robbin Ehn has updated the pull request incrementally with two additional
>> commits since the last revision:
>>
>> - Review comments
>> - Make file fixes
>
> src/hotspot/os_cpu/linux_riscv/os_linux_riscv.cpp line 369:
>
>> 367: // No othe
> Hi please consider.
>
> This adds below to hs_err:
>
> Floating point state:
> fcsr=1
> Floating point registers:
> f0=0x44a72000 | 1.84467e+19
> f1=0x44a72000 | 1.84467e+19
>
> f31=0x44a72000 | 1.84467e+19
>
> Vector state:
> vstart=0x
> vl=0x0
On Fri, 20 Dec 2024 17:32:53 GMT, Robbin Ehn wrote:
>> Hi please consider.
>>
>> This adds below to hs_err:
>>
>> Floating point state:
>> fcsr=1
>> Floating point registers:
>> f0=0x44a72000 | 1.84467e+19
>> f1=0x44a72000 | 1.84467e+19
>>
>> f31=0x44a72000 | 1.8446
On Fri, 20 Dec 2024 17:32:53 GMT, Robbin Ehn wrote:
>> Hi please consider.
>>
>> This adds below to hs_err:
>>
>> Floating point state:
>> fcsr=1
>> Floating point registers:
>> f0=0x44a72000 | 1.84467e+19
>> f1=0x44a72000 | 1.84467e+19
>>
>> f31=0x44a72000 | 1.8446
On Fri, 20 Dec 2024 13:58:35 GMT, Magnus Ihse Bursie wrote:
>> Thanks, I'll test it.
>
> It is written untested so it might need some tweaking. My suggestion also
> incorporated (silently) the recommendation to rename $2RVV_FLAG to
> $2RVV_DEFINES. :)
I did a simpler version. Let me know :)
T
> Hi please consider.
>
> This adds below to hs_err:
>
> Floating point state:
> fcsr=1
> Floating point registers:
> f0=0x44a72000 | 1.84467e+19
> f1=0x44a72000 | 1.84467e+19
>
> f31=0x44a72000 | 1.84467e+19
>
> Vector state:
> vstart=0x
> vl=0x0
On Fri, 20 Dec 2024 13:22:45 GMT, Robbin Ehn wrote:
>> src/hotspot/os_cpu/linux_riscv/os_linux_riscv.cpp line 383:
>>
>>> 381: }
>>> 382:
>>> 383: // size = sizeof(struct __riscv_ctx_hdr) + sizeof(struct
>>> __sc_riscv_v_state) + riscv_v_vsize;
>>
>> no use?
>
> This is the kernel definit
On Fri, 20 Dec 2024 12:43:05 GMT, Hamlin Li wrote:
>> Hi please consider.
>>
>> This adds below to hs_err:
>>
>> Floating point state:
>> fcsr=1
>> Floating point registers:
>> f0=0x44a72000 | 1.84467e+19
>> f1=0x44a72000 | 1.84467e+19
>>
>> f31=0x44a72000 | 1.84467
On Fri, 20 Dec 2024 13:51:20 GMT, Robbin Ehn wrote:
>> Having different flags for the build and the target JVM is a bit more
>> tricky, but not impossible. You just need to "hålla tungan rätt i mun". :-)
>>
>> In `FLAGS_SETUP_CFLAGS_CPU_DEP`, you need to add something like:
>>
>> if test "x
On Fri, 20 Dec 2024 13:40:08 GMT, Magnus Ihse Bursie wrote:
>> `SVE_CFLAGS` is used to compile a separate library, libsleef. They do not
>> have an already prepared set of flags to use, as Hotspot do. (Hotspot is the
>> only library which has this, since it is magnitutes more complex than other
On Fri, 20 Dec 2024 13:26:33 GMT, Magnus Ihse Bursie wrote:
>> The flag is different for the build JVM and the JVM.
>> If I just set in configure time it seem like both OPENJDK_BUILD_JVM_CFLAGS
>> and JVM_CFLAGS have the flag.
>> Which is incorrect, as only OPENJDK_BUILD_JVM_CFLAGS in this case
On Fri, 20 Dec 2024 13:20:50 GMT, Robbin Ehn wrote:
>> make/hotspot/lib/CompileJvm.gmk line 139:
>>
>>> 137:
>>> 138: ifeq ($(call isTargetCpu, riscv64), true)
>>> 139: JVM_CFLAGS += $(RVV_CFLAGS)
>>
>> The new flag should be added to the JVM_CFLAGS at configure time. No need to
>> export i
On Fri, 20 Dec 2024 12:51:06 GMT, Hamlin Li wrote:
>> Hi please consider.
>>
>> This adds below to hs_err:
>>
>> Floating point state:
>> fcsr=1
>> Floating point registers:
>> f0=0x44a72000 | 1.84467e+19
>> f1=0x44a72000 | 1.84467e+19
>>
>> f31=0x44a72000 | 1.84467
On Fri, 20 Dec 2024 12:52:07 GMT, Magnus Ihse Bursie wrote:
>> Hi please consider.
>>
>> This adds below to hs_err:
>>
>> Floating point state:
>> fcsr=1
>> Floating point registers:
>> f0=0x44a72000 | 1.84467e+19
>> f1=0x44a72000 | 1.84467e+19
>>
>> f31=0x44a72000
On Fri, 20 Dec 2024 11:17:54 GMT, Robbin Ehn wrote:
> Hi please consider.
>
> This adds below to hs_err:
>
> Floating point state:
> fcsr=1
> Floating point registers:
> f0=0x44a72000 | 1.84467e+19
> f1=0x44a72000 | 1.84467e+19
>
> f31=0x44a72000 | 1.84467e+19
>
>
On Fri, 20 Dec 2024 11:17:54 GMT, Robbin Ehn wrote:
> Hi please consider.
>
> This adds below to hs_err:
>
> Floating point state:
> fcsr=1
> Floating point registers:
> f0=0x44a72000 | 1.84467e+19
> f1=0x44a72000 | 1.84467e+19
>
> f31=0x44a72000 | 1.84467e+19
>
>
On Fri, 20 Dec 2024 11:17:54 GMT, Robbin Ehn wrote:
> Hi please consider.
>
> This adds below to hs_err:
>
> Floating point state:
> fcsr=1
> Floating point registers:
> f0=0x44a72000 | 1.84467e+19
> f1=0x44a72000 | 1.84467e+19
>
> f31=0x44a72000 | 1.84467e+19
>
>
Hi please consider.
This adds below to hs_err:
Floating point state:
fcsr=1
Floating point registers:
f0=0x44a72000 | 1.84467e+19
f1=0x44a72000 | 1.84467e+19
f31=0x44a72000 | 1.84467e+19
Vector state:
vstart=0x
vl=0x0020
vtype=0x00
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