https://sourceware.org/bugzilla/show_bug.cgi?id=6957
Florian Weimer changed:
What|Removed |Added
CC||fweimer at redhat dot com
http://sourceware.org/bugzilla/show_bug.cgi?id=6957
H.J. Lu changed:
What|Removed |Added
CC||i at corradoroberto dot it
--- Comment #33 fr
http://sourceware.org/bugzilla/show_bug.cgi?id=6957
--- Comment #32 from cvs-commit at gcc dot gnu.org 2011-03-23 16:00:40 UTC ---
CVSROOT:/cvs/src
Module name:src
Branch: binutils-2_21-branch
Changes by:ging...@sourceware.org2011-03-23 16:00:21
Modified files:
http://sourceware.org/bugzilla/show_bug.cgi?id=6957
H.J. Lu changed:
What|Removed |Added
Status|REOPENED|RESOLVED
Resolution|
http://sourceware.org/bugzilla/show_bug.cgi?id=6957
--- Comment #30 from cvs-commit at gcc dot gnu.org 2011-02-08 20:21:30 UTC ---
CVSROOT:/cvs/src
Module name:src
Changes by:h...@sourceware.org2011-02-08 20:21:26
Modified files:
gas: ChangeLog
gas/config
http://sourceware.org/bugzilla/show_bug.cgi?id=6957
Jan Kratochvil changed:
What|Removed |Added
CC||jan.kratochvil at redhat
http://sourceware.org/bugzilla/show_bug.cgi?id=6957
Andreas Schwab changed:
What|Removed |Added
Status|RESOLVED|REOPENED
Resolution|FIXED
--- Additional Comments From hjl dot tools at gmail dot com 2010-08-11
22:04 ---
Fixed by
http://sourceware.org/ml/binutils-cvs/2010-08/msg00057.html
--
What|Removed |Added
--- Additional Comments From schwab at linux-m68k dot org 2010-07-01 15:27
---
What does that say about other vender's models?
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--- Additional Comments From hjl dot tools at gmail dot com 2010-06-23
14:36 ---
>From Intel IA32/Intel64 SDM:
The multi-byte form of NOP is available on processors with model encoding:
CPUID.01H.EAX[Bytes 11:8] = 0110B or B
Intel i686 has 111B.
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--- Additional Comments From schwab at linux-m68k dot org 2010-06-21 16:37
---
nopl is not always available on i686.
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--- Additional Comments From hjl dot tools at gmail dot com 2010-06-21
16:03 ---
-mtune uses all available instructions. By default, all instructions
are enabled.
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--- Additional Comments From schwab at linux-m68k dot org 2010-06-21 16:01
---
But the docs say that -mtune only uses non-generic insns when -march is also
given.
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--- Additional Comments From hjl dot tools at gmail dot com 2010-06-21
15:53 ---
(In reply to comment #20)
> I want that the assembler does not sneak in nopl.
Then you should use -mtune=i586 or an option not to
tune for i686.
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-
--- Additional Comments From schwab at linux-m68k dot org 2010-06-21 14:48
---
I want that the assembler does not sneak in nopl.
--
What|Removed |Added
Status|WA
--- Additional Comments From hjl dot tools at gmail dot com 2010-06-21
14:28 ---
(In reply to comment #18)
> That does not work for me.
>
> $ cat nopl.s
> cmove %eax,%edx
> .align 8
> $ as --32 -mtune=i686 nopl.s
> $ objdump -dr | grep nopl
>3: 0f 1f 44 00 00 nopl 0x
--- Additional Comments From schwab at linux-m68k dot org 2010-06-21 11:08
---
That does not work for me.
$ cat nopl.s
cmove %eax,%edx
.align 8
$ as --32 -mtune=i686 nopl.s
$ objdump -dr | grep nopl
3: 0f 1f 44 00 00 nopl 0x0(%eax,%eax,1)
$ as --32 -mtune=i686 -march=
--- Additional Comments From dsd at laptop dot org 2010-06-08 22:17 ---
Oops, sorry for the test case spam. I did not see your comment.
I understand now.
"as -mtune=i686" basically works out to be "as -march=i686 -mtune=i686"
Hence generating i686-specific instructions is acceptable/ex
--- Additional Comments From dsd at laptop dot org 2010-06-08 22:07 ---
Created an attachment (id=4837)
--> (http://sourceware.org/bugzilla/attachment.cgi?id=4837&action=view)
testcase3.s
One more. By deleting (more or less) random lines from testcase2.s I came up
with a 9-line test cas
--- Additional Comments From dsd at laptop dot org 2010-06-08 22:04 ---
Created an attachment (id=4836)
--> (http://sourceware.org/bugzilla/attachment.cgi?id=4836&action=view)
testcase2.s
Duh. The previous testcase.s was generated using "gcc -g" so its naturally
huge. Taking off the -g
--- Additional Comments From hjl dot tools at gmail dot com 2010-06-08
21:58 ---
(In reply to comment #12)
> Created an attachment (id=4835)
--> (http://sourceware.org/bugzilla/attachment.cgi?id=4835&action=view)
> testcase.s
>
Works for me:
[...@gnu-6 tmp]$ as -Qy -mtune=i686 -o foo
--- Additional Comments From dsd at laptop dot org 2010-06-08 21:53 ---
(In reply to comment #8)
> I agree. If it is true, assembler is broken. If you can show me
> a small testcase, I will fix it.
I can confirm the bug and I'd like to take you up on that offer, but I may have
fallen sho
--- Additional Comments From dsd at laptop dot org 2010-06-08 21:49 ---
Created an attachment (id=4835)
--> (http://sourceware.org/bugzilla/attachment.cgi?id=4835&action=view)
testcase.s
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--- Additional Comments From hjl dot tools at gmail dot com 2008-10-12
21:35 ---
This testcase works for me:
[EMAIL PROTECTED] tmp]$ cat nops.s
.text
nop:
movsbl %al,%esi
.p2align 4
[EMAIL PROTECTED] tmp]$ as --32 -o nops.o nops.s -march=i486 -mtune=i686
[EMAIL P
--- Additional Comments From hjl dot tools at gmail dot com 2008-10-12
21:30 ---
(In reply to comment #9)
> Sorry but how can PROCESSOR_UNKNOWN mean it can run any instructions? It's
> unknown! Therefore we must use lowest common denominator to expect it to work
> on
> all CPUs.
If we
--- Additional Comments From swanson at ukfsn dot org 2008-10-12 13:25
---
Sorry but how can PROCESSOR_UNKNOWN mean it can run any instructions? It's
unknown! Therefore we must use lowest common denominator to expect it to work on
all CPUs.
Tune means scheduling.
Arch means instructions
--- Additional Comments From hjl dot tools at gmail dot com 2008-10-12
12:45 ---
(In reply to comment #6)
> Created an attachment (id=2997)
--> (http://sourceware.org/bugzilla/attachment.cgi?id=2997&action=view)
> binutils-cvs-fix2-i386-nop.patch
>
> Add bitfield checking back to patch
--- Additional Comments From hjl dot tools at gmail dot com 2008-10-12
12:44 ---
(In reply to comment #6)
> Created an attachment (id=2997)
--> (http://sourceware.org/bugzilla/attachment.cgi?id=2997&action=view)
> binutils-cvs-fix2-i386-nop.patch
>
> Add bitfield checking back to patch
--- Additional Comments From swanson at ukfsn dot org 2008-10-12 10:20
---
Created an attachment (id=2997)
--> (http://sourceware.org/bugzilla/attachment.cgi?id=2997&action=view)
binutils-cvs-fix2-i386-nop.patch
Add bitfield checking back to patch for .arch settings.
First point, do y
--- Additional Comments From hjl dot tools at gmail dot com 2008-10-12
09:52 ---
By default, assembler assumes CPU takes all instructions supported
by assembler. You can use -march=XXX to limit instructions to only
those supported by XXX.
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--- Additional Comments From hjl dot tools at gmail dot com 2008-10-12
09:49 ---
(In reply to comment #3)
> But currently the only arch flags checked in i386_align_code was cpui686 which
> is where we should disable use of NOPL for mentioned reasons.
If you want to run the binary on CPU
--- Additional Comments From swanson at ukfsn dot org 2008-10-12 09:37
---
But currently the only arch flags checked in i386_align_code was cpui686 which
is where we should disable use of NOPL for mentioned reasons.
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http://sourceware.org/bugzilla/show_bug.cgi?id=6957
--- You
--- Additional Comments From hjl dot tools at gmail dot com 2008-10-11
23:47 ---
Arch may be changed by the .arch directive. However, when we
generate NOPs, we lost the .arch information. We need to know
the arch for NOP, which may not be necessarily the same as the
one specified by -mar
--- Additional Comments From swanson at ukfsn dot org 2008-10-11 14:28
---
Created an attachment (id=2995)
--> (http://sourceware.org/bugzilla/attachment.cgi?id=2995&action=view)
binutils-cvs-fix-i386-nop.patch
--
http://sourceware.org/bugzilla/show_bug.cgi?id=6957
--- You are
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