[Bug gas/18314] On ARM, data gets confused for instructions after ".align" directive

2015-05-13 Thread solrabizna at gmail dot com
https://sourceware.org/bugzilla/show_bug.cgi?id=18314 Solra Bizna changed: What|Removed |Added Status|WAITING |RESOLVED Resolution|---

[Bug gas/18347] On ARM, "LDR =something" with missing destination register is silently ignored

2015-04-29 Thread solrabizna at gmail dot com
https://sourceware.org/bugzilla/show_bug.cgi?id=18347 --- Comment #3 from Solra Bizna --- Ah! That explains what's happening. Just tried the patch. It works great. As far as adding some way to suppress the warning... Instruction set extensions mean that an acceptable symbol one day will cause a

[Bug gas/18347] New: On ARM, "LDR =something" with missing destination register is silently ignored

2015-04-28 Thread solrabizna at gmail dot com
Severity: normal Priority: P2 Component: gas Assignee: unassigned at sourceware dot org Reporter: solrabizna at gmail dot com Target Milestone: --- A simple test program that demonstrates this problem: MOV r1, r0 LDR =garbage // no destinatio

[Bug gas/18314] New: On ARM, data gets confused for instructions after ".align" directive

2015-04-23 Thread solrabizna at gmail dot com
ity: minor Priority: P2 Component: gas Assignee: unassigned at sourceware dot org Reporter: solrabizna at gmail dot com Created attachment 8265 --> https://sourceware.org/bugzilla/attachment.cgi?id=8265&action=edit A simple test file, demonstrating som

[Bug gas/18256] New: Internal error while assembling for ARM; assertion failure in encode_arm_cp_address

2015-04-12 Thread solrabizna at gmail dot com
Severity: minor Priority: P2 Component: gas Assignee: unassigned at sourceware dot org Reporter: solrabizna at gmail dot com I was attempting to assemble a PC-relative coprocessor load. While flailing around to find the right syntax, I happened on an assertion

[Bug gas/18198] On ARM, instruction and data endianness cannot differ

2015-04-04 Thread solrabizna at gmail dot com
https://sourceware.org/bugzilla/show_bug.cgi?id=18198 --- Comment #2 from Solra Bizna --- I can confirm that this works. (Yay!) Compiling with -EB and passing --be8 to ld results in little-endian instructions and big-endian data. I specifically tested that it correctly handles literal pools, and

[Bug gas/18198] New: On ARM, instruction and data endianness cannot differ

2015-04-03 Thread solrabizna at gmail dot com
Component: gas Assignee: unassigned at sourceware dot org Reporter: solrabizna at gmail dot com Flags: security- I'm working on a project targeting ARMv7-A processors with the E bit set. This execution environment has big-endian data and little-endian instructions