[Bug ld/32499] pr18841 test failure on riscv64-unknown-linux-gnu

https://sourceware.org/bugzilla/show_bug.cgi?id=32499 Palmer Dabbelt changed: What|Removed |Added CC||palmer at gcc dot gnu.org

[Bug gas/31396] New: Symbols referenced from ".if"/"==" end up in the symbol table

Severity: normal Priority: P2 Component: gas Assignee: unassigned at sourceware dot org Reporter: palmer at gcc dot gnu.org Target Milestone: --- Nathan and I were playing around with some odd behavior in dav1d and I've managed to reduce the test cas

[Bug ld/31318] RISC-V 32-bit relocations truncated silently

https://sourceware.org/bugzilla/show_bug.cgi?id=31318 Palmer Dabbelt changed: What|Removed |Added CC||palmer at gcc dot gnu.org Ever

[Bug ld/31179] RISC-V: The SET/ADD/SUB fix breaks ABI compatibility with 2.41 objects

https://sourceware.org/bugzilla/show_bug.cgi?id=31179 --- Comment #9 from Palmer Dabbelt --- (In reply to Nelson Chu from comment #8) > Created attachment 15270 [details] > proposed solution with the tag to keep compatible > > Updated to have a tag, this patch should be applied after the propose

[Bug ld/31179] RISC-V: The SET/ADD/SUB fix breaks ABI compatibility with 2.41 objects

https://sourceware.org/bugzilla/show_bug.cgi?id=31179 --- Comment #6 from Palmer Dabbelt --- (In reply to Andreas Schwab from comment #5) > There are a lot of SUB_ULEB128 relocations with a non-zero addend in > installed static archives that will change behaviour with this commit. > > $ readelf

[Bug ld/31179] RISC-V: The SET/ADD/SUB fix breaks ABI compatibility with 2.41 objects

https://sourceware.org/bugzilla/show_bug.cgi?id=31179 --- Comment #4 from Palmer Dabbelt --- (In reply to Palmer Dabbelt from comment #0) > 2029e13917d ("RISC-V: Clarify the behaviors of SET/ADD/SUB relocations.") I guess also a question for the distro folks, but are we sure this commit is actua

[Bug ld/31179] RISC-V: The SET/ADD/SUB fix breaks ABI compatibility with 2.41 objects

https://sourceware.org/bugzilla/show_bug.cgi?id=31179 --- Comment #3 from Palmer Dabbelt --- (In reply to David Abdurachmanov from comment #2) > To add some context here. Debian is using pre-2.42 bintuils, and GCC 13 > failed to build: > > [..] > riscv64-linux-gnu-gdc-12 -no-pie -lstdc++ -g -D

[Bug ld/31179] RISC-V: The SET/ADD/SUB fix breaks ABI compatibility with 2.41 objects

https://sourceware.org/bugzilla/show_bug.cgi?id=31179 --- Comment #1 from Palmer Dabbelt --- I opened for the psABI, but happy to hear if anyone has a better idea -- trying to keep around the bug tag is going to be a headache. -- Y

[Bug ld/31179] New: RISC-V: The SET/ADD/SUB fix breaks ABI compatibility with 2.41 objects

: normal Priority: P2 Component: ld Assignee: unassigned at sourceware dot org Reporter: palmer at gcc dot gnu.org Target Milestone: --- Nelson, David, and Aurelian have been poking this. There's no bug and everyone's in different time zones, thou

[Bug ld/30844] ld riscv: --emit-relocs does not retain the original relocation type

https://sourceware.org/bugzilla/show_bug.cgi?id=30844 --- Comment #3 from Palmer Dabbelt --- (In reply to Fangrui Song from comment #2) > (In reply to Palmer Dabbelt from comment #1) > > Nelson and I are just chatting about this. It's not intentional, but we > > also don't quite know what the ri

[Bug ld/30844] ld riscv: --emit-relocs does not retain the original relocation type

https://sourceware.org/bugzilla/show_bug.cgi?id=30844 Palmer Dabbelt changed: What|Removed |Added CC||palmer at gcc dot gnu.org

[Bug gas/30748] New: Missing Support for Zvkb (and other vector crypto 1.0.0-rc2 changes)

: normal Priority: P2 Component: gas Assignee: unassigned at sourceware dot org Reporter: palmer at gcc dot gnu.org Target Milestone: --- The vector crypto spec just bumped to 1.0.0-rc2, which has a handful of changes including a new extension. The release has

[Bug ld/24678] RISC-V pcrel relocs and abs global pointer variable

https://sourceware.org/bugzilla/show_bug.cgi?id=24678 Palmer Dabbelt changed: What|Removed |Added CC||palmer at gcc dot gnu.org

[Bug ld/30259] New: RISC-V: Assertion failed when trying to link from "code" section

ty: normal Priority: P2 Component: ld Assignee: unassigned at sourceware dot org Reporter: palmer at gcc dot gnu.org Target Milestone: --- I'm chasing down an internal user's bug report and stumbled into an LD assertion. I haven't looked any

[Bug gas/28863] two-argument .align is accepted for RISC-V but the alignment is not always preserved

https://sourceware.org/bugzilla/show_bug.cgi?id=28863 --- Comment #3 from Palmer Dabbelt --- We have the same problem with the third argument of .p2align. Not sure how we could do this without adding a new relocation. -- You are receiving this mail because: You are on the CC list for the bug.

[Bug gas/28863] two-argument .align is accepted for RISC-V but the alignment is not always preserved

https://sourceware.org/bugzilla/show_bug.cgi?id=28863 Palmer Dabbelt changed: What|Removed |Added CC||palmer at gcc dot gnu.org

[Bug gas/28733] RISC-V: Bad errors on fence.i and CSR ISA checking

https://sourceware.org/bugzilla/show_bug.cgi?id=28733 Palmer Dabbelt changed: What|Removed |Added Assignee|palmer at gcc dot gnu.org |patrick at rivosinc dot com

[Bug gas/28733] RISC-V: Bad errors on fence.i and CSR ISA checking

https://sourceware.org/bugzilla/show_bug.cgi?id=28733 Palmer Dabbelt changed: What|Removed |Added Assignee|palmer at dabbelt dot com |palmer at gcc dot gnu.org

[Bug ld/28789] RISC-V: ld resolves absolute symbols via PC-relative relocations for position-independent targets

https://sourceware.org/bugzilla/show_bug.cgi?id=28789 Palmer Dabbelt changed: What|Removed |Added Assignee|unassigned at sourceware dot org |palmer at gcc dot gnu.org

[Bug ld/28789] New: RISC-V: ld resolves absolute symbols via PC-relative relocations for position-independent targets

: NEW Severity: normal Priority: P2 Component: ld Assignee: unassigned at sourceware dot org Reporter: palmer at gcc dot gnu.org Target Milestone: --- Created attachment 13911 --> https://sourceware.org/bugzilla/attachment.cgi?id=13911&

[Bug binutils/28303] objdump crashes in riscv_elf_add_sub_reloc

https://sourceware.org/bugzilla/show_bug.cgi?id=28303 Palmer Dabbelt changed: What|Removed |Added CC||palmer at gcc dot gnu.org

[Bug ld/23244] RISC-V 64 relocation truncated to fit in case of undefined weak references

https://sourceware.org/bugzilla/show_bug.cgi?id=23244 Palmer Dabbelt changed: What|Removed |Added CC||palmer at gcc dot gnu.org

[Bug gas/22598] [RISCV] No way to disable two-instruction sequences for branch or relocation for jal instructions

https://sourceware.org/bugzilla/show_bug.cgi?id=22598 --- Comment #5 from Palmer Dabbelt --- (In reply to Jim Wilson from comment #4) > I would expect this to work > .option norelax > beq s1, s0, .+102 > bne a4, a5, .-4096 > jal a2, 1048574 > I get > <.L0 >: >

[Bug gas/22598] [RISCV] No way to disable two-instruction sequences for branch or relocation for jal instructions

https://sourceware.org/bugzilla/show_bug.cgi?id=22598 Palmer Dabbelt changed: What|Removed |Added CC||palmer at gcc dot gnu.org