I will try to fix before March 11.
Without new Avr-libc version.
Dmitry.
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Do not worry.
I will prepare a patch at the next week-end.
Regards,
Dmitry.
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01.07.2012 18:25, Dmitry:
I have check the speed with a set of bases and AVR types.
The number of MCU clocks is:
The value is 123456789L.
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:
[...]
Reasonable. I will consider a replacement.
Regards,
Dmitry.
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09.07.2012 08:56, Dmitry пишет:
Patch in progress.
I have continue the old #3729 patch.
Tarball is sended.
Changes are (in comparison to original):
1. ltoa() calls ultoa() (extra entry).
2. Small optimization: initialization of bits counter is
excluded (32*8=256).
3. This is debatable: run
counter is initialized only once.
The radix is checked at compile time. Nevertheless, the
full variants of utoa() and itoa() functions are leaved in
library for compatibility (if any uses it from asm).
If no objections, I will remove radix check from ltoa/ultoa
and commit both.
Dmitry
On Monday 26 September 2005 13:50, choo kok seng wrote:
> Dear All,
>I tried to compile a simple code using SIGNAL API for Attiny2313
> target, but I always hit the following warning: main.c:14: warning:
> `SIG_OVERFLOW1' appears to be a misspelled signal handler
[...]
This is named 'SIG_T
On Sunday 02 October 2005 23:21, Timothy Smith wrote:
> i'm learning the in's and out's of microcontroller programming, but i've
> run into a really fundamental problem. i get the following error when i
> attempt to use _BV to shift a shit and set port b pin 0 to output
>
> 4: undefined reference
On Thursday 13 October 2005 07:22, Eric Pasquier wrote:
> Dear All,
>
> I have implemented a 32-bits time information using the code below.
> Timer1 is incremented using internal clock, prescaler=1;
> SIG_OVERFLOW interrupt is used to increment a variable used to complete
> the 16-bits of Timer1.
>
On Thursday 13 October 2005 09:06, Eric wrote:
> Between the first TCNT1L read and the second, the counter is going to be
> incremented, so the comparison will failed each time, isn't it ?
[...]
> > I have implemented a 32-bits time information using the code below.
> > Timer1 is incremented using
Thanks for the detailed answer.
Dmitry.
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eplace
a part of library another if the author did not project such
replacement initially. 'libm' uses some assumptions of use
of registers to which does not follow 'libgcc'. Remember,
for example, about jump through stack in 'libm'!
Dmitry.
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> > I vote for something like itoa_fast() and have itoa() keeps its old
> > features.
> >
> > Bernard
>
> If anyone is counting votes then mine is to support Bernard, keep itoa as
> is but introduce a restricted replacement with a new name.
>
>
> Nigel
;sleep' in a combination to a disabling of interrupts, for example
for an emergency stop.)
Dmitry.
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like a good
> idea, but if someone more experienced can write the md rules, that would
> be great :)
It is very interesting idea.
Is it really possible to use this method for 'b' which is not
a power of 2 ? (Case of 'b is power of 2' is not interesting:
Gcc optimizes
o, it should not do harm to reasonable existing code,
> since sleep does not make much sense when executed with interrupts
> disabled. Unless the machine is to be securely halted.
Another common method is to set SE bit *after* 'sleep' instruction.
(The important
if (a == b) return a;
a = b;
} while (1);
works true:
.L2:
ld r18,Z
ldd r19,Z+1
cp r24,r18
cpc r25,r19
breq .L7
movw r24,r18
rjmp .L2
Regards,
Dmitry.
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24,r18
rjmp .L2
and after correction:
do {
b = *(volatile unsigned short *)addr;
if (a == b) return a;
a = b;
} while (1);
works true:
.L2:
ld r18,Z
ldd r19,Z+1
cp r24,r18
cpc r
-gcc and/or Avr-libc in future?
Thanks,
Dmitry.
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ldi r26,lo8(b)
ldi r27,hi8(b)
ld __tmp_reg__,X+
st Z+,__tmp_reg__
dec r18
brne .-8
adiw r24,5
sts (ap)+1,r25
sts ap,r24
Dmitry.
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a8__ ...).
This give a possibility to use the simple construction like
`#if __AVR__' which is false in case of undefined or 0.
Another advantage of such definition is a possibility
the simple loop at testing time, like:
for movw in 0 1 ; do
avr-gcc -D__AVR_HAVE_MOVW__=
ation is widely used in 'fplib').
But the announcement of the RAMPZ as a scratch attracts necessity
of its preservation for ISRs (when, for example, an external function
is called from ISR).
Regards,
Dmitry.
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ion, not AVR-specific.
It destroys EIND register. Is it a user's problem to save/restore
last in interrupts?
Possibly, I am wrong. Now I am not try this patch.
(Avr-gcc is not compiled: bug in configure/Makefile, ObjC is started).
Regards,
Dmitry.
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unsigned char i = Write;
Data[i++]=mydata;
Write= i & BUFF_SIZE;
}
Regards,
Dmitry.
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are work:
3.3.5, 3.4.4 - call of external signbit() function
4.0.2 - inline-code
Gcc-bugzilla: bug#30243.
Dmitry.
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746 744 840 814
Stack: 20202525 20202525
Time: 976 976 1024 1008 713 704 771 757
Dmitry.
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On Thursday 22 February 2007 04:37, Bruce D. Lightner wrote:
> Dmitry K. wrote:
> > Hi.
> >
> > I have compile CVS version avr-libc (2007-02-20)
> > with for different compilers.
> > Results are below.
[...]
> I assume that the "Flash" and "Stack
4,r28
mov r25,r29
adiw r24,1
rcall foo
subi r17,lo8(-(1))
brne .L3
subi r16,lo8(-(1))
.L2:
ldi r17,lo8(1)
rjmp .L3
/* epilogue: frame size=4 */
/* epilogue: noreturn */
Dmitry.
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On Wednesday 07 March 2007 04:10, Eric Weddington wrote:
[...]
> It seems that when compiling to assembler (-S as Dmitry recommends above),
> then you'll note that the epilogue is set to noreturn, which also ends up
> taking out the final breq of the outer loop, as there is nothing
s started with pushing r16,17,28,29 into stack
- stack pointer is not loaded to SP ports, it is modifyed
All of this is absent in my disassembler result.
Are you use non-pure avr-gcc 4.1.1 ?
And can somebody to compile this example?
Dmitry.
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ep 2006.
See: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=28386
I have try the file of this bug from GCC testsuite: 20060905-1.c
Avr-gcc 4.1.1 (pure release) gives incorrect result. More,
this result is depended of RAM start address, i.e. it may
be different for different chips.
Avr
o correct this, it is necessary to test
all cases: we have libc functions which use a floating arith.
Dmitry.
P.S. Robert, place '-lm' after all object files to avoid error.
If this will not help, try: '-lm -lc -lm'.
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It is interesting, what was a reason to declare
default char as signed for AVR port?
Many other GCC ports use unsigned.
I find only one CPU that is suitable for such
choice: PDP-11, where the shortest method to read
memory (mov_byte_from_memory_to_register) expands
a sign bit.
Dmitry
mmarize all modules,
which are needed to support a function (for example,
flash sizes of free() and malloc() are equal, as both
are placed in a one module). Time to prepare an args list
is not included.
Dmitry.
P.S. To build the CVS avr-libc it is needed to add 'common.h' file manualy.
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L PROTECTED] `
> end
Possible, my mail program is too old.
How to decode this patch?
Thanks, Dmitry.
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Erik, thanks!
'uudecode' is work.
Dmitry.
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IN C89 (yes, 89)
Shifting by a long count no longer coerces the shifted operand
to long.
x86-gcc gives an another result due to 32-bit integer: left
operand is short (16-bit), but first it is promoted to int,
i.e. 32 bits. And result is int (0x1fffe).
Regards,
Dmitry.
_
unction is more space and more time
expansive. The reason is that div() uses an another function:
__divmodhi4(), i.e. 16-bits.
Compare two programs:
prog1: 150 bytes, 238 clocks
prog2: 212 bytes, 316 clocks
Regards,
Dmitry.
-
s (div, ldiv).
Dmitry.
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if this may cause a problem ?
Yes, the 'naked' attribute can destroy a program.
If shortly, use it only for completely-asm functions.
Try the 'noreturn' attribute. I can't check this
for patched avr-gcc, but in case of pure avr-gcc and
a com
On Friday 21 December 2007 16:15, Weddington, Eric wrote:
[...]
> A completely rewritten floating-point library, contributed by Dmitry
> Xmelkov. It is smaller and faster, but as it's an almost full rewrite.
A correction is needed:
The speed: yes. But the size is not a strong fea
Hi.
I try to build the avr-gcc 4.3-20080104 snapshot.
Binutils is 2.18.
Build is fault at compilation 'libgcc' for avr35:
illegal opcode movw.
Is there any method to configure GCC to work with
binutils-2.18 ?
Thanks,
Dmitry.
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35'
options: but the error message was not about this unsupported
architecture. It was about: line XXX at .../libgcc.S: illegal
opcode movw. Simple 'avr-as -mmcu=avr35' gives normal error
message: Fatal error, unknown MCU, avr35.
About the question: probably, it is poss
nhanced instruction set without
multiplication.)
IMHO, it would be better to permit for avr-as the '-mmcu=avr25'
option: which is alias for 'avr2' in relocation and is
differ in instruction set. (The same for avr35/avr3).
Dmitry.
Very interesting!
I will try this new order with Avr-libc's C-functions
(probably at the nearest week-end).
Today (with default order) the results are:
AVR: at90s8515__ atmega8
GCC: 3.3.6 3.4.6 4.0.4 4.1.2 4.2.2 4.3.X 3.3.6 3.4.6 4.0.4 4
i r17,...
And 4.1.2, 4.2.2 and 4.3-20080104 produces the ugly code.
Regards,
Dmitry.
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ss with gcc (not gcc-avr)
Possible, yes.
Some another targets of GCC 4.2.2:
pdp11 --> ugly
arm/thumb --> ugly
arm/arm --> OK
Regards,
Dmitry
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Hi.
Summary results for Avr-libc CVS HEAD 2008-01-13, only C-functions.
Values (base variant) are slightly different from ones of 10 Jan,
due to bug #21995 is fixed. GCC 4.3.X is 4.3-20080104 snapshot.
AVR: at90s8515__ atmega8
GCC: 3.3.6
ns
- does not include stack for arguments (printf, scanf).
> -frename-registers is not well described - no idea what it does! I tend
> to use -Os as benchmark - which excludes this.
Precise, all test cases include '-Os' in option list,
the '-frename-regis
grams with compiler listing.
Regards,
Dmitry.
--
#define ABORT_PORT 0x49
#define abort() do { *(volatile char *)ABORT_PORT = 0; } while (0)
int main ()
{
volatile unsigned char a = 1, b = 255;
unsigned char c;
if ((c = a
p.elf' into
'This_is_a_very_small_test_to_destroy_the_avrtest\
_program_version_of_17_jan_2008_year_by_buffer\
_overflow_with_long_path_name.elf'
the result is: Segmentation fault.
Regards,
Dmitry.
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On Thursday 17 January 2008 14:57, Paulo Marques wrote:
> Quoting "Dmitry K." <[EMAIL PROTECTED]>:
> > [...]
> > Alas, the first (add.c) is still unworked.
>
> Ok, a new version is ready (attached) with this problem fixed (and a
> few others). In this ve
issues specific to the AVR. ;-)
I understand. And is it now possible to add avr-specific testes
for open bugs (signbit, long-long 3 args)?
And is it known any regular set of tests for GCC?
Or GCC's model of testing is only bug messages from users?
Or such sets are only private?
Regards,
D
e is the best debug method.
Note, it was only a quick and superficial look. I skip
instructions and flags, which C compiler does not use.
If it will a time at the week-end, I will to apply
yours avrtest to the Avr-libc's set of tests.
Regards,
Dmitry.
for
example, MOVW adds 2 clocks, ADIW/SBIW adds 0 clocks.
[...]
> Since you seem to frequently produce cycle counts for your floating
> point operations and other libc functions, what would you like this
> interface to be able to do?
I use a subtracti
0
movwr0,r2
lpm r2,Z+
Dmitry.
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to prevent GCC optimization.
I am not sure in TI's accuracy. Results for both MSP430-es
are practicaly equal, despite the fact thar FG4619 has
considerable enhanced core. Also run time for ATmega8 is
too big. Can everbody to make any measurements with
IAR compiler?
Source in attachmen
4.2.2 -O3
4350 869864.3.X -Os
5608 753514.3.X -O3 -fno-unit-at-a-time
Regards,
Dmitry.
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main() (this is work on both: patched and unpatched avr-gcc)
and read the full report after run. (A small script makes all
above automaticaly).
Regards,
Dmitry.
P.S. I forget to attach the second file (with dummy functions).
Without ones GCC omits a big part of test.
Attach now:
void dummy1 (floa
normal size, but too quick:
5494 31547 4.3 -O3
I do not study a reason. Possibly, it was any precalculation.
I have try '-fno-unit-at-a-time' to avoid this optimization.
After this:
5608 75351
Avr-libc was the same for all versions: CVS HEAD 2008-01-13.
Regards,
Dmit
#x27; option, penalty is ~50 bytes.
3. Another MCU, f.e. with ATmega128:
penalty for vectors: ~100 bytes
penalty for jmp/call: ~150 bytes
Regards,
Dmitry.
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absence of preservation of the RAMPZ (by default)
is a mistake which should be corrected in all Avr-gcc versions.
Let's notice, that in all known crystals the RAMPZ does not influence
in any way operations from the RAM.
Dmitry.
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optimization is not a best solution (IMHO).
An addition of few words may speed up in few times for
some 32/16-bit functions.
Regards,
Dmitry.
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as
in libc there were calls of float point, I am not assured, that the libm
will be always one piece. Earlier there were reasons of efficiency (the
quantity of intermodular communications is very great in libm), but
link-time (--relax) optimization now works.
ntegral promotion'.
I have look all Avr-gcc releases since 3.3.6: anywhere
the Master() does it.
Note, in older Avr-gcc the Slave() does it also.
Regards,
Dmitry.
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c: as Avr-libc
is busy by ISR vectors, so Avr-libc must to check names. There
is a decision based on C preprocessor's manipulations: it was
disscussed a few years ago. It prevents building if there is
a misprint in ISR name. More, it works with asm sources also.
What about to mo
ew years ago.
>
> Do you have a reference to it? I only vaguely remember it.
I will find it in my archive this evening.
Dmitry.
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On Wednesday 05 March 2008 08:16, Dmitry K. wrote:
> On Wednesday 05 March 2008 03:06, Joerg Wunsch wrote:
> > >The better method is to add checking into Avr-libc: as Avr-libc
> > >is busy by ISR vectors, so Avr-libc must to check names. There
> > >is a deci
'
[35509] New: [avr] 4.3.0: builtin isinf() mismatch to compile-time substitut
For #35506 there is a workaround: add '-mall-opcodes' option to
avr35 evaluation in ASM_SPEC.
Dmitry.
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/* The next program is aborted with avr-gcc 4.1.2, 4.2.3, 4.3.0:
result of char promotion comes out of CHAR_MIN/MAX.
Options: -W -Wall -Os
Know to work:
3.3.6, 3.4.6 - good code
4.0.4 - correct, but not the best
4.1.2, 4.2.3, 4.3.0 - without optimization only
*/
#inc
understand, why the Standart permits
'undefined behavior' with ordinary overflow, like
result of usage uninitialized pointer for writing.
In any case the Standart does not charge to force
the 'undefined behavior'.
Regards,
Dmitry.
__
nline assembler?
Thanks,
Dmitry.
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;s float point operations are reentrant.
Avr-libc 1.6 math functions are reentrant: the errno
variable is not changed (modern C standart permits this).
Regards,
Dmitry.
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h attribute is absent in
4.3.0 (The alternatives like 'noOS_main', 'OSless_main' are absent
also). In any case the including of nonstandarts into user source
is a bad idea. It would be the best variant to restore old behavior
and add '-m...' option for gener
sting,
as indirect call is used in Avr-libc's EEPROM functions now.
I have try a small program. Seems, the result is wrong
(Binutils is 2.18, see avr-libc-dev discussion).
Thanks,
Dmitry.
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seful!)
>
> For example , (excuse syntax mistakes)
>
> void foo(void) {}
>
> (void * p1) (void);
>
> p1 = &foo; //NO PROBLEM
[...]
Doubtful is avr6 case with binutils.
Look, please, the program below. It uses only simple function
pointers, no arithmetic.
Thanks,
Dmitr
t library.
The Binutils-2.17 makes such replacement unconditionally.
The 2.18 has an option to disable it: '--no-call-ret-replacement'.
IMHO, such replacement must be disabled by default.
Note, GCC for some targets can itself optimize tailing call.
This is better, as the second instruction (RE
On Friday 18 April 2008 17:04, Weddington, Eric wrote:
> Tail call optimization transforms (R)CALL,RET -> (R)JMP,RET as you
> mentioned above. But again it would not affect the "rjmp ." as above.
> Only RCALL.
>
> E
mmcu=avr35:-mmcu=avr3;
mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;mmcu=*:-mmcu=%*}"
to:
#define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;
mmcu=avr35:-mmcu=avr3 -mall-opcodes;
mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;mmcu=*:-mmcu=%*}"
Regards,
Dmitry.
On Saturday 03 May 2008 03:36, Anatoly Sokolov wrote:
[...]
> What your opinion on this offer?
>
> Anatoly.
Hmm... Once we will provide the 'far' allocation, so
we must to provide the method to obtain the address?
Seems, the GET_FAR_ADDRESS() is not a relea
the float point functions are not change the
errno variable. The intrinsic functions are reentrant also.
Regards,
Dmitry.
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ter in conjunction
the presence of option 'my-trampolines-are-at-low-memory'. (In
case of this option the compiler must not use EIND entirely).
In any case, the rules of EIND usage must be documented.
Regards,
Dmitry.
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vector of bootloader and jump from bootloader to
> reset vector of application with disabled interrupt.
It is not needed to disable interrupts, as the startup code
includes the SREG cleaning?
Dmitry.
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XTENDED_INDIRECT_ADDR, __tmp_reg__
> - eijmp
> + pushZL
> + pushZH
> + push__tmp_reg__
> + ret
> #else
> ijmp
> #endif
Yes, it is.
And some optimization is needed to exclude pop/push sequences.
Dmitry.
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On Thursday 14 May 2009 14:03, Dmitry K. wrote:
> And some optimization is needed to exclude pop/push sequences.
I shall fix this bug (mismatch of longjmp() to Avr-gcc's API)
at the nearest week-end.
Dmitry.
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> > I shall fix this bug (mismatch of longjmp() to Avr-gcc's API)
> > at the nearest week-end.
Done, without any optimization.
Dmitry.
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nline
eeprom_*_byte(). It was a quick way to obtain the correct
access for variety of chips.
You can apply the Avr-libc patch #6718. It makes the EEPROM
functions compact. (It is not checked with Xmega.)
Regards,
Dmitry.
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On Tuesday 26 May 2009 15:19, Joerg Wunsch wrote:
> > You can apply the Avr-libc patch #6718. It makes the EEPROM
> > functions compact. (It is not checked with Xmega.)
>
> Xmega isn't supported currently anyway.
Well, I will commit this patch to HEAD (first) b
it is needed a clarification about
the RAMPX/Y/Z/D registers and the prologue/epilogue
procedure usage.
Dmitry.
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In addition, there is the benchmark table in avr-libc doc.
Regards,
Dmitry.
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On Monday 09 May 2005 08:26, Vesa Jääskeläinen wrote:
...
> --- begin of code snippet ---
> #define u_long unsigned long
> #define u_char unsigned char
>
> void test(int req, void *conf)
> {
> void **ppv = (void **) conf;
> u_long *lvp = (u_long *) conf;
> u_long lv = *lvp;
> u_
> push __tmp_reg__
> dec r27
> brne loop
>
Yes, this is common method for initial cleaning variables (in registers)
for pure asm programs.
Prologue/epilogue? In max case (r2-r17, r28,r29):
With pushes: 18 words, 36 clocks
With loop: 9 words, 119 clocks
On Monday 23 May 2005 15:01, Larry Barello wrote:
> Before I submit a bug report, is this old news? If the union is aligned
> (e.g. the byte array is the same length as the union object) the compiler
> is happy. Make them different and it ICE. Put the union on the stack and
> the problem goes aw
On Monday 23 May 2005 23:41, Tino wrote:
> 2-3 years ago "avr-gcc -Wa,-ahlms=x.lst -c -g -o x.o x.c" produced an
> assembler listing in x.lst where the source lines from the c-file where
> available as comments. This was fine because the assembler listing was
> easy to understand for larger program
On Monday 30 May 2005 14:14, Larry Barello wrote:
> Ok, I submitted this as a bug (#21811) and within an hour it was closed as
> a duplicate of #8788 which will be corrected in the 4.1.0 mainline. #8788
> sounds similar, but I am still somewhat unsatisfied since a union of a
> three byte array and
On Friday 03 June 2005 15:39, wbounce wrote:
> I am getting missing data on 2 printf that I can not figure out.
...
> volatile int16_t TargetBearing,SlowBearing, CurrentBearing;
> const char gcOutputStatus[] PROGMEM = "Long %10.6f Lat %9.6f H %6.2f Kn
> %6.2f CB %5.1f TB %5.1f V %c\r\n";
>
> //prin
insight why this is so?
The next program run fine (avr-gcc 3.3.5):
#include
volatile struct {
uint32_t x;
} array = { 123456789 };
uint64_t main ()
{
uint64_t sum = -123456789;
/* to clean `sum' fully, 64-bits operation is needed*/
sum += (uint64
printf( " %ld, %ld, \r\n ", regTable[i].X,regTable[i].Y);
>
> }
>
>
> At the end when I print the sumX and sumY values, the are incorrect.
Are sumX and sumY 64-bits, as was mentioned in first mail?
Avr-libc's printf does not work with 64-bits values.
Dmitry.
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On Friday 15 July 2005 07:33, Torsten Mohr wrote:
> Hi,
>
> i tried to write an inline asm function that gets two input parameters
> in "Y" and "Z". These two pointers should point to two uint32_t
> locations in RAM and the asm function should copy from Y to Z
> and while copying change the endian
80 97683
* Functions are from Avr-libc-1.2.4 and patches, without ones
too small or asm.
* Results are in form: prog_words + stack_bytes (without nested
calls).
* Common options are: -mmcu=atmega8 -Os
* Version-specific options are:
3.x.x: -frename-registers
4.0.1: -fweb
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