Re: [avr-gcc-list] Device specific ISA support in AVR

2014-03-31 Thread Georg-Johann Lay
Am 03/27/2014 12:58 PM, schrieb S, Pitchumani: Ping! Please review the patches and comment. Hi Pitchumani, some remarks on the work: 1) It might be useful to builtin-define macros so that user code can test for availability of these instructions, similar to __AVR_ERRATA_SKIP__ or __AVR_HAVE

Re: [avr-gcc-list] Device specific ISA support in AVR

2014-03-27 Thread S, Pitchumani
@nongnu.org > Subject: Re: [avr-gcc-list] Device specific ISA support in AVR > > > -Original Message- > > From: Georg-Johann Lay [mailto:a...@gjlay.de] > > Sent: Thursday, March 13, 2014 7:43 PM > > To: S, Pitchumani > > Cc: avr-gcc-list@nongnu.org >

Re: [avr-gcc-list] Device specific ISA support in AVR

2014-03-13 Thread Georg-Johann Lay
Am 03/12/2014 06:59 PM, schrieb S, Pitchumani: Please review the patches and comment. Hi Pitchumani, some remarks on the work: 1) It might be useful to builtin-define macros so that user code can test for availability of these instructions, similar to __AVR_ERRATA_SKIP__ or __AVR_HAVE_MUL__.

Re: [avr-gcc-list] Device specific ISA support in AVR

2014-03-03 Thread Georg-Johann Lay
Am 02/25/2014 01:05 PM, schrieb S, Pitchumani: Hi, Few AVR Xmega devices have specific instruction support than the architecture it belongs to. For example atxmega128b1 device has RMW instructions (XCH,LAC, LAS and LAT) support, but not all avrxmega6 devices have. Now, avr-gcc passes architectu