Re: Question about armv7_icache_sync_range function

2016-01-28 Thread Daniel Bolgheroni
On Fri, Dec 18, 2015 at 01:27:59PM +0100, Patrick Wildt wrote: > There had been some external effort to rewrite the PMAP based on > the PowerPC one. It actually runs on a platform, but it's not stable > enough. I wish there was more time to work on that. What are the advantages of the PowerPC-base

Re: Question about armv7_icache_sync_range function

2015-12-18 Thread Patrick Wildt
Sorry for replying late. Yes, you’re right. I’m not sure why I read it like that. I think the PTEs are write-through by default. If there’s no write- through we wanted to use write-back, but unfortunately that triggered bugs... So we made those PTEs then uncached. Having them write-back with coh

Re: Question about armv7_icache_sync_range function

2015-12-10 Thread Jeunder Yu
In 2015年11月20日 下午7:07於 "Patrick Wildt" 寫道: > > Hi, > > Some might call it unimplemented feature, other might call it a bug. > > In essence this code is wrong. The value has to match the cache line > size used in the specific CPU that we’re running on. > > If you look at NetBSD, you’ll see that the

Re: Question about armv7_icache_sync_range function

2015-11-20 Thread Patrick Wildt
Hi, Some might call it unimplemented feature, other might call it a bug. In essence this code is wrong. The value has to match the cache line size used in the specific CPU that we’re running on. If you look at NetBSD, you’ll see that they always read out the size prior to doing that sync. Free