assert succeeds if I take one of the DIMMs out.
I'm also still suffering from the issue of having a mirrored left/right
screen over HDMI. The mirroring starts as soon as I load amdgpu and is
visible even in the console before loading X.
Any ideas for t
dev->gmc.vram_width) {
/* hbm memory channel size */
chansize = 128;
but on APUs the chansize should be 64 right?
With one DIMM installed it prints out 128 as the width and with 2 dimms
(in dual channel config) it prints 256 bits.
Right
This DC patchset brings improvements in multiple areas. In summary, we have:
- Fix some bound and NULL check
- Fix nonseamless transition from ODM + MPO to ODM + subvp
- Allow Z8 when stutter threshold is not met
- Remove plane and stream pointers from dc scratch
- Remove read/write to external re
rom being executed. To handle this case we will
allow entry to idle opt from driver side even when a
PSR panel is connected under the following scenarios:
1. Only a single PSR panel is connected
2. PSR panel is not flipping
Reviewed-by: Samson Tam
Acked-by: Tom Chung
Signed-off-by:
at disable message is sent during first
commit.
Fixes: 27750e176a4f ("drm/amd/display: Allow DTBCLK disable for DCN35")
Reviewed-by: Charlene Liu
Acked-by: Tom Chung
Signed-off-by: Taimur Hassan
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 5 +
1 file changed, 5
abled) that returns true if any HPO displays
are present in a context. We compare the current and previous dc ctx to check
whether HPO is transitioning from on to off or vice versa, and adjust the HPO
state accordingly.
Reviewed-by: Wenjing Liu
Reviewed-by: Chris Park
Acked-by: Tom Chung
Signed-o
From: Sung Joon Kim
[why&how]
We need to remove the reference to these registers to
prevent any usage in the future.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Tom Chung
Signed-off-by: Sung Joon Kim
---
.../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 38 ---
.../amd/dis
From: Dillon Varone
[Why&How]
These additional callbacks to DC will be required for the DML2 wrapper. Also
consolidate common callbacks for projects to a single location for maintenance.
Reviewed-by: Chaitanya Dhere
Acked-by: Tom Chung
Signed-off-by: Dillon Varone
---
.../gpu/drm
From: Dillon Varone
[Why&How}
Some interfaces needed changes to support future architectures.
Reviewed-by: Chaitanya Dhere
Acked-by: Tom Chung
Signed-off-by: Dillon Varone
---
.../gpu/drm/amd/display/dc/core/dc_state.c| 14 +--
.../gpu/drm/amd/display/dc/core/dc_surface.c
From: Wenjing Liu
[why&how]
In some platform out_transfer_func may not be popualted. We need to check
for null before dereferencing it.
Fixes: 4b939f625e9b ("drm/amd/display: Generalize new minimal transition path")
Reviewed-by: Alvin Lee
Acked-by: Tom Chung
Signed-off-b
From: Sohaib Nadeem
[why&how]
Add the missing null check before dereference for dc_stream_status*
Fixes: 06653fc22752 ("drm/amd/display: Implement update_planes_and_stream_v3
sequence")
Reviewed-by: Josip Pavic
Acked-by: Tom Chung
Signed-off-by: Sohaib Nadeem
---
drive
slice1 | |
|DPP3OPP3| |
||
[how]
Try to acquire free pipes used as secondary DPP pipes from current state
before try to acquire any free pipes for new OTG master pipe.
Reviewed-by: Alvin Lee
Acked-by: Tom Chung
Signed-off-by: Wenjing Liu
: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Wenjing Liu
Acked-by: Tom Chung
Signed-off-by: George Shen
---
.../gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c | 54 +++
.../gpu/drm/amd/display/dc/dcn30/dcn30_mpc.h | 14 ++---
.../gpu/drm/amd/display/dc
ne
Acked-by: Tom Chung
Signed-off-by: Wenjing Liu
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 5 -
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 10 --
2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/dr
x-out-of-bounds in
dcn35_clkmgr")
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Sun peng Li
Acked-by: Tom Chung
Signed-off-by: Roman Li
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
From: Nicholas Kazlauskas
[Why]
We don't have a way to specify IPS2 for display off but RCG only for
static screen and local video playback.
[How]
Add a new setting that allows RCG only when displays are active but
IPS2 when all displays are off.
Reviewed-by: Ovidiu Bunea
Acked-by: Tom
From: Bhawanpreet Lakha
[Why&How]
Some panels don't meet the stutter threshold (4k etc), this leads to
power regressions. Allow z8 for panels that don't meet the threshold
but support PSR/replay
Reviewed-by: Nicholas Kazlauskas
Acked-by: Tom Chung
Signed-off-by: Bha
From: Bhawanpreet Lakha
[Why&How]
Some panels don't meet the stutter threshold (4k etc), this leads to
power regressions. Allow z8 for panels that don't meet the threshold
but support PSR/replay
Reviewed-by: Nicholas Kazlauskas
Acked-by: Tom Chung
Signed-off-by: Bha
From: Sung Joon Kim
[why&how]
To prevent out of bounds error, we need
to increase the clock table size.
Reviewed-by: Xi Liu
Acked-by: Tom Chung
Signed-off-by: Sung Joon Kim
---
.../amd/display/dc/dml2/dml2_translation_helper.c | 14 +-
1 file changed, 5 insertions(+
From: Sridevi Arvindekar
[Why]
Number of hpo dp2 link encoders is increased.
Instances are changed.
[How]
Increased size in resource pool, init for each instance
Reviewed-by: Alvin Lee
Acked-by: Tom Chung
Signed-off-by: Sridevi Arvindekar
---
drivers/gpu/drm/amd/display/dc/inc/hw
From: Alvin Lee
[Why&How]
Remove several plane and stream pointers from dc for code
refactoring.
Reviewed-by: Wenjing Liu
Acked-by: Tom Chung
Signed-off-by: Alvin Lee
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 18 ++---
.../amd/display/amdgpu_dm/amdgpu_dm_color.c
From: Dillon Varone
[WHY&HOW]
Converting the watermark set structure to a union and modifying some interfaces
to accommodate future usage.
Reviewed-by: Chaitanya Dhere
Acked-by: Tom Chung
Signed-off-by: Dillon Varone
---
.../gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c
From: Anthony Koo
- Add Display PHY FSM command interface for automated testing
Acked-by: Tom Chung
Signed-off-by: Anthony Koo
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 39 ++-
1 file changed, 38 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd
From: Muhammad Ahmed
[why]
Driver crashes when pipe idx not set properly
[how]
Add code to skip the pipe that idx not set properly
Reviewed-by: Charlene Liu
Acked-by: Tom Chung
Signed-off-by: Muhammad Ahmed
---
drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c | 5 +
1 file changed, 5
number of hpo dp link encoders
- Increase clock table size
- Add new IPS config mode
- Build scaling params when a new plane is appended
- Refactor DML2 interfaces
- Allow idle opts for no flip case on PSR panel
Acked-by: Tom Chung
Signed-off-by: Aric Cyr
---
drivers/gpu/drm/amd/display/dc/dc.h
- Fix some cursor issue
- Fix print format specifiers in DC_LOG_IPS
- Fix minor coding errors in dml21 phase 5
- Improve FAM control for DCN401
- Add null pointer checks for some code
- Refactor 3DLUT for non-DMA
- Optimize vstartup position for AS-SDP
- Update to using new dccg callbacks
- Enable
From: Wenjing Liu
[why & how]
There is a coding error which causes incorrect variables to be assigned
in DML21 phase 5.
Reviewed-by: Austin Zheng
Signed-off-by: Wenjing Liu
Signed-off-by: Tom Chung
---
.../gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml_top.c | 4 ++--
1 file change
even if dispclk can't reach Vmin.
Reviewed-by: Austin Zheng
Signed-off-by: Wenjing Liu
Signed-off-by: Tom Chung
---
.../dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c | 14 +-
.../display/dc/dml2/dml21/src/dml2_top/dml_top.c | 13 +++--
2 files changed, 20 insert
d-off-by: Tom Chung
---
.../amd/display/dc/hwss/dcn32/dcn32_init.c| 1 -
.../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 46 ---
.../amd/display/dc/hwss/dcn401/dcn401_init.c | 2 +-
3 files changed, 21 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/amd/displ
From: Hansen Dsouza
[Why and how]
Update to using new dccg callbacks
Reviewed-by: Chris Park
Signed-off-by: Hansen Dsouza
Signed-off-by: Tom Chung
---
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu
es to
"dcn35_apply_idle_power_optimizations".)
This fixes 1 FORWARD_NULL issue reported by Coverity.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Alex Hung
Signed-off-by: Tom Chung
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
dif
pipes.
Reviewed-by: Alvin Lee
Signed-off-by: Austin Zheng
Signed-off-by: Tom Chung
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 28 ++
.../display/dc/hubbub/dcn401/dcn401_hubbub.c | 23 +
.../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 91 +++
.../amd/display/dc
From: Aurabindo Pillai
[why & how]
print additional info for MALL related calculations and DMCUB messaging
to aid debugging.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Aurabindo Pillai
Signed-off-by: Tom Chung
---
.../gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
From: Muhammad Ahmed
[why & how]
HW removed this w/a, but we will still keep it to avoid regression.
but return in test mode.
Reviewed-by: Charlene Liu
Signed-off-by: Muhammad Ahmed
Signed-off-by: Tom Chung
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 3 +++
1
From: Rodrigo Siqueira
[why & how]
Change the order of the pipe_ctx->plane_state check to ensure that
plane_state is not null before accessing it.
Reviewed-by: Alex Hung
Signed-off-by: Rodrigo Siqueira
Signed-off-by: Tom Chung
---
.../gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
From: Wayne Lin
[why & how]
Make sure plane_state is not null before calling a function
that dereferences it. Besides, remove redundant codes.
Reviewed-by: Alex Hung
Signed-off-by: Wayne Lin
Signed-off-by: Tom Chung
---
.../amd/display/dc/hwss/dcn20/dcn20_hwseq.c
From: Roman Li
[Why]
%d specifier is used for printing unsigned values.
It can result in negative values in logs for unsigned variables.
[How]
Replace %d with %u for unsigned.
Reviewed-by: Nicholas Kazlauskas
Signed-off-by: Roman Li
Signed-off-by: Tom Chung
---
drivers/gpu/drm/amd/display
Signed-off-by: Robin Chen
Signed-off-by: Tom Chung
---
drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
index
k the transition as seamless.
Reviewed-by: Alvin Lee
Signed-off-by: Dillon Varone
Signed-off-by: Tom Chung
---
.../amd/display/dc/hwss/dcn32/dcn32_hwseq.c | 25 ++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq
f-by: Tom Chung
---
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
index b604c8886ef4..ac0a21ac
perform any strictly required outstanding programming.
Reviewed-by: Alvin Lee
Signed-off-by: Dillon Varone
Signed-off-by: Tom Chung
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 121 +
.../drm/amd/display/dc/core/dc_hw_sequencer.c | 123 ++
.../amd/display/dc
From: Dillon Varone
[WHY&HOW]
Set max VTotal cap for dcn401 because VTotal
register is only 16 bits wide on dcn401.
Reviewed-by: Chris Park
Signed-off-by: Dillon Varone
Signed-off-by: Tom Chung
---
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c | 1 +
1 file change
in dcn321.
Fixes: 5f0c74915815 ("drm/amd/display: Fix for otg synchronization logic")
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Alvin Lee
Signed-off-by: Loan Chen
Signed-off-by: Tom Chung
---
.../gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource
From: Charlene Liu
[why & how]
this is to remove redundant msg to pmfw at boot/resume
since bios already power up dcn.
Reviewed-by: Chris Park
Signed-off-by: Charlene Liu
Signed-off-by: Tom Chung
---
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c | 7 +--
1 file change
From: Rodrigo Siqueira
[why & how]
Remove force_backlight_start_level since it is never used.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
Signed-off-by: Tom Chung
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/dis
rm/amd/display: Add driver support for future FAMS
versions")
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
Signed-off-by: Tom Chung
---
.../gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu
patch.
Fixes: 9d84c7ef8a87 ("drm/amd/display: Correct cursor position on horizontal
mirror")
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
Signed-off-by: Tom Chung
---
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn1
nk: https://gitlab.freedesktop.org/drm/amd/-/issues/2247
Reviewed-by: Harry Wentland
Fixes: 9d84c7ef8a87 ("drm/amd/display: Correct cursor position on horizontal
mirror")
Signed-off-by: Melissa Wen
Signed-off-by: Hamza Mahfooz
Signed-off-by: Alex Deucher
Signed-off-by: Tom Chung
Cc: sta...@vger.kernel.o
From: Rodrigo Siqueira
[why & how]
Remove unnecessary call to REG_SEQ_SUBMIT and REG_SEQ_WAIT_DONE, since
those macros are not necessary anymore at the dpp1 set degamma. Those
are part of an old implementation.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
Signed-off-by: Tom C
position for AS-SDP
- Update to using new dccg callbacks
- Enable otg synchronization logic for DCN321
- Disable DCN401 UCLK P-State support on full updates
Acked-by: Wayne Lin
Signed-off-by: Martin Leung
Signed-off-by: Tom Chung
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1
to have a custom pwm frequency
Tom Chung (2):
drm/amd/display: Add Replay capability and state in debugfs
drm/amd/display: remove panel replay initialization for DCN316
Wenjing Liu (1):
drm/amd/display: reset DSC clock in post unlock update
Xi Liu (1):
drm/amd/display: add support for force O
From: Leo Ma
[Why && How]
Copyright notice failed in the Palamida scan and make changes to
align with our guidelines.
Acked-by: Tom Chung
Signed-off-by: Leo Ma
---
drivers/gpu/drm/amd/display/Kconfig | 2 ++
.../drm/amd/display/dc/clk_m
From: Xi Liu
[Why and how]
Current 420 ODM combine will override debug settings.
Add support if debug settings is set for 420 ODM combine.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Tom Chung
Signed-off-by: Xi Liu
---
drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c | 2 +-
1 file
From: Revalla Hari Krishna
[why]
cleaning up the code refactor requires dccg to be in its own component.
[how]
move all files under newly created dccg folder and fixing the
makefiles.
Reviewed-by: Martin Leung
Acked-by: Tom Chung
Signed-off-by: Revalla Hari Krishna
---
drivers/gpu/drm/amd
f driver doesn't support Replay
"Driver support: yes\n" - if driver supports Replay
sudo cat /sys/kernel/debug/dri/0/eDP-1/replay_state
It will return current panel replay state
Reviewed-by: Sun peng Li
Acked-by: Tom Chung
Signed-off-by: Tom Chung
---
.../amd/display/amdgpu_dm
Vanzylldejong
Acked-by: Tom Chung
Signed-off-by: Sreeja Golui
---
drivers/gpu/drm/amd/display/dc/dc.h| 1 +
.../drm/amd/display/dc/dcn31/dcn31_panel_cntl.c| 14 ++
.../drm/amd/display/dc/dcn31/dcn31_panel_cntl.h| 3 +++
3 files changed, 18 insertions
[Why & How]
Remove the panel replay initialization for DCN316.
Because currently DCN316 does not support the panel replay feature.
Reviewed-by: Wayne Lin
Acked-by: Tom Chung
Signed-off-by: Tom Chung
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 -
1 file changed, 1 dele
From: Dillon Varone
[WHY]
Input mode for the DIG FIFO should be programmed as part of stream
encoder setup.
[HOW]
Pre-calculate the pixels per cycle as part of the pixel clock params,
and program as part of stream encoder setup.
Reviewed-by: Wenjing Liu
Acked-by: Tom Chung
Signed-off-by
From: Alex Hung
[WHY]
ENGINE_ID_UNKNOWN (-1) is not a valid eng_id and not a valid array
index.
[HOW]
Check whether eng_id is unknown to avoid access array with negative
array index.
This fixes 4 OVERRUN issues reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off
From: Alex Hung
[WHY & HOW]
tg_inst will be a negative if timing_generator_count equals 0, which
should be checked before used.
This fixes 2 OVERRUN issues reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/
From: Alex Hung
[WHY & HOW]
GPIO_ID_UNKNOWN (-1) is not a valid value for array index and therefore
should be checked in advance.
This fixes 5 OVERRUN issues reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/displa
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 169 +-
1 file changed, 128 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index
From: Hersen Wu
[Why]
Coverity reports OVERRUN warning. Should abort amdgpu_dm
initialize.
[How]
Return failure to amdgpu_dm_init.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 -
1 file changed, 4
.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Tom Chung
Signed-off-by: Nicholas Susanto
---
drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c
b/drivers/gpu/drm/amd
n MST case.
[Limitations]
This change only affects MST DSC devices that follow specifications
additional changes are required to check for old MST DSC devices such as
ones which do not check for Virtual DPCD registers.
Reviewed-by: Swapnil Patel
Reviewed-by: Hersen Wu
Acked-by: Tom Chung
Signed-off-b
From: Alex Hung
[WHY]
fe_clk_en has size of 5 but sizeof(fe_clk_en) has byte size 20 which is
lager than the array size.
[HOW]
Divide byte size 20 by its element size.
This fixes 2 OVERRUN issues reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
From: Hersen Wu
[Why]
Coverity report OVERRUN warning. There are
only max_links elements within dc->links. link
count could up to AMDGPU_DM_MAX_DISPLAY_INDEX 31.
[How]
Make sure link count less than max_links.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Hersen
From: Samson Tam
[Why & How]
Split into a separate adjust and calculate call so
we can let the caller adjust recout
Reviewed-by: Jun Lei
Acked-by: Tom Chung
Signed-off-by: Samson Tam
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 23 +--
1 file changed, 16 insert
From: Alex Hung
aux_rd_interval has size of 7 and should be checked.
This fixes 3 OVERRUN and 1 INTEGER_OVERFLOW issues reported by Coverity.
Reviewed-by: Rodrigo Siqueira
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/dc/link/protocols/link_dp_training.c | 4
From: Hersen Wu
[Why & How]
ASSERT if return NULL from kcalloc.
Reviewed-by: Alex Hung
Reviewed-by: Rodrigo Siqueira
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
drivers/gpu/drm/amd/display/dc/link/protocols/link_dpcd.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers
From: Hersen Wu
[Why]
Coverity reports OVERRUN warning. Do not check if array
index valid.
[How]
Check msg_id valid and valid array index.
Reviewed-by: Alex Hung
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
.../drm/amd/display/modules/hdcp/hdcp_ddc.c | 28 ---
1 file
From: Bhuvana Chandra Pinninti
[why]
cleaning up the code refactor requires hubp to be in its own component.
[how]
move all files under newly created hubp folder and fixing the makefiles.
Reviewed-by: Martin Leung
Acked-by: Tom Chung
Signed-off-by: Bhuvana Chandra Pinninti
---
drivers/gpu
From: Alex Hung
[WHY & HOW]
num_valid_sets needs to be checked to avoid a negative index when
accessing reader_wm_sets[num_valid_sets - 1].
This fixes an OVERRUN issue reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
drivers/gpu/drm
From: Alex Hung
This prevents accessing to negative index of link_encoders array.
This fixes an OVERRUN issue reported by Coverity.
Reviewed-by: Rodrigo Siqueira
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/link/link_factory.c | 2 +-
1 file changed, 1
From: Alex Hung
[WHY & HOW]
HDCP_MESSAGE_ID_INVALID (-1) is not a valid msg_id nor is it a valid
array index, and it needs checking before used.
This fixes 4 OVERRUN issues reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
drivers/gpu
From: Hersen Wu
[Why]
Coverity reports RESOURCE_LEAK warning. State memory
is not released if dm_create_color_properties fail.
[How]
Call kfree(state) before return.
Reviewed-by: Alex Hung
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
drivers/gpu/drm/amd
From: Dillon Varone
[WHY & HOW]
Make enable and disable sequences symmetric.
Reviewed-by: Wenjing Liu
Acked-by: Tom Chung
Signed-off-by: Dillon Varone
---
drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm
pport.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Charlene Liu
Acked-by: Tom Chung
Signed-off-by: Nicholas Kazlauskas
---
.../amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 33 +++
1 file changed, 27 insertions(+), 6 deletions(-)
diff --
From: Alex Hung
[WHY & HOW]
dc->links[] has max size of MAX_LINKS and NULL is return when trying to
access with out-of-bound index.
This fixes 3 OVERRUN and 1 RESOURCE_LEAK issues reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
driv
y: Swapnil Patel
Acked-by: Tom Chung
Signed-off-by: Agustin Gutierrez
---
.../amd/display/amdgpu_dm/amdgpu_dm_mst_types.c| 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
b/drivers/gpu/drm/amd/display
From: Hersen Wu
[Why]
Coverity reports NULL_RETURN warning.
[How]
Add otg_master NULL check.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm
From: Hersen Wu
[Why]
For substrcation, coverity reports integer overflow
warning message when variable type is uint32_t.
[How]
Change varaible type to int32_t.
Reviewed-by: Alex Hung
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
drivers/gpu/drm/amd/display
From: Alvin Lee
This reverts commit 2147d93a90cc ("drm/amd/display: Only program P-State force
if pipe config changed")
Which causes regression.
Reviewed-by: Samson Tam
Acked-by: Tom Chung
Signed-off-by: Alvin Lee
---
.../amd/display/dc/hwss/dcn32/dcn32_hwseq
disconnection and all mpccs are disconnected before reset DSC clock.
Reviewed-by: Samson Tam
Acked-by: Tom Chung
Signed-off-by: Wenjing Liu
---
.../drm/amd/display/dc/dcn401/dcn401_dccg.c | 31 +++--
.../drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c | 18 +++--
.../drm/amd/display/dc/dsc/dcn20
From: Hersen Wu
[Why]
For subtraction, coverity reports integer overflow
warning message when variable type is uint32_t.
[How]
Change variable type to int32_t.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c
From: Hersen Wu
[Why & How]
Check return pointer of kzalloc before using it.
Reviewed-by: Alex Hung
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
.../gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c| 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm
lai
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
.../dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h| 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h
b/drivers/gpu/drm/amd/displ
From: Hersen Wu
[Why]
Coverity reports RESOURCE_LEAK for some implemenations
of clock_source_create. Do not release memory of clk_src
if contructor fails.
[How]
Free clk_src if contructor fails.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
.../gpu/drm/amd
From: Alex Hung
[WHAT & HOW]
Check clk table's array size to avoid out-of-bound memory accesses.
This fixes two OVERRUN issues reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_
From: Alex Hung
[WHY & HOW]
A read of acrtc_attach->base.state->event was not locked so moving it
inside the spinlock.
This fixes a LOCK_EVASION issue reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display
: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
b/drivers/gpu/drm/amd/display/
-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
.../dc/dml2/dml21/dml21_translation_helper.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git
a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c
b/drivers/gpu/drm/
cess
array, Coverity suspects index invalid.
[How]
Change varaible type to uint32_t.
Reviewed-by: Alex Hung
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
.../gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
ABM HW caps
since not all ASICs have the same number of cure segments and
bins
Acked-by: Tom Chung
Signed-off-by: Anthony Koo
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 139 ++
1 file changed, 139 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc
From: Alex Hung
[Why & How]
dml_stream_idx will be -1 when it is not found. Check and skip in such a
case as -1 is not a valid array index.
This fixes a NEGATIVE_RETURNS issue reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
drivers/gpu
component folder
- Refactor input mode programming for DIG FIFO
- Reset DSC clock in post unlock update
- Clean-up recout calculation for visual confirm
- Enable urgent latency adjustments for DCN35
Acked-by: Tom Chung
Signed-off-by: Aric Cyr
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file
This DC patchset brings improvements in multiple areas. In summary, we have:
- Add DSC granular throughput adjustment
- Allow DTBCLK disable for DCN35
- Update Fixed VS/PE Retimer Sequence
- Block dcn315 dynamic crb allocation when unintended
- Update dcn315 lpddr pstate latency
Cc: Daniel Wheele
From: Dmytro Laktyushkin
[WHY/HOW]
Increase the pstate latency to improve ac/dc transition
Reviewed-by: Charlene Liu
Acked-by: Tom Chung
Signed-off-by: Dmytro Laktyushkin
---
.../drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c| 8
1 file changed, 4 insertions(+), 4 deletions
From: Dmytro Laktyushkin
[WHY/HOW]
Limit the dynamic crb to dual stream configs that include eDP
Reviewed-by: Charlene Liu
Acked-by: Tom Chung
Signed-off-by: Dmytro Laktyushkin
---
.../drm/amd/display/dc/resource/dcn315/dcn315_resource.c| 6 --
1 file changed, 4 insertions(+), 2
From: Michael Strauss
[WHY/HOW]
Add a new AUX sequence provided by vendor to improve
interop with specific display configurations.
Reviewed-by: Wenjing Liu
Acked-by: Tom Chung
Signed-off-by: Michael Strauss
---
.../protocols/link_dp_training_fixed_vs_pe_retimer.c | 10 ++
1 file
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