On 09/17/2018 08:08 PM, Christian König wrote:
Move all entries between @first and including @last before @head.
This is useful for LRU lists where a whole block of entries should be
moved to the end of the list.
Used as a band aid in TTM, but better placed in the common list headers.
Signed-o
On 09/17/2018 08:08 PM, Christian König wrote:
Move all entries between @first and including @last before @head.
This is useful for LRU lists where a whole block of entries should be
moved to the end of the list.
Used as a band aid in TTM, but better placed in the common list headers.
Signed-o
On 09/14/2018 09:09 PM, Christian König wrote:
Otherwise the calling function won't notice that something is wrong.
Signed-off-by: Christian König
---
tests/amdgpu/amdgpu_test.h | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/tests/amdgpu/amdgpu_te
On 09/14/2018 09:09 PM, Christian König wrote:
The heap is checked by the kernel and not libdrm, to make it even worse
it prevented allocating resources other than VRAM and GTT.
Signed-off-by: Christian König
Reviewed-by: Junwei Zhang
---
amdgpu/amdgpu_bo.c | 9 ++---
1 file changed,
On 09/14/2018 09:09 PM, Christian König wrote:
Add allocation tests for GDW, GWS and OA.
Signed-off-by: Christian König
---
tests/amdgpu/amdgpu_test.h | 48 +-
tests/amdgpu/bo_tests.c| 21
2 files changed, 47 insertions(+)
On 09/14/2018 07:54 PM, Christian König wrote:
Am 13.09.2018 um 11:29 schrieb Zhang, Jerry(Junwei):
On 09/11/2018 05:56 PM, Christian König wrote:
Don't grab the reservation lock any more and simplify the handling
quite
a bit.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/a
On 10/04/2018 05:02 PM, Christian König wrote:
That also simplifies handling quite a bit.
Signed-off-by: Christian König
Reviewed-by: Junwei Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amd
On 10/12/2018 11:21 AM, Emily Deng wrote:
For sriov, when first run windows guest, then run linux guest, the gds
vmid0 size will be reset to 0 by windows guest. So if the value has been
reset to 0, then set the value to the default value in linux guest.
Signed-off-by: Emily Deng
---
drivers/g
On 10/12/2018 03:39 PM, Christian König wrote:
Am 12.10.2018 um 05:21 schrieb Emily Deng:
For sriov, when first run windows guest, then run linux guest, the gds
vmid0 size will be reset to 0 by windows guest. So if the value has been
reset to 0, then set the value to the default value in linux g
On 10/12/2018 05:34 PM, Emily Deng wrote:
For sriov, when first run windows guest, then run linux guest, the gds
vmid0 size will be reset to 0 by windows guest. So if the value has been
reset to 0, then set the value to the default value in linux guest.
v2:
Fixed value instead of reading mmGDS_V
On 10/12/2018 06:08 PM, Emily Deng wrote:
For sriov, when first run windows guest, then run linux guest, the gds
vmid0 size will be reset to 0 by windows guest. So if the value has been
reset to 0, then set the value to the default value in linux guest.
v2:
Fixed value instead of reading mmGDS_V
On 10/19/2018 12:27 AM, Thomas Zimmermann wrote:
Unified initialization and relesae of the global TTM state is provided
by struct ttm_global and its interfaces.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 63 ++---
drivers/gpu/drm/amd/am
A question in ttm_bo.c
On 10/20/2018 12:41 AM, Christian König wrote:
Make sure that the global BO state is always correctly initialized.
This allows removing all the device code to initialize it.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 59 +-
On 10/20/2018 12:41 AM, Christian König wrote:
As the name says we only need one global instance of ttm_mem_global.
Drop all the driver initialization and just use a single exported
instance which is initialized during BO global initialization.
Signed-off-by: Christian König
Patch 1, 2, 3, 5
A question for ttm_bo.c
On 10/20/2018 12:41 AM, Christian König wrote:
Make sure that the global BO state is always correctly initialized.
This allows removing all the device code to initialize it.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 59 +
On 10/22/2018 08:35 PM, Christian König wrote:
Am 22.10.18 um 08:45 schrieb Zhang, Jerry(Junwei):
A question in ttm_bo.c
[SNIP]
int ttm_bo_device_release(struct ttm_bo_device *bdev)
{
@@ -1623,18 +1620,25 @@ int ttm_bo_device_release(struct
ttm_bo_device *bdev
On 10/23/2018 12:09 AM, Rex Zhu wrote:
When the va address located in the last pd entry,
Do you mean the root PD?
maybe we need roundup root PD in amdgpu_vm_entries_mask() like
amdgpu_vm_num_entries().
BTW, looks amdgpu_vm_entries_mask() is going to replace the
amdgpu_vm_num_entries()
Jer
On 10/22/2018 05:47 PM, Rex Zhu wrote:
csa buffer will be created per ctx, when ctx fini,
the csa buffer and va will be released. so need to
do ctx_mgr fin before vm fini.
Signed-off-by: Rex Zhu
Reviewed-by: Junwei Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +-
1 file changed,
On 10/23/2018 11:29 AM, Rex Zhu wrote:
when the VA address located in the last PD entries,
the alloc_pts will faile.
Use the right PD mask instand of hardcode, suggested
by jerry.zhang.
Signed-off-by: Rex Zhu
Thanks to verify that.
Feel free to add
Reviewed-by: Junwei Zhang
Also like to ge
On 10/23/2018 01:12 PM, Zhang, Jerry(Junwei) wrote:
On 10/23/2018 11:29 AM, Rex Zhu wrote:
when the VA address located in the last PD entries,
the alloc_pts will faile.
Use the right PD mask instand of hardcode, suggested
by jerry.zhang.
Signed-off-by: Rex Zhu
Thanks to verify that.
Feel
On 10/24/18 3:07 AM, Marek Olšák wrote:
From: Marek Olšák
We need commit log and sign-off here.
BTW, have you encounter any issue about that?
---
amdgpu/amdgpu_bo.c | 19 +--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/amdgpu/amdgpu_bo.c b/amdgpu/amdgp
On 10/24/18 3:07 AM, Marek Olšák wrote:
From: Marek Olšák
commit log and sign-off here as well.
And any reason for that?
Regards,
Jerry
---
amdgpu/amdgpu_bo.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/amdgpu/amdgpu_bo.c b/amdgpu/amdgpu_bo.c
inde
Patch 3, 5 is
Acked-by: Junwei Zhang
Others are
Reviewed-by: Junwei Zhang
On 10/4/18 9:12 PM, Christian König wrote:
No need for that any more. Just replace the list when there isn't enough
room any more for the additional fence.
Signed-off-by: Christian König
---
drivers/dma-buf/reservat
On 10/4/18 9:12 PM, Christian König wrote:
And drop the now superflous extra reservations.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 4
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 15 ++-
2 files changed, 6 insertions(+), 13 deletions(-)
dif
On 11/2/18 4:44 PM, Christian König wrote:
Instead of delaying that to the first query. Otherwise we could try to use the
SDMA for VM updates before the IB tests are done.
Be curious:
Does that happen when App opens dri node without libdrm?
since device init always queries info at first.
Regar
On 11/2/18 5:32 PM, Christian König wrote:
Am 02.11.18 um 10:19 schrieb Zhang, Jerry(Junwei):
On 11/2/18 4:44 PM, Christian König wrote:
Instead of delaying that to the first query. Otherwise we could try
to use the
SDMA for VM updates before the IB tests are done.
Be curious:
Does that
On 11/6/18 7:59 PM, Christian König wrote:
Am 06.11.18 um 12:54 schrieb Trigger Huang:
ttm_bo_glob and ttm_mem_glob are defined as structure instance, while
not allocated by kzalloc, so kfree should not be invoked to release
them anymore. Otherwise, it will cause the following kernel BUG when
un
On 11/7/18 1:15 PM, Trigger Huang wrote:
Currently, SDMA page queue is not used under SR-IOV VF, and this queue will
cause ring test failure in amdgpu module reload case. So just disable it.
Signed-off-by: Trigger Huang
Looks we ran into several issues about it on vega.
kfd also disabled vega
nce of priority aware gpu-scheduler ... unless we are going to remove the
"KERNEL" priority and always do the mapping/unmapping in page_queue ...
/Monk
-Original Message-
From: amd-gfx On Behalf Of Zhang,
Jerry(Junwei)
Sent: Wednesday, November 7, 2018 1:26 PM
To: Huang, Trigger ; amd
On 11/7/18 3:55 PM, Koenig, Christian wrote:
Am 07.11.18 um 08:41 schrieb Zhang, Jerry(Junwei):
On 11/7/18 3:29 PM, Koenig, Christian wrote:
Hi guys,
this is necessary for recoverable page fault handling.
When the normal SDMA queue is blocked because of a page fault the SDMA
firmware will
On 11/8/18 1:29 AM, Alex Deucher wrote:
Use the paging queue for buffer functions to avoid contention
with the other queues.
Signed-off-by: Alex Deucher
Reviewed-by: Junwei Zhang
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
On 11/8/18 1:29 AM, Alex Deucher wrote:
Use page queue 0 rather than 1 to avoid contention with GPUVM
updates using page queue 0.
Signed-off-by: Alex Deucher
A little confuse, I thought we were going to use page queue(in any
instance) for PT update,
gfx ring for general sdma jobs.
Any miss
+ Curry
On 11/8/18 10:59 AM, Alex Deucher wrote:
On Wed, Nov 7, 2018 at 9:05 PM Zhang, Jerry(Junwei) wrote:
On 11/8/18 1:29 AM, Alex Deucher wrote:
Use the paging queue for buffer functions to avoid contention
with the other queues.
Signed-off-by: Alex Deucher
Reviewed-by: Junwei Zhang
On 11/21/18 3:11 PM, Brajeswar Ghosh wrote:
Remove gca/gfx_8_0_d.h which is included more than once
Signed-off-by: Brajeswar Ghosh
Reviewed-by: Junwei Zhang
---
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
please ignore this patch, there is typo in code.
On 11/23/18 4:01 PM, Junwei Zhang wrote:
Some variants don't support UVD and VCE.
Signed-off-by: Junwei Zhang
---
drivers/gpu/drm/amd/amdgpu/vi.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drive
On 11/24/18 3:32 AM, Deucher, Alexander wrote:
Is this required? Are the harvesting fuses incorrect? If the blocks
are harvested, we should bail out of the blocks properly during init.
Also, please make this more explicit if we still need it. E.g.,
The harvest fuse is indeed disabling
On 11/26/18 5:28 PM, Christian König wrote:
Am 26.11.18 um 03:38 schrieb Zhang, Jerry(Junwei):
On 11/24/18 3:32 AM, Deucher, Alexander wrote:
Is this required? Are the harvesting fuses incorrect? If the blocks
are harvested, we should bail out of the blocks properly during
init. Also
On 12/4/18 12:21 AM, Alex Deucher wrote:
Update switch limit on newer polaris variants. This may fix
flickering with high refresh rates with mclk switching enabled.
Signed-off-by: Alex Deucher
Reviewed-by: Junwei Zhang
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 5 -
1 fi
On 12/4/18 12:21 AM, Alex Deucher wrote:
Adjust limits for newer polaris variants.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/smum
we can drop MC update patch, since a new fw could fix that.
Regards,
Jerry
On 12/7/18 3:19 PM, Junwei Zhang wrote:
Some new variants require different firmwares.
Signed-off-by: Junwei Zhang
---
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
On 12/11/18 4:06 AM, Alex Deucher wrote:
On Fri, Dec 7, 2018 at 3:40 AM Zhang, Jerry(Junwei) wrote:
we can drop MC update patch, since a new fw could fix that.
Shouldn't we apply this as well for consistency?
I did apply it for simple test.
That looks no harm.
But confirmed the MC fir
On 1/8/19 6:55 PM, Tao Zhou wrote:
Fix CPDMA hang in PRT mode for both of VEGA10 and VEGA20
Change-Id: I0e5e089d2192063c4a04fa6dbd534f25eb0177be
Signed-off-by: Tao Zhou
Tested-by: Yukun.Li
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 +-
1 file changed, 5 insertions(+), 5 deletion
On 1/9/19 10:23 AM, Zhou1, Tao wrote:
-Original Message-
From: amd-gfx On Behalf Of
Zhang, Jerry(Junwei)
Sent: 2019年1月9日 9:39
To: Zhou1, Tao ; amd-gfx@lists.freedesktop.org
Cc: Li, Yukun1
Subject: Re: [PATCH] drm/amdgpu: fix CPDMA hang in PRT mode for VEGA20
On 1/8/19 6:55 PM, Tao
On 4/8/19 9:13 PM, Christian König wrote:
When ttm_put_pages() tries to figure out whether it's dealing with
transparent hugepages, it just reads past the bounds of the pages array
without a check.
v2: simplify the test if enough pages are left in the array (Christian).
Series is Reviewed-by: J
On 07/13/2018 11:19 PM, Christian König wrote:
Move job related defines, structure and function declarations to
amdgpu_job.h
Signed-off-by: Christian König
The series is
Reviewed-by: Junwei Zhang
One more cleanup is on the way.
Jerry
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 46 +--
On 07/16/2018 04:31 PM, Christian König wrote:
Am 16.07.2018 um 04:59 schrieb Junwei Zhang:
To check rq pointer before adding entity into it.
That avoids NULL pointer access in some case.
Suggested-by: Christian König
Signed-off-by: Junwei Zhang
---
drivers/gpu/drm/scheduler/gpu_scheduler.c
On 07/16/2018 05:11 PM, Christian König wrote:
Am 16.07.2018 um 11:01 schrieb Zhang, Jerry (Junwei):
On 07/16/2018 04:31 PM, Christian König wrote:
Am 16.07.2018 um 04:59 schrieb Junwei Zhang:
To check rq pointer before adding entity into it.
That avoids NULL pointer access in some case
On 07/16/2018 05:54 PM, Michel Dänzer wrote:
On 2018-07-16 11:23 AM, Junwei Zhang wrote:
To check rq pointer before adding entity into it.
That avoids NULL pointer access in some case.
v2: move the check to caller
Suggested-by: Christian König
Signed-off-by: Junwei Zhang
---
drivers/gpu/dr
On 07/17/2018 05:04 PM, Christian König wrote:
Otherwise we leak file descriptors into child processes.
Signed-off-by: Christian König
Yeah, that's the key point that dup could remove CLOEXEC effect.
Reviewed-and-Tested-by: Junwei Zhang
---
amdgpu/amdgpu_device.c | 5 +++--
1 file chan
On 07/18/2018 03:38 AM, Alex Deucher wrote:
Needs ATPX rather than _PR3.
Bug: https://bugzilla.kernel.org/show_bug.cgi?id=200517
Signed-off-by: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Junwei Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c | 1 +
1 file changed, 1
On 07/21/2018 12:33 AM, Michel Dänzer wrote:
From: Michel Dänzer
We were testing the register offset, instead of the value stored in the
register, therefore always timing out the loop.
This reduces suspend time of the system in the bug report below by ~600
ms.
Bugzilla: https://bugs.freedeskt
On 07/20/2018 11:47 PM, Andrey Grodzovsky wrote:
Problem:
amdgpu_ttm_set_buffer_funcs_status destroys adev->mman.entity on suspend
without releasing adev->mman.bdev.man[TTM_PL_VRAM].move fence
so on resume the new drm_sched_entity.fence_context causes
the warning against the old fence context whi
On 07/25/2018 12:54 AM, Alex Deucher wrote:
The address printed is the actual address, not the page.
Signed-off-by: Alex Deucher
Reviewed-by: Junwei Zhang
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/am
On 07/26/2018 04:29 AM, Bas Nieuwenhuizen wrote:
Every set_pages_array_wb call resulted in cross-core
interrupts and TLB flushes. Merge more of them for
less overhead.
This reduces the time needed to free a 1.6 GiB GTT WC
buffer as part of Vulkan CTS from ~2 sec to < 0.25 sec.
(Allocation still
On 07/26/2018 07:07 PM, Christian König wrote:
Am 26.07.2018 um 12:02 schrieb Junwei Zhang:
pass the evict flag instead of hard code
Signed-off-by: Junwei Zhang
I can't come up with a reason why we shouldn't do this, but please test
suspend/resume with this change just to be extra sure.
Y
On 07/31/2018 09:49 AM, Zhou, David(ChunMing) wrote:
Typo, excepted -> expected
-Original Message-
From: amd-gfx On Behalf Of Zhou,
David(ChunMing)
Sent: Tuesday, July 31, 2018 9:41 AM
To: Koenig, Christian ; Zhang, Jerry
; amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 1/2] drm/am
On 07/30/2018 06:47 PM, Christian König wrote:
Am 30.07.2018 um 12:02 schrieb Junwei Zhang:
From: Chunming Zhou
v2: get original gem handle from gobj
v3: update find bo data structure as union(in, out)
simply some code logic
Do we now have an open source user for this, so that we can up
On 07/31/2018 03:03 PM, Christian König wrote:
Am 31.07.2018 um 08:58 schrieb Zhang, Jerry (Junwei):
On 07/30/2018 06:47 PM, Christian König wrote:
Am 30.07.2018 um 12:02 schrieb Junwei Zhang:
From: Chunming Zhou
v2: get original gem handle from gobj
v3: update find bo data structure as
On 07/31/2018 04:13 PM, Christian König wrote:
Am 31.07.2018 um 10:05 schrieb Zhang, Jerry (Junwei):
On 07/31/2018 03:03 PM, Christian König wrote:
Am 31.07.2018 um 08:58 schrieb Zhang, Jerry (Junwei):
On 07/30/2018 06:47 PM, Christian König wrote:
Am 30.07.2018 um 12:02 schrieb Junwei Zhang
On 07/31/2018 04:52 PM, Christian König wrote:
Am 31.07.2018 um 09:51 schrieb Huang Rui:
On Mon, Jul 30, 2018 at 04:51:59PM +0200, Christian König wrote:
Instead of having extra handling just create an empty bo_list when no
handle is provided.
Reviewed-by: Huang Rui
In which case, when the c
On 07/31/2018 05:26 PM, Huang Rui wrote:
On Tue, Jul 31, 2018 at 05:00:46PM +0800, Koenig, Christian wrote:
Am 31.07.2018 um 11:09 schrieb Huang Rui:
On Tue, Jul 31, 2018 at 10:52:06AM +0200, Christian König wrote:
Am 31.07.2018 um 09:51 schrieb Huang Rui:
On Mon, Jul 30, 2018 at 04:51:59PM +
On 07/31/2018 05:04 PM, Christian König wrote:
Am 31.07.2018 um 10:58 schrieb Zhang, Jerry (Junwei):
On 07/31/2018 04:13 PM, Christian König wrote:
Am 31.07.2018 um 10:05 schrieb Zhang, Jerry (Junwei):
On 07/31/2018 03:03 PM, Christian König wrote:
Am 31.07.2018 um 08:58 schrieb Zhang, Jerry
On 07/12/2018 02:36 PM, Nayan Deshmukh wrote:
Signed-off-by: Nayan Deshmukh
---
drivers/gpu/drm/scheduler/gpu_scheduler.c | 3 +++
include/drm/gpu_scheduler.h | 2 ++
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/scheduler/gpu_scheduler.c
b/drivers/gpu/drm/sch
On 08/01/2018 07:31 PM, Christian König wrote:
Start to use the scheduler load balancing for userspace SDMA
command submissions.
In this case, each SDMA could load all SDMA(instances) rqs, and UMD will not
specify a ring id.
If so, we may abstract a set of rings for each type of IP, associate
On 08/02/2018 01:50 PM, Nayan Deshmukh wrote:
On Thu, Aug 2, 2018 at 10:31 AM Zhang, Jerry (Junwei) mailto:jerry.zh...@amd.com>> wrote:
On 07/12/2018 02:36 PM, Nayan Deshmukh wrote:
> Signed-off-by: Nayan Deshmukh mailto:nayan26deshm...@gmail.com>>
> ---
&
On 08/02/2018 02:08 PM, Nayan Deshmukh wrote:
On Thu, Aug 2, 2018 at 11:29 AM Zhang, Jerry (Junwei) mailto:jerry.zh...@amd.com>> wrote:
On 08/02/2018 01:50 PM, Nayan Deshmukh wrote:
>
>
> On Thu, Aug 2, 2018 at 10:31 AM Zhang, Jerry (Junwei) mailto:jerr
On 08/02/2018 08:00 AM, Marek Olšák wrote:
On Wed, Aug 1, 2018 at 2:29 PM, Christian König
wrote:
Am 01.08.2018 um 19:59 schrieb Marek Olšák:
On Wed, Aug 1, 2018 at 1:52 PM, Christian König
wrote:
Am 01.08.2018 um 19:39 schrieb Marek Olšák:
On Wed, Aug 1, 2018 at 2:32 AM, Christian König
On 08/02/2018 10:04 PM, Christian König wrote:
The kernel handles are dense and the kernel always tries to use the
lowest free id. Use this to implement a more efficient handle table
by using a resizeable array instead of a hash.
Signed-off-by: Christian König
---
amdgpu/Makefile.sources | 4
On 08/02/2018 10:55 PM, Michel Dänzer wrote:
On 2018-08-02 04:04 PM, Christian König wrote:
This way we can always find a BO structure by its handle.
Signed-off-by: Christian König
Typo in the shortlog: should be "lookup" instead of "lockup".
Also, this patch should really be after patch 4.
On 08/02/2018 06:09 PM, Christian König wrote:
Am 02.08.2018 um 07:50 schrieb Zhang, Jerry (Junwei):
On 08/01/2018 07:31 PM, Christian König wrote:
Start to use the scheduler load balancing for userspace SDMA
command submissions.
In this case, each SDMA could load all SDMA(instances) rqs
On 08/03/2018 07:34 PM, Christian König wrote:
We have so few devices that just walking a linked list is probably
faster.
Signed-off-by: Christian König
Series is
Reviewed-and-Tested-by: Junwei Zhang
---
amdgpu/amdgpu_device.c | 49
am
On 08/03/2018 07:34 PM, Christian König wrote:
The kernel handles are dense and the kernel always tries to use the
lowest free id. Use this to implement a more efficient handle table
by using a resizeable array instead of a hash.
v2: add handle_table_fini function, extra key checks,
fix typ
On 08/07/2018 04:20 PM, Christian König wrote:
Well NAK, that wasn't the intention of putting all BOs into the handle table.
You should still use the kernel implementation.
I thought we have discussed that in below mail thread. any gap?
[PATCH 1/2] drm/amdgpu: return bo itself if userptr is c
On 08/07/2018 05:33 PM, Christian König wrote:
Am 07.08.2018 um 10:28 schrieb Zhang, Jerry (Junwei):
On 08/07/2018 04:20 PM, Christian König wrote:
Well NAK, that wasn't the intention of putting all BOs into the handle table.
You should still use the kernel implementation.
I thought we
On 08/07/2018 03:51 PM, zhoucm1 wrote:
On 2018年08月07日 15:26, Junwei Zhang wrote:
When create bo from user memory, add it to handle table
for future query.
Signed-off-by: Junwei Zhang
---
amdgpu/amdgpu_bo.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/amd
On 08/07/2018 05:59 PM, Christian König wrote:
Am 07.08.2018 um 11:52 schrieb Zhang, Jerry (Junwei):
On 08/07/2018 05:33 PM, Christian König wrote:
Am 07.08.2018 um 10:28 schrieb Zhang, Jerry (Junwei):
On 08/07/2018 04:20 PM, Christian König wrote:
Well NAK, that wasn't the intenti
On 08/08/2018 02:51 PM, Christian König wrote:
Am 08.08.2018 um 06:08 schrieb Junwei Zhang:
a helper function to create and initialize amdgpu bo
Can the new function be also used to initialize a BO structure during import?
Yeah, that's what I'm going to talk a bit more in this patch.
(actual
On 08/08/2018 02:48 PM, Christian König wrote:
Am 08.08.2018 um 06:23 schrieb zhoucm1:
On 2018年08月08日 12:08, Junwei Zhang wrote:
Userspace needs to know if the user memory is from BO or malloc.
v2: update mutex range and rebase
Signed-off-by: Junwei Zhang
---
amdgpu/amdgpu.h| 23
On 08/08/2018 04:51 PM, Christian König wrote:
Am 08.08.2018 um 10:43 schrieb zhoucm1:
On 2018年08月08日 14:48, Christian König wrote:
Am 08.08.2018 um 06:23 schrieb zhoucm1:
On 2018年08月08日 12:08, Junwei Zhang wrote:
Userspace needs to know if the user memory is from BO or malloc.
v2: updat
On 08/09/2018 03:40 PM, Yu, Qiang wrote:
Comments inline.
Regards,
Qiang
From: amd-gfx on behalf of Junwei Zhang
Sent: Thursday, August 9, 2018 11:19 AM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Jerry; Koenig, Christian
Subject: [PATCH libdrm] amdgp
On 08/10/2018 10:21 PM, Christian König wrote:
Well NAK, that is intentionally kept local to the amdgpu_ttm.c file.
This way we can make sure that we don't accidentally leak the structure
somewhere else.
Thanks to explain that.
I thought those were left in the file accidentally.
Then fine to
On 08/10/2018 10:20 PM, Christian König wrote:
Am 10.08.2018 um 07:05 schrieb Junwei Zhang:
the flink bo is used to export
Why should we do this? That makes no sense, this way we would create a memory
leak.
Get the thought from bo_import code, but neglected the detail of
DRM_IOCTL_GEM_CLOS
On 08/13/2018 11:03 AM, Zhang, Jerry (Junwei) wrote:
On 08/10/2018 10:20 PM, Christian König wrote:
Am 10.08.2018 um 07:05 schrieb Junwei Zhang:
the flink bo is used to export
Why should we do this? That makes no sense, this way we would create a memory
leak.
Get the thought from
On 08/13/2018 04:29 PM, Christian König wrote:
Am 13.08.2018 um 08:43 schrieb Zhang, Jerry (Junwei):
On 08/13/2018 11:03 AM, Zhang, Jerry (Junwei) wrote:
On 08/10/2018 10:20 PM, Christian König wrote:
Am 10.08.2018 um 07:05 schrieb Junwei Zhang:
the flink bo is used to export
Why should we
On 08/13/2018 06:16 PM, Christian König wrote:
Am 13.08.2018 um 11:58 schrieb Huang Rui:
From: Christian König
Add bulk move pos to store the pointer of first and last buffer object.
The list in between will be bulk moved on lru list.
Signed-off-by: Christian König
Signed-off-by: Huang Rui
On 08/13/2018 05:58 PM, Huang Rui wrote:
I continue to work for bulk moving that based on the proposal by Christian.
Background:
amdgpu driver will move all PD/PT and PerVM BOs into idle list. Then move all of
them on the end of LRU list one by one. Thus, that cause so many BOs moved to
the end
On 08/13/2018 06:14 PM, Christian König wrote:
Am 13.08.2018 um 12:06 schrieb Junwei Zhang:
a helper function to create and initialize amdgpu bo
v2: update error handling: add label and free bo
v3: update error handling: separate each error label
v4: update error handling and free flink bo in b
On 08/14/2018 04:26 PM, Christian König wrote:
Am 14.08.2018 um 05:00 schrieb Junwei Zhang:
Fix potential memory leak when handle flink bo in bo import.
Free the flink bo after bo import and in error handling.
Signed-off-by: Junwei Zhang
Reviewed-by: Christian König for the series.
I assum
On 08/14/2018 05:58 PM, Michel Dänzer wrote:
From: Michel Dänzer
The compiler points out that an int doesn't work as intended if
dev->bo_handles.max_key > INT_MAX:
../../amdgpu/amdgpu_bo.c: In function ‘amdgpu_find_bo_by_cpu_mapping’:
../../amdgpu/amdgpu_bo.c:550:16: warning: comparison of int
On 08/14/2018 05:58 PM, Michel Dänzer wrote:
From: Michel Dänzer
Arithmetic using void* pointers isn't defined by the C standard, only as
a GCC extension. Avoids compiler warnings:
../../amdgpu/amdgpu_bo.c: In function ‘amdgpu_find_bo_by_cpu_mapping’:
../../amdgpu/amdgpu_bo.c:554:48: warning:
On 08/15/2018 07:25 PM, Christian König wrote:
Stupid me, max_key must always be larger than key.
Signed-off-by: Christian König
Good catch
Reviewed-by: Junwei Zhang
---
amdgpu/handle_table.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/amdgpu/handle_table.c b/amd
On 08/17/2018 08:24 PM, Christian König wrote:
We need to figure out the address after validating the BO, not before.
Signed-off-by: Christian König
Reviewed-by: Junwei Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dr
On 08/17/2018 08:24 PM, Christian König wrote:
We need to figure out the address after validating the BO, not before.
Signed-off-by: Christian König
Reviewed-by: Junwei Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dr
On 08/17/2018 08:24 PM, Christian König wrote:
We need to figure out the address after validating the BO, not before.
Signed-off-by: Christian König
Reviewed-by: Junwei Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dr
On 08/20/2018 11:39 AM, Yintian Tao wrote:
Repeat enable dpm under pass-through because there is no actually
hardware-fini and real power-off when guest vm shutdown or reboot.
Otherwise, under pass-through it will be failed to populate populate
duplicate "populate"
and upload SCLK MCLK DPM le
On 08/22/2018 05:23 AM, Andrey Grodzovsky wrote:
Problem:
When executing echo 1 > /sys/class/drm/card0/device/remove kasan warning
as bellow and page fault happen because adev->gart.pages already freed by the
time amdgpu_gart_unbind is called.
BUG: KASAN: user-memory-access in amdgpu_gart_unbind
On 08/22/2018 05:25 AM, Felix Kuehling wrote:
Set the VM size based on system memory size between the ASIC-specific
limits given by min_vm_size and max_bits. GFXv9 GPUs will keep their
default VM size of 256TB (48 bit). Only older GPUs will adjust VM size
depending on system memory size.
This ma
On 08/22/2018 03:52 PM, Huang Rui wrote:
I continue to work for bulk moving that based on the proposal by Christian.
Background:
amdgpu driver will move all PD/PT and PerVM BOs into idle list. Then move all of
them on the end of LRU list one by one. Thus, that cause so many BOs moved to
the end
On 08/22/2018 04:38 PM, Huang Rui wrote:
On Wed, Aug 22, 2018 at 04:33:30PM +0800, Huang Rui wrote:
On Wed, Aug 22, 2018 at 04:07:20PM +0800, Zhang, Jerry wrote:
On 08/22/2018 03:52 PM, Huang Rui wrote:
I continue to work for bulk moving that based on the proposal by Christian.
Background:
am
On 08/22/2018 04:33 PM, Huang Rui wrote:
On Wed, Aug 22, 2018 at 04:07:20PM +0800, Zhang, Jerry wrote:
On 08/22/2018 03:52 PM, Huang Rui wrote:
I continue to work for bulk moving that based on the proposal by Christian.
Background:
amdgpu driver will move all PD/PT and PerVM BOs into idle list
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