To fix mode2 reset failure.
Should power on VPE when hw_init.
Signed-off-by: Peyton Lee
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
index 70c5cc80ecdc
The vpe dpm settings should be done before firmware is loaded.
Otherwise, the frequency cannot be successfully raised.
Signed-off-by: Peyton Lee
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c | 2 +-
drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c | 14 +++---
2 files changed, 8 insertions(+), 8
Some version of BIOS does not enable all clock levels,
resulting in high level clock frequency of 0.
The number of valid CLKs must be confirmed in advance.
Signed-off-by: Peyton Lee
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions
enable vpe dpm
Signed-off-by: Peyton Lee
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c | 250
drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.h | 12 ++
drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c | 15 ++
3 files changed, 277 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu
pm supports return vpe clock table and soc clock table
Signed-off-by: Peyton Lee
---
drivers/gpu/drm/amd/display/dc/dm_pp_smu.h| 2 ++
drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 10 ++
drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 1 +
.../drm/amd/pm/swsmu/smu14