nd
Reported-by: Mike Lothian
BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1700
Fixes: 91f86d4cce2 ("drm/amd/display: Use vblank control events for PSR
enable/disable")
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 32 +++---
by default.
Cc: Aaron Liu
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 53363728dbb..b
feature mask for older DCN.
Add a global debug flag that can be set to disable it for either.
Cc: Harry Wentland
Cc: Roman Li
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 17 -
drivers/gpu/drm/amd/include/amd_shared.h| 5
ASIC that can
support it.
Fixes: ab37c6527bb1 ("drm/amd/display: Optimize bandwidth on following fast
update")
Cc: Bhawanpreet Lakha
Cc: Mikita Lipski
Reported-by: Tom St Denis
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 15 +--
1 f
/amd/display: Fallback to clocks which meet requested voltage on
DCN31
Nicholas Kazlauskas (1):
drm/amd/display: Fix deadlock when falling back to v2 from v3
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 35 +---
.../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c | 13 +++--
drivers/gpu
em up such that
they're only required for the psp invocation itself.
Fixes: bf62221e9d0e ("drm/amd/display: Add DCN3.1 HDCP support")
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Aric Cyr
---
drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c | 6 ++
1 file changed
ltage level matches. In the case that no match gets
found, parser now falls back to searching for the max clock which meets the
requested voltage (i.e. its corresponding voltage is below requested).
Signed-off-by: Michael Strauss
Reviewed-by: Nicholas Kazlauskas
---
.../amd/display/dc/clk_mgr/
links.
- Added support for handling HPD RX interrupts
Signed-off-by: Meenakshikumar Somasundaram
Reviewed-by: Jun Lei
Acked-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 54 +++
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 28 ++
drivers
to
hpd handle function
Fixes: 5cecad78ea53 ("drm/amd/display: Support for SET_CONFIG processing with
DMUB")
Signed-off-by: Jude Shih
Reviewed-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 23 +--
1 file changed, 16 insertions(+), 7 deletion
: Jude Shih
Reviewed-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 12
drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 1 +
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c | 1 +
3 files changed, 14 insertions(+)
diff --git a/drivers/gpu/drm
when psr is not supported.
Leave a TODO indicating that this support should be extended in the
future to delay independent of the vblank interrupt.
Fixes: 3d1508b73ff1 ("drm/amdgpu/display: set vblank_disable_immediate for DC")
Cc: Harry Wentland
Cc: Alex Deucher
Signed-off-by: Nich
cover all possible engine IDs.
Even if it does by try to access one of these registers by accident
the offset will be 0 and we'll get a warning during the access.
Fixes: 2fe9a0e1173f ("drm/amd/display: Fix DCN3 B0 DP Alt Mapping")
Cc: Mario Limonciello
Cc: Harry Wentland
Signed-of
nsmitter - TRANSMITTER_UNIPHY_A;
[How]
That assignment occurs later depending on the ASIC version. It's only
needed on DCN31+ and only after link_enc is already assigned.
Fixes: 35b6fe499be7 ("drm/amd/display: fix a crash on USB4 over C20 PHY")
Cc: Rodrigo Siqueira
Cc: Harry Wentland
Signed-off-
roper places in
link_enc assignment")
Cc: Qingqing Zhuo
Cc: Aurabindo Pillai
Cc: Rodrigo Siqueira
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_en
t used for FS video.
We don't need to copy over the VIC or polarity in the case of FS video
modes because those don't change.
Fixes: a372f4abec ("drm/amd/display: Skip modeset for front porch change")
Cc: Aurabindo Pillai
Signed-off-by: Nicholas Kazlauskas
---
drivers
[Why & How]
Extend existing support for DCN2.1 DMUB diagnostic logging to
DCN3.1 so we can collect useful information if the DMUB hangs.
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/dmub/src/dmub_dcn31.c | 60 +++
.../gpu/drm/amd/display/dmub/src/dmub_dcn
us.
v2: rebase, naming, comments and spelling fixes
Cc: Rodrigo Siqueira
Cc: Bhawanpreet Lakha
Cc: Harry Wentland
Cc: Leo Li
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 700 +++---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 11 +-
DRM contract to have userspace gracefully handle validation
failures when they occur.
Valdiation occurs as part of DC and this in particular affects RV, so
disable this in dcn10_global_validation.
Cc: Hersen Wu
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resour
ock (which shouldn't be 0) when deciding to send the hardmin.
[How]
Check the clocks != 0 instead of the actual clocks.
Fixes: 9ed9203c3ee7 ("drm/amd/powerplay: rv dal-pplib interface refactor
powerplay part")
Cc: Hersen Wu
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/d
Cc: Leo Li
Cc: Bhawanpreet Lakha
Cc: Rodrigo Siqueira
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/os_types.h | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/os_types.h
b/drivers/gpu/drm/amd/display/dc/os_typ
state for DC global validation.
The workaround can stay until this has been fixed in DM.
Cc: Hersen Wu
Cc: Harry Wentland
Cc: Leo Li
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/
To match previous behavior and to not hang the kernel if someone
accidentally builds with KGDB enabled.
Fixes: 4324a1752045 ("drm/amd/display: Make BREAK_TO_DEBUGGER() a debug print")
Cc: Harry Wentland
Cc: Alex Deucher
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/
s: e1995f0909e3 ("drm/amd/display: Revalidate bandwidth before commiting DC
updates")
Cc: Hersen Wu
Cc: Bhawanpreet Lakha
Cc: Rodrigo Siqueira
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions
ssing.
Cc: Bhawanpreet Lakha
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/dmub/src/dmub_dcn30.c | 21 ++-
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c
b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn
r DCN revisions so align
dcn30 with those as well.
Cc: Bhawanpreet Lakha
Signed-off-by: Nicholas Kazlauskas
---
.../display/dc/irq/dcn30/irq_service_dcn30.c | 28 ---
1 file changed, 18 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/irq/
/restore of remap enable flag when programming MPCC
remap matrix.
Cc: Bhawanpreet Lakha
Signed-off-by: Aric Cyr
Signed-off-by: Nicholas Kazlauskas
---
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c| 27 ++-
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu
is leaves two future TODO items for our IRQ handling:
- Disabling IRQs in commit tail instead of atomic commit
- Mapping the pageflip interrupt to VUPDATE or something that's tied to
the frontend instead of the backend since the mapping to CRTC is not
correct
Cc: Bhawanpreet Lakha
Sign
[Why]
When enabling the debugfs for CRC capture we hit assertions caused by
register address and field masks and shifts missing.
[How]
We want these registers programmed, so add in the SRI/SF entries for
this register.
Cc: Bhawanpreet Lakha
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu
e object for pageflips as well, avoiding the
page fault issued caused by pageflipping under load with commits
executing out of order.
Cc: Harry Wentland
Cc: Bhawanpreet Lakha
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 199 ++
1 fi
dded bonus.
Cc: Bhawanpreet Lakha
Cc: Harry Wentland
Cc: Leo Li
Cc: Daniel Vetter
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 720 +++---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 11 +-
2 files changed, 280 insertions(+), 451 deletions(-
.
CCing dri-devel per Daniel's suggestion since this issue brought
some interesting misuse of private objects.
[1] https://bugzilla.kernel.org/show_bug.cgi?id=207383
Nicholas Kazlauskas (7):
drm/amd/display: Store tiling_flags and tmz_surface on dm_plane_state
drm/amd/display: Reset plane
ff-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 60 +++
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 2 +
2 files changed, 37 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/di
[Why]
So we're not racing with userspace or deadlocking DM.
[How]
These flags are now stored on dm_plane_state itself and acquried and
validated during commit_check, so just use those instead.
Cc: Daniel Vetter
Cc: Bhawanpreet Lakha
Cc: Rodrigo Siqueira
Signed-off-by: Nicholas Kazla
.
Cc: Bhawanpreet Lakha
Cc: Rodrigo Siqueira
Cc: Hersen Wu
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/driver
et.
So instead of querying new tiling_flags and tmz_surface use the ones
from the plane_state directly.
While we're at it, also update the force_disable_dcc option based
on the state from atomic check.
Cc: Bhawanpreet Lakha
Cc: Rodrigo Siqueira
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/dr
te at all for global validation.
Optimization can come later so we don't reset DC planes at all for
MEDIUM udpates and avoid validation, but we might require some extra
checks in DM to achieve this.
Cc: Bhawanpreet Lakha
Cc: Hersen Wu
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/
debug bus.
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Eric Yang
---
.../drm/amd/display/dc/dcn10/dcn10_hubbub.c | 1 +
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 10 +++-
.../drm/amd/display/dc/dcn30/dcn30_hubbub.c | 1 +
.../drm/amd/display/dc/dcn301/dcn301_hubbub.c | 1
. The most frequent of which appears to be when
all pipes turn off during IGT tests.
Cc: Harry Wentland
Fixes: d158560fc0e1 ("drm/amd/display: Add pstate verification and recovery for
DCN31")
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Eric Yang
---
drivers/gpu/drm/amd/display/dc/
amdgpu_dm and dc to interface with the
DMCUB.
The term DMCUB will generally refer to the actual microcontroller while
DMUB will generally refer to the software interface.
Cc: Harry Wentland
Nicholas Kazlauskas (9):
drm/amdgpu: Add ucode support for DMCUB
drm/amdgpu: Add PSP loading support for
DMCUB ucode requires secure loading through PSP. This is already
supported in PSP as GFX_FW_TYPE_DMUB, it just needs to be mapped from
AMDGPU_UCODE_ID_DMCUB to GFX_FW_TYPE_DMUB.
DMUB is a shorthand name for DMCUB and can be used interchangeably.
Signed-off-by: Nicholas Kazlauskas
---
drivers
ed to CONFIG_DRM_AMD_DC_DCN2_1 with the config option dropped.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/Kconfig | 6 +
drivers/gpu/drm/amd/display/Makefile | 8 +
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 256 +
.../gpu/drm/amd/display
first place this code
wasn't used.
Signed-off-by: Nicholas Kazlauskas
---
.../drm/amd/display/dc/dcn21/dcn21_resource.c | 31 ---
1 file changed, 31 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_
le to read registers - something DM helpers aren't setup
to do in software initialization.
So everything but the service creation itself will get deferred to
hardware initialization.
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 267 ++
[Why]
Support for DMUB only depends on support for DC. It doesn't use floating
point so we don't need to guard it by any specific DCN revision.
[How]
Drop the guards and cleanup the newlines around each one.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/displ
From: Yongqiang Sun
[Why]
PSP version format is AB.CD.EF.GH, where CD and GH is the main version.
current psp version check for dmcub loading dmcu check 0x00110029, in
case of some psp version eg: 0x00110227 which main version should be
0x00110027, will result in unexpeceted dmcub loading dmcu FW
service to DC for use.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/Makefile | 6 +-
.../drm/amd/display/dc/bios/command_table2.c | 91 ++
drivers/gpu/drm/amd/display/dc/core/dc.c | 8 +
drivers/gpu/drm/amd/display/dc/dc.h | 12 +
drivers/g
[Why]
DC can utilize the DMUB server to send commands to the DMUB but it's
the DM responsibility to pass it the service to use.
[How]
Create the dc_dmub_srv after we finish initializing the dmub_srv.
Cleanup the dc_dmub_srv before destroying the dmub_srv or dc.
Signed-off-by: Nicholas Kazla
The DMCUB is a secondary DMCU (Display MicroController Unit) that has
its own separate firmware. It's required for DMCU support on Renoir.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 11 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
From: Yongqiang Sun
[Why]
DMCU isn't intiliazed properly by dmcub loading due to dmcub initialize
sequence.
[How]
Change dmcu init sequece to meet dmcub initilize.
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
---
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c | 79 +++
The DMCUB firmware version can be read using the AMDGPU_INFO ioctl
or the amdgpu_firmware_info debugfs entry.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 12
include/uapi/drm/amdgpu_drm.h | 3 +++
2 files changed, 15 insertions
https://lists.freedesktop.org/archives/dri-devel/2017-October/155207.html
https://lists.freedesktop.org/archives/dri-devel/2018-September/189404.html
Nicholas Kazlauskas
Nicholas Kazlauskas (3):
drm: Add variable refresh rate properties to connector
drm: Add variable refresh property to DRM CRTC
dr
a userspace
controlled option.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/drm_atomic_uapi.c | 6 ++
drivers/gpu/drm/drm_connector.c | 35 +++
include/drm/drm_connector.h | 27
3 files changed, 68 insertions(+)
diff
atomic it isn't filtered
from legacy userspace queries. This allows for Xorg userspace drivers
to implement support in non-atomic setups.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/drm_atomic_helper.c | 1 +
drivers/gpu/drm/drm_atomic_uapi.c | 6 ++
drivers/gpu/drm/drm_c
t the current implementation treats
variable_refresh_enabled as a strict requirement for sending
the VRR enable *or* disable packet.
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 232 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 6
/dri-devel/2017-October/155207.html
https://lists.freedesktop.org/archives/dri-devel/2018-September/189404.html
https://lists.freedesktop.org/archives/dri-devel/2018-September/190910.html
Nicholas Kazlauskas (4):
drm: Add vrr_capable property to the drm connector
drm: Add vrr_en
g variable refresh rates using
drm_connector_attach_vrr_capable_property().
The value should be updated based on driver and hardware capabiltiy
by using drm_connector_set_vrr_capable_property().
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/drm_connec
pace drivers to implement support.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/drm_atomic_uapi.c | 4
drivers/gpu/drm/drm_crtc.c| 2 ++
drivers/gpu/drm/drm_mode_config.c | 6 ++
include/drm/drm_crtc.h| 9 +
include/drm/drm_mode_config.h | 5 +
5 fi
These include the drm_connector 'vrr_capable' and the drm_crtc
'vrr_enabled' properties.
Signed-off-by: Nicholas Kazlauskas
---
Documentation/gpu/drm-kms.rst | 7 +++
drivers/gpu/drm/drm_connector.c | 22 ++
2 files changed, 29 inserti
iable refresh state and capability before the CRTC
disable pass.
(3) Performing VRR stream updates on-flip is needed for enabling BTR
support.
VRR packets and timing adjustments are now tracked and compared to
previous values sent to the hardware.
Signed-off-by: Nicholas Kazlauskas
---
.../gp
are linked below for reference:
https://lists.freedesktop.org/archives/amd-gfx/2018-April/021047.html
https://lists.freedesktop.org/archives/dri-devel/2017-October/155207.html
https://lists.freedesktop.org/archives/dri-devel/2018-September/189404.htm
https://lists.freedesktop.org/archives/dri-devel/
g variable refresh rates using
drm_connector_attach_vrr_capable_property().
The value should be updated based on driver and hardware capabiltiy
by using drm_connector_set_vrr_capable_property().
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/drm_connec
pace drivers to implement support.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/drm_atomic_uapi.c | 4
drivers/gpu/drm/drm_crtc.c| 2 ++
drivers/gpu/drm/drm_mode_config.c | 6 ++
include/drm/drm_crtc.h| 9 +
include/drm/drm_mode_config.h | 5 +
5 fi
These include the drm_connector 'vrr_capable' and the drm_crtc
'vrr_enabled' properties.
Signed-off-by: Nicholas Kazlauskas
---
Documentation/gpu/drm-kms.rst | 7 +++
drivers/gpu/drm/drm_connector.c | 22 ++
2 files changed, 29 inserti
fresh state and capability before the CRTC
disable pass.
(3) Performing VRR stream updates on-flip is needed for enabling BTR
support.
VRR packets and timing adjustments are now tracked and compared to
previous values sent to the hardware.
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/dr
dri-devel/2018-September/189404.htm
https://lists.freedesktop.org/archives/dri-devel/2018-September/190910.html
https://lists.freedesktop.org/archives/dri-devel/2018-October/192211.html
https://lists.freedesktop.org/archives/dri-devel/2018-October/192874.html
Nicholas Kazlauskas (4):
drm: Add vrr
g variable refresh rates using
drm_connector_attach_vrr_capable_property().
The value should be updated based on driver and hardware capabiltiy
by using drm_connector_set_vrr_capable_property().
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/drm_connec
pace drivers to implement support.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/drm_atomic_uapi.c | 4
drivers/gpu/drm/drm_crtc.c| 2 ++
drivers/gpu/drm/drm_mode_config.c | 6 ++
include/drm/drm_crtc.h| 9 +
include/drm/drm_mode_config.h | 5 +
5 fi
These include the drm_connector 'vrr_capable' and the drm_crtc
'vrr_enabled' properties.
Signed-off-by: Nicholas Kazlauskas
---
Documentation/gpu/drm-kms.rst | 7 +++
drivers/gpu/drm/drm_connector.c | 22 ++
2 files changed, 29 inserti
ed to
previous values sent to the hardware.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 7 -
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 255 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 7 +-
3 files changed, 138 insertions(+)
e DCC attributes to both libdrm and amdgpu_dm.
Signed-off-by: Nicholas Kazlauskas
---
include/uapi/drm/amdgpu_drm.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 6a0d77dcfc47..faaad04814e4 100644
--- a/include/uap
These include the drm_connector 'vrr_capable' and the drm_crtc
'vrr_enabled' properties.
Signed-off-by: Nicholas Kazlauskas
Cc: Harry Wentland
Cc: Manasi Navare
Cc: Pekka Paalanen
Cc: Ville Syrjälä
Cc: Michel Dänzer
---
Documentation/gpu/drm-kms.rst | 7 +
g variable refresh rates using
drm_connector_attach_vrr_capable_property().
The value should be updated based on driver and hardware capabiltiy
by using drm_connector_set_vrr_capable_property().
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Manasi Navare
Reviewed-by: Harry Wentland
---
drive
pace drivers to implement support.
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Harry Wentland
Cc: Manasi Navare
---
drivers/gpu/drm/drm_atomic_uapi.c | 4
drivers/gpu/drm/drm_crtc.c| 2 ++
drivers/gpu/drm/drm_mode_config.c | 6 ++
include/drm/drm_crtc.h| 9 +++
ves/dri-devel/2018-September/190910.html
https://lists.freedesktop.org/archives/dri-devel/2018-October/192211.html
https://lists.freedesktop.org/archives/dri-devel/2018-October/192874.html
Nicholas Kazlauskas (5):
drm: Add vrr_capable property to the drm connector
drm: Add vrr_enabled property to dr
ed to
previous values sent to the hardware.
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Harry Wentland
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 7 -
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 255 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 7 +-
3
age flip timestap from being the previous timestamp
to the calculation to the next timestamp when position >= vtotal.
Signed-off-by: Nicholas Kazlauskas
Cc: Michel Dänzer
Cc: Harry Wentland
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 7 ++-
1 file changed, 6 insertions(+), 1 deleti
l but this
convetion is already in use for other drivers.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 5 +
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h| 2 ++
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
b
8bpc. This was the old
default before the range was uncapped.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 15 +++
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 1 +
2 files changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/amd/di
c for the panel since it
follows Intel's existing driver conventions.
This proprety should be removed once common drm support for max bpc
lands.
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 5 +
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h| 2 ++
bug.cgi?id=201585
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=200645
Fixes: e03fd3f300f6 ("drm/amd/display: Do not limit color depth to 8bpc")
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c| 16
.../gpu/drm/amd/display/a
evel/2017-October/155207.html
https://lists.freedesktop.org/archives/dri-devel/2018-September/189404.htm
https://lists.freedesktop.org/archives/dri-devel/2018-September/190910.html
https://lists.freedesktop.org/archives/dri-devel/2018-October/192211.html
https://lists.freedesktop.org/archives/dri-d
age flip timestamp from being the previous timestamp
to the calculation to the next timestamp when position >= vtotal.
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Harry Wentland
Cc: Michel Dänzer
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 7 ++-
1 file changed, 6 insertions(+),
g variable refresh rates using
drm_connector_attach_vrr_capable_property().
The value should be updated based on driver and hardware capability
by using drm_connector_set_vrr_capable_property().
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Manasi Navare
Reviewed-by: Harry Wentland
---
drive
ed to
previous values sent to the hardware.
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Harry Wentland
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 7 -
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 255 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 7 +-
3
These include the drm_connector 'vrr_capable' and the drm_crtc
'vrr_enabled' properties.
Signed-off-by: Nicholas Kazlauskas
Cc: Harry Wentland
Cc: Manasi Navare
Cc: Pekka Paalanen
Cc: Ville Syrjälä
Cc: Michel Dänzer
---
Documentation/gpu/drm-kms.rst | 7 +
pace drivers to implement support.
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Harry Wentland
Cc: Manasi Navare
---
drivers/gpu/drm/drm_atomic_uapi.c | 4
drivers/gpu/drm/drm_crtc.c| 2 ++
drivers/gpu/drm/drm_mode_config.c | 6 ++
include/drm/drm_crtc.h| 9 +++
s the
case as of writing, but any future uses of dc->current_state from
within atomic_check should be considered incorrect.
Cc: Harry Wentland
Cc: Leo Li
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 58 ++-
1 file changed, 6 insertion
s to the dm_state private object is now locked this should
also fix issues that could arise if submitting non-blocking commits
from different threads.
Cc: Harry Wentland
Cc: Leo Li
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 290 ++
vious value.
Fixes: b333730d126e ("drm/amd/display: Fix Scaling (RMX_*) for DC driver")
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm
onnector
property")
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index ce00e56814ed..ede93
a: https://bugs.freedesktop.org/show_bug.cgi?id=108912
Fixes: e64abff2f133 ("drm/amd/display: Use private obj helpers for
dm_atomic_state")
Cc: Leo Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file changed,
low framerate compensation,
"below the range".
[How]
Hook up the pre-flip and post-flip handlers from the FreeSync module.
These adjust the minimum/maximum vrr range to duplicate frames
when appropriate by tracking flip timestamps.
Cc: Leo Li
Cc: Harry Wentland
Signed-off-by: Nichol
On 2018-12-05 9:30 a.m., Li, Sun peng (Leo) wrote:
>
>
> On 2018-12-05 8:40 a.m., Nicholas Kazlauskas wrote:
>> [Why]
>> When application flip-rate is below the minimum vrr refresh rate.
>>
>> Variable refresh rate monitors extend the front porch duration unt
ppropriate by tracking flip timestamps.
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
Acked-by: Leo Li
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 79 ++-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 2 +-
2 files changed, 62 insertions(+), 19 deletions(-)
diff --
esktop.org/show_bug.cgi?id=106175
Cc: Leo Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 67 ++-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 8 +++
2 files changed, 73 insertions(+), 2 deletions(-)
diff --git a/drive
On 2018-12-05 3:26 p.m., Grodzovsky, Andrey wrote:
>
>
> On 12/05/2018 02:59 PM, Nicholas Kazlauskas wrote:
>> [Why]
>> Legacy cursor plane updates from drm helpers go through the full
>> atomic codepath. A high volume of cursor updates through this slow
>> co
On 2018-12-05 3:44 p.m., Grodzovsky, Andrey wrote:
>
>
> On 12/05/2018 03:42 PM, Kazlauskas, Nicholas wrote:
>> On 2018-12-05 3:26 p.m., Grodzovsky, Andrey wrote:
>>>
>>> On 12/05/2018 02:59 PM, Nicholas Kazlauskas wrote:
>>>> [Why]
>>>>
y done on that.
In practice I think the worst case effect of guarding these calls with a
mutex is <100us of delay. That's for two separate threads issuing two
commits at the same time with the planes changed.
Nicholas Kazlauskas
>
>
> On 12/06/2018 08:42 AM, Kazlauskas, Nic
ce updates and hangs under certain
conditions.
[How]
Duplicate the properties.
Fixes: 91b66c47ba34 ("drm/amd/display: Set RMX_ASPECT as default")
Cc: Bhawanpreet Lakha
Cc: Leo Li
Cc: Harry Wentland
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_d
atches the native mode's refresh but this isn't always
the case.
For example, if the monitor is 1080p@144Hz and the preferred mode is
60Hz then even if the user selects 1080p@144Hz as their selected mode
they'll get 1080p@60Hz.
Cc: Bhawanpreet Lakha
Cc: Leo Li
Cc: Harry Wentland
1 - 100 of 189 matches
Mail list logo
