ct symbol *func,
> if (dead_end_function(file, insn->call_dest))
> return 0;
>
> + if (insn->call_dest) {
> + if (!strcmp(insn->call_dest->name,
> "kernel_fpu_begin
On Fri, 3 Apr 2020 13:21:13 +0200
Peter Zijlstra wrote:
> On Fri, Apr 03, 2020 at 02:28:37PM +0900, Masami Hiramatsu wrote:
> > On Thu, 2 Apr 2020 16:13:08 +0200
> > Peter Zijlstra wrote:
>
> > > Masami, Boris, is there any semi-sane way we can have insn_is_fpu() ?
On Fri, 3 Apr 2020 20:15:11 -0700
Randy Dunlap wrote:
> On 4/3/20 8:08 PM, Masami Hiramatsu wrote:
> > +static inline int insn_is_fpu(struct insn *insn)
> > +{
> > + if (!insn->opcode.got)
> > + insn_get_opcode(insn);
> > + if (inat_is_fpu(ins
On Sat, 4 Apr 2020 16:32:24 +0200
Peter Zijlstra wrote:
> On Sat, Apr 04, 2020 at 12:08:08PM +0900, Masami Hiramatsu wrote:
> > From c609be0b6403245612503fca1087628655bab96c Mon Sep 17 00:00:00 2001
> > From: Masami Hiramatsu
> > Date: Fri, 3 Apr 2020 16:58:22 +0900
>
On Sat, 4 Apr 2020 16:36:20 +0200
Peter Zijlstra wrote:
> On Sat, Apr 04, 2020 at 12:08:08PM +0900, Masami Hiramatsu wrote:
> > From c609be0b6403245612503fca1087628655bab96c Mon Sep 17 00:00:00 2001
> > From: Masami Hiramatsu
> > Date: Fri, 3 Apr 2020 16:58:22 +0900
>
On Mon, 6 Apr 2020 12:21:07 +0200
Peter Zijlstra wrote:
> On Sun, Apr 05, 2020 at 12:19:30PM +0900, Masami Hiramatsu wrote:
>
> > > @@ -269,14 +269,14 @@ d4: AAM Ib (i64)
> > > d5: AAD Ib (i64)
> > > d6:
> > > d7: XLAT/XLATB
> > > -d
On Tue, 7 Apr 2020 13:15:35 +0200
Peter Zijlstra wrote:
> On Tue, Apr 07, 2020 at 06:50:08PM +0900, Masami Hiramatsu wrote:
> > On Mon, 6 Apr 2020 12:21:07 +0200
> > Peter Zijlstra wrote:
>
> > > arch/x86/mm/extable.o: warning: objtool: ex_handler_fprestore()+0x8b:
Add insn_is_fpu(insn) which tells that the insn is
whether touch the MMX/XMM/YMM register or the instruction
of FP coprocessor.
Signed-off-by: Masami Hiramatsu
---
Changes:
- Fix non-argument mmx/sse opcode pattern
- Fix to add INAT_FPUIFVEX if the first opcode isn't FPU but 2nd i
On Tue, 7 Apr 2020 17:54:49 +0200
Peter Zijlstra wrote:
> On Wed, Apr 08, 2020 at 12:41:11AM +0900, Masami Hiramatsu wrote:
> > On Tue, 7 Apr 2020 13:15:35 +0200
> > Peter Zijlstra wrote:
>
> > > > > Also, all the VMX bits seems to qualify as FPU (I
Add insn_is_fpu(insn) which tells that the insn is
whether touch the FPU/SSE/MMX register or the instruction
of FP coprocessor.
Signed-off-by: Masami Hiramatsu
---
Changes in v2:
- Introduce FPU superscript.
- Fix to add INAT_FPUIFVEX for variant if the first opcode has no
last prefix
On Thu, 9 Apr 2020 16:32:12 +0200
Peter Zijlstra wrote:
> On Thu, Apr 09, 2020 at 01:09:11AM +0900, Masami Hiramatsu wrote:
> > Add insn_is_fpu(insn) which tells that the insn is
> > whether touch the FPU/SSE/MMX register or the instruction
> > of FP coprocessor.
> >
Add insn_is_fpu(insn) which tells that the insn is
whether touch the FPU/SSE/MMX register or the instruction
of FP coprocessor.
Signed-off-by: Masami Hiramatsu
---
Changes in v3:
- Add {FPU} to FWAIT/WAIT and FEMMS.
- Split INAT_FPU and INAT_MODRM.
- Remove a blank line typo.
---
arch/x86
On Fri, 10 Apr 2020 10:22:30 +0900
Masami Hiramatsu wrote:
> @@ -318,10 +331,14 @@ function convert_operands(count,opnd, i,j,imm,mod)
> if (match(opcode, rex_expr))
> flags = add_flags(flags,
> "INAT_MAKE_PR
Add insn_is_fpu(insn) which tells that the insn is
whether touch the FPU/SSE/MMX register or the instruction
of FP coprocessor.
Signed-off-by: Masami Hiramatsu
---
Changes in v4:
- Fix to match x87-opcode pattern with opcode instead
of ext(ension).
---
arch/x86/include/asm/inat.h
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