On 18/02/2019 07:28, Koenig, Christian wrote:
Am 18.02.19 um 04:10 schrieb zhoucm1:
On 2019年02月17日 03:22, Christian König wrote:
Am 15.02.19 um 20:31 schrieb Lionel Landwerlin via amd-gfx:
On 07/12/2018 09:55, Chunming Zhou wrote:
user mode can query timeline payload.
v2: check return value
cases, which easily leads to
deadlock.
-David
On 2019年02月15日 22:28, Lionel Landwerlin wrote:
Hi David,
Thanks a lot for point me to the tests you've added in IGT.
While adding a test with that signals fences imported into a timeline
syncobj out of order, I ran into a deadlock.
Here is the
ncobj-kernel, which is
already rebased to latest drm-misc(kernel 5.0). You can directly use
that branch.
-David
On 2019年02月19日 01:01, Koenig, Christian wrote:
Am 18.02.19 um 13:07 schrieb Lionel Landwerlin:
Thanks guys :)
You mentioned that signaling out of order is illegal.
Is this il
On 15/03/2019 12:09, Chunming Zhou wrote:
points array is one-to-one match with syncobjs array.
v2:
add seperate ioctl for timeline point wait, otherwise break uapi.
v3:
userspace can specify two kinds waits::
a. Wait for time point to be completed.
b. and wait for time point to become available
On 18/03/2019 17:20, Koenig, Christian wrote:
- if (dma_fence_is_signaled(entries[i].fence)) {
+ if (fence)
+ entries[i].fence = fence;
+ else
+ entries[i].fence = dma_fence_get_stub();
+
+ if ((flags & DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE) ||
On 15/03/2019 12:09, Chunming Zhou wrote:
v2: individually allocate chain array, since chain node is free independently.
v3: all existing points must be already signaled before cpu perform signal
operation,
so add check condition for that.
Signed-off-by: Chunming Zhou
---
drivers/gpu/dr
On 15/03/2019 12:09, Chunming Zhou wrote:
From: Christian König
Lockless container implementation similar to a dma_fence_array, but with
only two elements per node and automatic garbage collection.
v2: properly document dma_fence_chain_for_each, add dma_fence_chain_find_seqno,
drop prev r
On 20/03/2019 03:53, zhoucm1 wrote:
On 2019年03月19日 19:54, Lionel Landwerlin wrote:
On 15/03/2019 12:09, Chunming Zhou wrote:
v2: individually allocate chain array, since chain node is free
independently.
v3: all existing points must be already signaled before cpu perform
signal operation
On 20/03/2019 03:53, zhoucm1 wrote:
On 2019年03月19日 19:54, Lionel Landwerlin wrote:
On 15/03/2019 12:09, Chunming Zhou wrote:
v2: individually allocate chain array, since chain node is free
independently.
v3: all existing points must be already signaled before cpu perform
signal operation
out-of-order
v5: unify binary and timeline
Signed-off-by: Chunming Zhou
Cc: Tobias Hector
Cc: Jason Ekstrand
Cc: Dave Airlie
Cc: Chris Wilson
Cc: Lionel Landwerlin
---
drivers/gpu/drm/drm_internal.h | 2 +
drivers/gpu/drm/drm_ioctl.c| 2 +
drivers/gpu/drm/drm_syncobj.c | 73
On 28/03/2019 13:08, Chunming Zhou wrote:
在 2019/3/28 20:53, Lionel Landwerlin 写道:
On 25/03/2019 08:32, Chunming Zhou wrote:
v2: individually allocate chain array, since chain node is free
independently.
v3: all existing points must be already signaled before cpu perform
signal operation
Signed-off-by: Christian König
Cc: Lionel Landwerlin
---
drivers/gpu/drm/drm_syncobj.c | 39 +++
include/drm/drm_syncobj.h | 5 +
2 files changed, 44 insertions(+)
diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index
r
Cc: Ville Syrjälä
Cc: Shashank Sharma
Cc: "Kumar, Kiran S"
Cc: Kausal Malladi
Cc: Lionel Landwerlin
Cc: Matt Roper
Cc: Rob Bradford
Cc: Daniel Stone
Cc: Stefan Schake
Cc: Eric Anholt
Cc: Maarten Lankhorst
Cc: Harry Wentland
Cc: Leo Li
Cc: amd-gfx@lists.freedesktop.org
Cc: Ja
On 28/03/2019 13:33, Lionel Landwerlin wrote:
On 28/03/2019 13:08, Chunming Zhou wrote:
在 2019/3/28 20:53, Lionel Landwerlin 写道:
On 25/03/2019 08:32, Chunming Zhou wrote:
v2: individually allocate chain array, since chain node is free
independently.
v3: all existing points must be already
On 28/03/2019 15:18, Christian König wrote:
Am 28.03.19 um 14:50 schrieb Lionel Landwerlin:
On 25/03/2019 08:32, Chunming Zhou wrote:
From: Christian König
Use the dma_fence_chain object to create a timeline of fence objects
instead of just replacing the existing fence.
v2: rebase and
On 01/04/2019 06:54, Zhou, David(ChunMing) wrote:
-Original Message-
From: Lionel Landwerlin
Sent: Saturday, March 30, 2019 10:09 PM
To: Koenig, Christian ; Zhou, David(ChunMing)
; dri-de...@lists.freedesktop.org; amd-
g...@lists.freedesktop.org; ja...@jlekstrand.net; Hector, Tobias
On 01/04/2019 11:50, zhoucm1 wrote:
On 2019年04月01日 16:19, Lionel Landwerlin wrote:
On 01/04/2019 06:54, Zhou, David(ChunMing) wrote:
-Original Message-
From: Lionel Landwerlin
Sent: Saturday, March 30, 2019 10:09 PM
To: Koenig, Christian ; Zhou,
David(ChunMing)
; dri-de
Sorry for the delay, I'll try to review this tomorrow.
-Lionel
On 13/05/2019 11:15, zhoucm1 wrote:
ping... for patch set.
On 2019年05月13日 17:52, Chunming Zhou wrote:
[CAUTION: External Email]
Signed-off-by: Chunming Zhou
---
include/drm/amdgpu_drm.h | 9 +
1 file changed, 9 inser
On 13/05/2019 10:53, Chunming Zhou wrote:
v2: drop export/import
Signed-off-by: Chunming Zhou
---
xf86drm.c | 44
xf86drm.h | 6 ++
2 files changed, 50 insertions(+)
diff --git a/xf86drm.c b/xf86drm.c
index 2c19376b..17e3d880 100644
--- a/x
On 13/05/2019 10:53, Chunming Zhou wrote:
v2: use one transfer ioctl
Signed-off-by: Chunming Zhou
---
xf86drm.c | 33 +
xf86drm.h | 6 ++
2 files changed, 39 insertions(+)
diff --git a/xf86drm.c b/xf86drm.c
index 17e3d880..acd16fab 100644
--- a/xf86drm.
With the small nits, patches 2 & 4 are : Reviewed-by: Lionel Landwerlin
The other patches are a bit amdgpu specific so maybe you might want
someone more familiar with amdgpu to review them.
Still I didn't see anything wrong with them so remaining patches are :
Acked-by: Lionel L
On 28/02/2020 11:28, Erik Faye-Lund wrote:
On Fri, 2020-02-28 at 13:37 +1000, Dave Airlie wrote:
On Fri, 28 Feb 2020 at 07:27, Daniel Vetter
wrote:
Hi all,
You might have read the short take in the X.org board meeting
minutes
already, here's the long version.
The good news: gitlab.fd.o has b
On 28/02/2020 13:46, Michel Dänzer wrote:
On 2020-02-28 12:02 p.m., Erik Faye-Lund wrote:
On Fri, 2020-02-28 at 10:43 +, Daniel Stone wrote:
On Fri, 28 Feb 2020 at 10:06, Erik Faye-Lund
wrote:
On Fri, 2020-02-28 at 11:40 +0200, Lionel Landwerlin wrote:
Yeah, changes on vulkan drivers or
("drm/syncobj: add timeline payload query ioctl v6")
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/drm/drm_syncobj.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index 75cb4bb7619e..14
On 22/07/2019 16:21, Christian König wrote:
Am 22.07.19 um 15:16 schrieb Lionel Landwerlin:
On 22/07/2019 15:59, Christian König wrote:
We need to check the context number instead if the previous sequence
to detect
an error and if an error is detected we need to drop the reference
to the
Hi David,
Thanks a lot for point me to the tests you've added in IGT.
While adding a test with that signals fences imported into a timeline
syncobj out of order, I ran into a deadlock.
Here is the test :
https://github.com/djdeath/intel-gpu-tools/commit/1e46cf7e7bff09b78a24367ddc2314f97eb0a1b9
Hi Christian, David,
For timeline semaphore we need points to signaled in order.
I'm struggling to understand how this fence-chain implementation
preserves ordering of the seqnos.
One of the scenario I can see an issue happening is when you have a
timeline with points 1 & 2 and userspace subm
On 15/02/2019 14:32, Koenig, Christian wrote:
Am 15.02.19 um 15:23 schrieb Lionel Landwerlin:
Hi Christian, David,
For timeline semaphore we need points to signaled in order.
I'm struggling to understand how this fence-chain implementation
preserves ordering of the seqnos.
One of the sce
On 07/12/2018 09:55, Chunming Zhou wrote:
user mode can query timeline payload.
v2: check return value of copy_to_user
v3: handle querying entry by entry
v4: rebase on new chain container, simplify interface
Signed-off-by: Chunming Zhou
Cc: Daniel Rakos
Cc: Jason Ekstrand
Cc: Bas Nieuwenhuize
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