Re: [PATCH 4/6] drm/amdgpu: enable pdb0 for hibernation on SRIOV

On 4/24/25 05:38, Zhang, GuoQing (Sam) wrote: > Hi Christian, > > Thank you for the review and the feedback.I will update the patch according > to > your feedback. > > Please see my 2 inline comments below. Please make sure to always CC my work mail address, otherwise I will only take a look

Re: [PATCH V8 1/5] drm: add drm_file_err function to add process info

On 4/22/2025 2:33 PM, Christian König wrote: Am 17.04.25 um 18:10 schrieb Sunil Khatri: Add a drm helper function which appends the process information for the drm_file over drm_err formatted output. v5: change to macro from function (Christian Koenig) add helper functions for lock/unloc

RE: [PATCH] drm/amdgpu: Print bootloader status for long waits

[AMD Official Use Only - AMD Internal Distribution Only] Reviewed-by: Asad Kamal Thanks & Regards Asad -Original Message- From: Lazar, Lijo Sent: Monday, April 28, 2025 3:40 PM To: amd-gfx@lists.freedesktop.org Cc: Zhang, Hawking ; Deucher, Alexander ; Kamal, Asad ; Wang, Yang(Kevin)

Re: [PATCH] drm/amdgpu/userq: fix user_queue parameters list

Applied. Thanks. Alex On Sat, Apr 26, 2025 at 10:37 PM Bagas Sanjaya wrote: > > Sphinx reports htmldocs warning: > > Documentation/gpu/amdgpu/module-parameters:7: > drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c:1119: ERROR: Unexpected indentation. > [docutils] > > Fix the warning by using reST bull

Re: [PATCH 1/1] drm/amd: Fix malformed kerneldoc comment

Thanks for the patch. This was already fixed. Alex On Mon, Apr 28, 2025 at 8:53 AM Brahmajit Das wrote: > > One kerneldoc commets in amd_shared.h failed to adhere to required > format, resulting in these doc-build warnings: > > ./drivers/gpu/drm/amd/include/amd_shared.h:369: warning: Incorrect

[PATCH] drm/amdgpu: check a user-provided number of BOs in list

From: Denis Arefev The user can set any value to the variable ‘bo_number’, via the ioctl command DRM_IOCTL_AMDGPU_BO_LIST. This will affect the arithmetic expression ‘in->bo_number * in->bo_info_size’, which is prone to overflow. Add a valid value check. Found by Linux Verification Center (linux

Re: [PATCH] drm/amdgpu/userq: Fix unreachable code in amdgpu_runtime_idle_check_userq()

On Mon, Apr 28, 2025 at 12:38 AM Srinivasan Shanmugam wrote: > > Changed the control flow to use break statements instead of goto to exit > loops when a busy user queue is detected. > > Fixes the below: > drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c:2751 > amdgpu_runtime_idle_check_userq() warn: ignor

Re: [PATCH linux-next] drm/amdgpu: use string choice helpers

On Sun, Apr 27, 2025 at 5:46 AM R Sundar wrote: > > Use string choice helpers for better readability. > > Reported-by: kernel test robot > Reported-by: Julia Lawall > Closes: https://lore.kernel.org/r/202503222049.suxl3q6w-...@intel.com/ > Signed-off-by: R Sundar > --- > > Reported in linux rep

Re: [PATCH v2] drm/amdgpu: check a user-provided number of BOs in list

USHRT_MAX seems too low. Traces for workstation apps create 20-30k BOs, which is not very far from the limit. RADV doesn't suballocate BOs. Neither GL nor VK has a ilmit on the number of BOs that can be created. The hypothetical maximum number of BOs that can be allocated on a GPU with 32GB of addr

Re: [PATCH 2/3] drm/amdgpu: fix the eviction fence dereference

On 4/25/25 09:07, Prike Liang wrote: > The dma_resv_add_fence() already refers to the added fence. > So when attaching the evciton fence to the gem bo, it needn't > refer to it anymore. > > Signed-off-by: Prike Liang Reviewed-by: Christian König > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_evict

Re: [PATCH 3/3] drm/amdgpu: validate the eviction fence attach/detach

On 4/25/25 09:07, Prike Liang wrote: > Before the user queue BOs resume workqueue is scheduled; > there's no valid eviction fence to attach the gem obj. > For this case, it doesn't need to attach/detach the eviction > fence. Also, it needs to unlock the bo first before returning > from the eviction

Re: [PATCH 1/3] drm/amdgpu: only sync on the dependent read fences for user submission

On 4/25/25 09:20, Prike Liang wrote: > The driver doesn't want to sync on the DMA_RESV_USAGE_BOOKKEEP The driver doesn't want to *implicitely* sync on the... > usage fences, so here only return and sync the dependent read > fences. > > Signed-off-by: Prike Liang > --- > drivers/gpu/drm/amd/

RE: [PATCH] drm/amdgpu: Fix API status offset for MES queue reset

[AMD Official Use Only - AMD Internal Distribution Only] Looks good to me . Reviewed-By: Shaoyun.liu < shaoyun@amd.com> -Original Message- From: amd-gfx On Behalf Of Jesse.Zhang Sent: Sunday, April 27, 2025 10:40 PM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander ; Koenig,

Re: [PATCH 6/9] drm/amdgpu/userq: add force completion helpers

On 4/26/2025 12:08 AM, Alex Deucher wrote: Add support for forcing completion of userq fences. This is needed for userq resets and asic resets so that we can set the error on the fence and force completion. Signed-off-by: Alex Deucher --- .../gpu/drm/amd/amdgpu/amdgpu_userq_fence.c | 42 +

[PATCH] drm/amdgpu: fix unexpected indentation in docs

make htmldocs reports unexpected indentation on line 1119 in the kernel doc comment. This was due to alignment of numbers (except the minus) which caused indentation. This also had unintended effects on the compiled documentation, with breaks and indentation after the -1 option. This patch fixes t

Re: [PATCH] drm/amdgpu: fix unexpected indentation in docs

On Mon, Apr 28, 2025 at 01:01:41AM +0100, Ruben Wauters wrote: > make htmldocs reports unexpected indentation on line 1119 in the kernel > doc comment. This was due to alignment of numbers (except the minus) > which caused indentation. This also had unintended effects on the > compiled documentatio

Re: [PATCH 1/9] drm/amdgpu/mes: remove more unused functions

Series Reviewed-by: Sunil Khatri Apart from a minor comment in patch no 6 if applicable,  rest of the series LGTM. On 4/26/2025 12:08 AM, Alex Deucher wrote: These were leftover from mes bring up and are unused. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 62

RE: [PATCH 8/8] drm/amdgpu/userq: enable support for creating gangs

[Public] Except for the patch4, 5, and the other patches set is Reviewed-by: Prike Liang Question: 1) I don't find the user queue gang submission code in the mesa, could you point out where is the flight mesa counterpart code for supporting user queue gang submission? 2) Do we plan to support

[PATCH 00/28] DC Patches May 05 2025

This DC patchset brings improvements in multiple areas. In summary, we highlight: - Update IPS checks to properly include all ASICs. - Refactoring DSC enum dsc_bits_per_comp - Remove redundant NULL check - Revert "Refactor SubVP cursor limiting logic" - Disable DPP RCG before DPP CLK enable - Ad

[PATCH 02/28] drm/amd/display: Refactoring DSC enum dsc_bits_per_comp.

From: Bhuvanachandra Pinninti [Why] Previously the 'dsc_bits_per_comp' enumeration was defined in individual .c files, making it unavailable for other files that may need it. [How] The 'dsc_bits_per_comp' enumeration has been relocated to a common header file. Reviewed-by: Mounika Adhuri Revie

[PATCH 06/28] drm/amd/display: Fix invalid context error in dml helper

From: Roman Li [Why] "BUG: sleeping function called from invalid context" error. after: "drm/amd/display: Protect FPU in dml2_validate()/dml21_validate()" The populate_dml_plane_cfg_from_plane_state() uses the GFP_KERNEL flag for memory allocation, which shouldn't be used in atomic contexts. Th

[PATCH 07/28] drm/amd/display: Prepare for Fused I2C-over-AUX

From: Dominik Kaszewski [Why] Passive DP-HDMI dongles use I2C-over-AUX protocol which is currently not supported using HDCP Locality Check FW path. [How] Prepare code for switching to I2C-over-AUX protocol. Passive dongle detection to be added in another commit. Reviewed-by: Alvin Lee Signed-o

[PATCH 05/28] drm/amd/display: Remove redundant null check

From: Alex Hung [WHY & HOW] The null check for connector was dereferenced previously in the same function and the caller. Reviewed-by: Aurabindo Pillai Signed-off-by: Alex Hung Signed-off-by: Ray Wu --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 - 1 file changed, 5 deletions(

[PATCH 01/28] drm/amd/display: Update IPS sequential_ono requirement checks

From: Ovidiu Bunea [why & how] ASICs that require special RCG/PG programming are determined based on hw_internal_rev. Update these checks to properly include all such ASICs. Reviewed-by: Nicholas Kazlauskas Signed-off-by: Ovidiu Bunea Signed-off-by: Ray Wu --- drivers/gpu/drm/amd/display/dc/

[PATCH 04/28] drm/amd/display: Always Scale Flag

From: Jesse Agate [Why & How] When always scale flag is set at the API level, the number of taps should not be overridden to zero in the identity scaling ratio case, and luma scale should not be set to bypass regardless of luma scale ratio Reviewed-by: Samson Tam Signed-off-by: Jesse Agate Sig

[PATCH 03/28] drm/amd/display: Promote DAL to 3.2.330

From: Taimur Hassan Summary * Update IPS checks to properly include all ASICs. * Refactoring DSC enum dsc_bits_per_comp * Fix ACPI edid parsing issue * Update AUX read interval for LTTPR with old sinks * Correct prefetch calculation Signed-off-by: Taimur Hassan Acked-by: ChiaHsuan Chung Signe

[PATCH 21/28] drm/amd/display: Refactor SubVP cursor limiting logic

From: Dillon Varone [WHY] There are several gaps that can result in SubVP being enabled with incompatible HW cursor sizes, and unjust restrictions to cursor size due to wrong predictions on future usage of SubVP. [HOW] - remove "prediction" logic in favor of tagging based on previous SubVP usa

[PATCH 22/28] drm/amd/display: Shift DMUB AUX reply command if necessary

From: Wayne Lin [Why] Defined value of dmub AUX reply command field get updated but didn't adjust dm receiving side accordingly. [How] Check the received reply command value to see if it's updated version or not. Adjust it if necessary. Fixes: ead08b95fa50 ("drm/amd/display: Fix race condition

[PATCH 28/28] drm/amd/display: Only wait for required free space in DMUB mailbox

From: Dillon Varone [WHY&HOW] When command submission is blocked by a full mailbox, only wait for enough space to free to submit the command, instead of waiting for idle. Reviewed-by: Nicholas Kazlauskas Signed-off-by: Dillon Varone Signed-off-by: Ray Wu --- drivers/gpu/drm/amd/display/dc/dc

[PATCH 27/28] drm/amd/display: Assign preferred stream encoder instance to dpia

From: Meenakshikumar Somasundaram [Why] For dpia, preferred engine instance availability is not checked when assigning stream encoder instance. [How] Check for dpia preferred engine id and assign the same stream encoder instance for the stream if available. Reviewed-by: PeiChen Huang Signed-of

[PATCH 26/28] drm/amd/display: Fix wrong handling for AUX_DEFER case

From: Wayne Lin [Why] We incorrectly ack all bytes get written when the reply actually is defer. When it's defer, means sink is not ready for the request. We should retry the request. [How] Only reply all data get written when receive I2C_ACK|AUX_ACK. Otherwise, reply the number of actual writte

[PATCH 24/28] drm/amd/display: Remove incorrect checking in dmub aux handler

From: Wayne Lin [Why & How] "Request length != reply length" is expected behavior defined in spec. It's not an invalid reply. Besides, replied data handling logic is not designed to be written in amdgpu_dm_process_dmub_aux_transfer_sync(). Remove the incorrectly handling section. Fixes: ead08b95

[PATCH 25/28] drm/amd/display: Copy AUX read reply data whenever length > 0

From: Wayne Lin [Why] amdgpu_dm_process_dmub_aux_transfer_sync() should return all exact data reply from the sink side. Don't do the analysis job in it. [How] Remove unnecessary check condition AUX_TRANSACTION_REPLY_AUX_ACK. Fixes: ead08b95fa50 ("drm/amd/display: Fix race condition in DPIA AUX

[PATCH 23/28] drm/amd/display: Fix the checking condition in dmub aux handling

From: Wayne Lin [Why & How] Fix the checking condition for detecting AUX_RET_ERROR_PROTOCOL_ERROR. It was wrongly checking by "not equals to" Reviewed-by: Ray Wu Signed-off-by: Wayne Lin Signed-off-by: Ray Wu --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +- 1 file changed, 1 ins

[PATCH 08/28] Revert "drm/amd/display: Refactor SubVP cursor limiting logic"

From: Ryan Seto This reverts commit bf4cfa2b1854("drm/amd/display: Refactor SubVP cursor limiting logic") Reason for revert: Corruption Reviewed-by: Alvin Lee Signed-off-by: Ryan Seto Signed-off-by: Ray Wu --- drivers/gpu/drm/amd/display/dc/core/dc.c | 52 ++ .../gpu/drm/amd/d

[PATCH 13/28] drm/amd/display: Promote DAL to 3.2.331

From: Taimur Hassan Summary * Remove redundant NULL check * Fix invalid context error in dml helper * Prepare for Fused I2C-over-AUX * Allow DSCClock disable * Vmax / Vmin update for Vsync Acked-by: Tom Chung Signed-off-by: Taimur Hassan Signed-off-by: Ray Wu --- drivers/gpu/drm/amd/display

[PATCH 11/28] drm/amd/display: disable DPP RCG before DPP CLK enable

From: Charlene Liu [why] DPP CLK enable needs to disable DPPCLK RCG first. The DPPCLK_en in dccg should always be enabled when the corresponding pipe is enabled. Reviewed-by: Hansen Dsouza Signed-off-by: Charlene Liu Signed-off-by: Ray Wu --- .../amd/display/dc/dccg/dcn35/dcn35_dccg.c| 3

[PATCH 18/28] drm/amd/display: Remove unnecessary DC_FP_START/DC_FP_END

From: Alex Hung [WHY & HOW] Remove the unnecessary DC_FP_START/DC_FP_END pair to reduce time in preempt_disable. It also fixes "BUG: sleeping function called from invalid context" error messages because of calling kzalloc with GFP_KERNEL which can sleep. Reviewed-by: Aurabindo Pillai Signed-off

[PATCH 19/28] drm/amd/display: Call FP Protect Before Mode Programming/Mode Support

From: Austin Zheng [Why] Memory allocation occurs within dml21_validate() for adding phantom planes. May cause kernel to be tainted due to usage of FP Start. [How] Move FP start from dml21_validate to before mode programming/mode support. Calculations requiring floating point are all done within

[PATCH 17/28] drm/amd/display: Send IPSExit unconditionally.

From: JinZe Xu [Why&How] PMFW needs to flush page cache in IPSExit. Reviewed-by: Nicholas Kazlauskas Signed-off-by: JinZe Xu Signed-off-by: Ray Wu --- drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 15 --- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/

[PATCH 20/28] drm/amd/display: DML21 Fixes

From: Austin Zheng - Store state related info inside mode_lib. - Fix bad DCFCLK deep sleep - Update FAMS structure in DMUB header Reviewed-by: Alvin Lee Signed-off-by: Austin Zheng Signed-off-by: Ray Wu --- .../amd/display/dc/dml2/dml21/inc/dml_top.h | 1 - .../dml21/inc/dml_top_soc_param

[PATCH 15/28] Revert "drm/amd/display: turn off eDP lcdvdd and backlight if not required"

From: Nicholas Kazlauskas This reverts commit b91fff88686e("drm/amd/display: turn off eDP lcdvdd and backlight if not required") Reason for revert: Causes S4 lightup regressions. Reviewed-by: Gabe Teeger Signed-off-by: Nicholas Kazlauskas Signed-off-by: Ray Wu --- drivers/gpu/drm/amd/displ

[PATCH 09/28] drm/amd/display: allow dscclk disable

From: Charlene Liu [why] when dscclk rcg disabled from usr reg option, dsc clock will remain enabled because driver was doing two things both dscclk and dsc rcg in the same routine. Reviewed-by: Hansen Dsouza Signed-off-by: Charlene Liu Signed-off-by: Ray Wu --- .../amd/display/dc/dccg/dcn35

[PATCH 14/28] drm/amd/display: Allow 0 dtbclk for DCN35 and above

From: Leo Li [Why & How] 0 dtbclk is supported by ASICs with DCN35 and above, so allow it during driver init. Reviewed-by: Aurabindo Pillai Signed-off-by: Leo Li Signed-off-by: Ray Wu --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 1 file changed, 4 insertions(+) diff --git

[PATCH 12/28] drm/amd/display: [FW Promotion] Release 0.1.8.0

From: Taimur Hassan Undefined unnecessary definition to avoid wrong referring Acked-by: Tom Chung Signed-off-by: Taimur Hassan Signed-off-by: Ray Wu --- drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dmub/inc

[PATCH 10/28] drm/amd/display: more liberal vmin/vmax update for freesync

From: Aurabindo Pillai [Why] FAMS2 expects vmin/vmax to be updated in the case when freesync is off, but supported. But we only update it when freesync is enabled. [How] Change the vsync handler such that dc_stream_adjust_vmin_vmax() its called irrespective of whether freesync is enabled. If fre

[PATCH 16/28] drm/amd/display: Add skip rIOMMU dc config option

From: Kevin Gao [Why] Need option to skip rIOMMU calls for dcn21. [How] Added rIOMMU dc config option and check for whether to skip rIOMMU calls. Reviewed-by: Nicholas Kazlauskas Signed-off-by: Kevin Gao Signed-off-by: Ray Wu --- drivers/gpu/drm/amd/display/dc/dc.h|

Re: [PATCH 1/8] drm/amdgpu: add UAPI to create user queue gangs

LGTM functionally, Acked-by: Sunil Khatri But i would like @christian to look once as he is one of the original author of gang submission. Regards, Sunil khatri On 4/26/2025 12:11 AM, Alex Deucher wrote: Queues in a gang will schedule together. Signed-off-by: Alex Deucher --- include/ua

Re: [PATCH 1/8] drm/amdgpu: add UAPI to create user queue gangs

Small edit, Series is Acked-by: Sunil Khatri On 4/28/2025 3:32 PM, Khatri, Sunil wrote: LGTM functionally, Acked-by: Sunil Khatri But i would like @christian to look once as he is one of the original author of gang submission. Regards, Sunil khatri On 4/26/2025 12:11 AM, Alex Deucher wrote

[PATCH] drm/amd/display: Don't check for NULL divisor in fixpt code

[Why] We check for a NULL divisor but don't act on it. This check does nothing other than throw a warning. It does confuse static checkers though: See https://lkml.org/lkml/2025/4/26/371 [How] Drop the ASSERTs in both DC and SPL variants. Signed-off-by: Harry Wentland Cc: Linus Torvalds Cc: Leo

RE: [PATCH 1/9] drm/amdgpu/mes: remove more unused functions

[AMD Official Use Only - AMD Internal Distribution Only] Hi Alex, -Original Message- From: amd-gfx On Behalf Of Alex Deucher Sent: Saturday, April 26, 2025 2:39 AM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander Subject: [PATCH 1/9] drm/amdgpu/mes: remove more unused functions

Re: [PATCH V8 1/5] drm: add drm_file_err function to add process info

On Mon, 28 Apr 2025, "Khatri, Sunil" wrote: > On 4/22/2025 2:33 PM, Christian König wrote: >> Am 17.04.25 um 18:10 schrieb Sunil Khatri: >>> Add a drm helper function which appends the process information for >>> the drm_file over drm_err formatted output. >>> >>> v5: change to macro from function

Re: [PATCH] Revert "drm/amd/display: Hardware cursor changes color when switched to software cursor"

Hi, Personally I prefer we always disable cursor HW degamma, and this is what color pipeline patch series have done for cursor plane(actually all colorops are disabled on cursor plane and its background plane). Since cursor plane shares colorops with cursor's background plane. Also, degamma

[PATCH 1/1] drm/amd: Fix malformed kerneldoc comment

One kerneldoc commets in amd_shared.h failed to adhere to required format, resulting in these doc-build warnings: ./drivers/gpu/drm/amd/include/amd_shared.h:369: warning: Incorrect use of kernel-doc format: * @DC_HDCP_LC_ENABLE_SW_FALLBACK If set, upon HDCP Locality Check FW ./drivers/g

RE: [PATCH 4/8] drm/amdgpu/mes11: add support for setting gang submit

[Public] > -Original Message- > From: amd-gfx On Behalf Of Alex > Deucher > Sent: Saturday, April 26, 2025 2:41 AM > To: amd-gfx@lists.freedesktop.org > Cc: Deucher, Alexander > Subject: [PATCH 4/8] drm/amdgpu/mes11: add support for setting gang submit > > Enable a primary and secondary

RE: [PATCH 5/8] drm/amdgpu/mes12: add support for setting gang submit

[Public] > -Original Message- > From: amd-gfx On Behalf Of Alex > Deucher > Sent: Saturday, April 26, 2025 2:41 AM > To: amd-gfx@lists.freedesktop.org > Cc: Deucher, Alexander > Subject: [PATCH 5/8] drm/amdgpu/mes12: add support for setting gang submit > > Enable a primary and secondary

Re: [PATCH v2] drm/amdgpu: Add DPG pause for VCN v5.0.1

[AMD Official Use Only - AMD Internal Distribution Only] Ping. From: Jiang, Sonny Sent: Friday, April 25, 2025 12:41 PM To: amd-gfx@lists.freedesktop.org Cc: Jiang, Sonny Subject: [PATCH v2] drm/amdgpu: Add DPG pause for VCN v5.0.1 For vcn5.0.1 only, enable DPG

RE: [PATCH] drm/amdgpu: Fix API status offset for MES queue reset

[Public] Reviewed-by: Prike Liang Regards, Prike > -Original Message- > From: amd-gfx On Behalf Of > Jesse.Zhang > Sent: Monday, April 28, 2025 10:40 AM > To: amd-gfx@lists.freedesktop.org > Cc: Deucher, Alexander ; Koenig, Christian > ; Zhang, Jesse(Jie) ; > Zhang, Jesse(Jie) >

Re: [PATCH 6/6] drm/amdgpu: fix fence fallback timer expired error

On 4/24/25 05:38, Zhang, GuoQing (Sam) wrote: > [AMD Official Use Only - AMD Internal Distribution Only] > > > Ping… @Koenig, Christian > > Thanks > > Sam > > *From: *amd-gfx on behalf of Zhang, > GuoQing (Sam) > *Date: *Wednesday, April 23, 2025 at 14:59 >

Re: [PATCH 1/2] drm/amdgpu: Add debug bit for userptr usage

On 4/24/25 07:54, Shane Xiao wrote: > In VM debug mode, it is desirable to notify the application > to correct the freeing sequence by unmapping the memory before > destroying the userptr in the old userptr path. Add a bitmask > to decide whether to send gpu vm fault to the applition. > > Signed-o

RE: [PATCH 2/2] drm/amdgpu/userq: take the userq_mgr lock in enforce isolation

[Public] Reviewed-by: Prike Liang Regards, Prike > -Original Message- > From: amd-gfx On Behalf Of Alex > Deucher > Sent: Saturday, April 26, 2025 2:34 AM > To: amd-gfx@lists.freedesktop.org > Cc: Deucher, Alexander > Subject: [PATCH 2/2] drm/amdgpu/userq: take the userq_mgr loc

RE: [PATCH 1/2] drm/amdgpu/userq: take the userq_mgr lock in suspend/resume

[Public] Reviewed-by: Prike Liang Regards, Prike > -Original Message- > From: amd-gfx On Behalf Of Alex > Deucher > Sent: Saturday, April 26, 2025 2:34 AM > To: amd-gfx@lists.freedesktop.org > Cc: Deucher, Alexander > Subject: [PATCH 1/2] drm/amdgpu/userq: take the userq_mgr loc

RE: [PATCH v2] drm/amdgpu: Add DPG pause for VCN v5.0.1

[AMD Official Use Only - AMD Internal Distribution Only] Reviewed-by: Leo Liu > -Original Message- > From: amd-gfx On Behalf Of Sonny > Jiang > Sent: April 25, 2025 12:42 PM > To: amd-gfx@lists.freedesktop.org > Cc: Jiang, Sonny > Subject: [PATCH v2] drm/amdgpu: Add DPG pause for VCN v

[PATCH] drm/amdgpu: Print bootloader status for long waits

If it needs a long wait for completion of bootloader execution, report the status in between. That helps to know if there is some issue during bootloader execution. Signed-off-by: Lijo Lazar --- drivers/gpu/drm/amd/amdgpu/psp_v13_0.c | 31 ++ 1 file changed, 31 insertions

RE: [PATCH 4/6] drm/amdgpu: enable pdb0 for hibernation on SRIOV

[AMD Official Use Only - AMD Internal Distribution Only] Hi, @Koenig, Christian Your time response will be highly appreciated. Thanks for support. Rgds/Owen From: Zhang, GuoQing (Sam) Sent: Thursday, April 24, 2025 11:38 AM To: Christian König ; amd-gfx@lists

RE: [PATCH 6/6] drm/amdgpu: fix fence fallback timer expired error

[AMD Official Use Only - AMD Internal Distribution Only] Hi, @Koenig, Christian Looking for your expertise... Thanks for support. Rgds/Owen From: Zhang, GuoQing (Sam) Sent: Thursday, April 24, 2025 11:39 AM To: Christian König ; amd-gfx@lists.freedesktop.org;

[PATCH] drm/amdgpu: Add Support for enforcing isolation without Cleaner Shader

Adjusted the enforce isolation setting handling to include the ability to disable the cleaner shader without affecting isolation between tasks. Cc: Christian König Cc: Alex Deucher Signed-off-by: Srinivasan Shanmugam --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 + drivers/gpu/drm/amd/amd

Re: [PATCH] drm/amdgpu: Refactor amdgpu_gem_va_ioctl for Handling Last Fence Update and Timeline Management

On 4/24/25 05:21, Srinivasan Shanmugam wrote: > This commit simplifies the amdgpu_gem_va_ioctl function, key updates > include: > - Moved the logic for managing the last update fence directly into >amdgpu_gem_va_update_vm. > - Introduced checks for the timeline point to enable conditional >

Re: [PATCH 1/3] drm/amdgpu: implicitly sync the dependent read fences

On 4/27/25 05:20, Liang, Prike wrote: > [Public] > >> From: Liang, Prike >> Sent: Friday, April 25, 2025 3:44 PM >> To: Yadav, Arvind ; amd-gfx@lists.freedesktop.org >> Cc: Deucher, Alexander ; Koenig, Christian >> >> Subject: RE: [PATCH 1/3] drm/amdgpu: implicitly sync the dependent read >> fen

Re: [PATCH] drm/amdkfd: enable kfd on RISCV systems

On 2025-04-26 21:25, liu.son...@zte.com.cn wrote: From: Xuemei Liu KFD has been confirmed that can run on RISCV systems. It's necessary to support CONFIG_HSA_AMD on RISCV. Is there a public user mode branch with any changes needed to make ROCm user mode work with RISCV? One more question i

Re: [PATCH v2] drm/amdgpu: check a user-provided number of BOs in list

On 4/24/25 15:40, Alex Deucher wrote: > On Wed, Apr 23, 2025 at 10:29 AM Christian König > wrote: >> >> On 4/22/25 18:26, Deucher, Alexander wrote: >>> [Public] >>> -Original Message- From: Alex Deucher Sent: Tuesday, April 22, 2025 9:46 AM To: Koenig, Christian

RE: [PATCH] drm/amd/pm: Use macro to initialize metrics table

[AMD Official Use Only - AMD Internal Distribution Only] Reviewed-by: Hawking Zhang Regards, Hawking -Original Message- From: Lazar, Lijo Sent: Tuesday, April 29, 2025 11:15 To: amd-gfx@lists.freedesktop.org Cc: Zhang, Hawking ; Deucher, Alexander ; Kamal, Asad ; Wang, Yang(Kevin) Su

Re: [PATCH] drm/amd/pm: Use macro to initialize metrics table

[AMD Official Use Only - AMD Internal Distribution Only] #define smu_cmn_init_soft_gpu_metrics(ptr, a, b) it is better to use frev/crev to instead of a,b . apart is ok for me. Reviewed-by: Yang Wang Best Regards, Kevin 发件人: Zhang, Hawking 发送时间: 星期二, 四月 29, 20

RE: [PATCH 6/6] drm/amdgpu: fix fence fallback timer expired error

[AMD Official Use Only - AMD Internal Distribution Only] Hi, The interrupt issue loss issue might be VF msix table isn't restored properly on resume. The msix table in virtual machine is faked. The real msix table will be programmed by QEMU when guest enable/disable msix interrupt. But QEMU

[PATCH] drm/amd/pm: Use macro to initialize metrics table

Helps to keep a build time check about usage of right datatype and avoids maintainence as new versions get added. Signed-off-by: Lijo Lazar --- drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 67 -- drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h | 13 - 2 files changed, 11 insertion

RE: [PATCH] drm/amd/pm: Use macro to initialize metrics table

[AMD Official Use Only - AMD Internal Distribution Only] Reviewed-by: Asad Kamal Thanks & Regards Asad -Original Message- From: Lazar, Lijo Sent: Tuesday, April 29, 2025 8:45 AM To: amd-gfx@lists.freedesktop.org Cc: Zhang, Hawking ; Deucher, Alexander ; Kamal, Asad ; Wang, Yang(Kevin

Re: [PATCH 8/8] drm/amdgpu/userq: enable support for creating gangs

On Mon, Apr 28, 2025 at 9:48 AM Liang, Prike wrote: > > [Public] > > Except for the patch4, 5, and the other patches set is Reviewed-by: Prike > Liang > Question: > 1) I don't find the user queue gang submission code in the mesa, could you > point out where is the flight mesa counterpart code f

Re: [PATCH v4 0/3] drm/amd/display: Stop control flow if the divisior is zero

On Tue, Apr 22, 2025 at 11:55 PM Mingcong Bai wrote: > > Hi all, > > 在 2025/1/14 21:28, Tiezhu Yang 写道: > > As far as I can tell, with the current existing macro definitions, there > > is no better way to do the minimal and proper changes to stop the control > > flow if the divisior is zero. > > >

[PATCH 6/8] drm/amdgpu/userq: add callback for gang setup

Two queues can be ganged and will schedule together. Acked-by: Sunil Khatri Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h ind

[PATCH 1/8] drm/amdgpu: add UAPI to create user queue gangs

Queues in a gang will schedule together. Acked-by: Sunil Khatri Signed-off-by: Alex Deucher --- include/uapi/drm/amdgpu_drm.h | 11 +++ 1 file changed, 11 insertions(+) diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h index 56f052a10ff38..83414563779fb 100644

[PATCH 8/8] drm/amdgpu/userq: enable support for creating gangs

Gangs are sets of userqs that schedule together. You specify the primary and secondary queues and the scheduler will make sure they always run at the same time. v2: handle setting up the gang again after unmaps Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c | 95

[PATCH 4/8] drm/amdgpu/mes11: add support for setting gang submit

Enable a primary and secondary queue that schedule together. v2: fix offset of api_status (Prike) Acked-by: Sunil Khatri Reviewed-by: Prike Liang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 22 ++ 1 file changed, 22 insertions(+) diff --git a/

[PATCH 7/8] drm/amdgpu/userq/mes: implement set gang submit

Enable the userq callback for setting up gang submission. Acked-by: Sunil Khatri Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_userqueue.c | 26 ++ 1 file changed, 26 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c b/drivers/gpu/drm/a

[PATCH 5/8] drm/amdgpu/mes12: add support for setting gang submit

Enable a primary and secondary queue that schedule together. v2: fix offset of api_status (Prike) Acked-by: Sunil Khatri Reviewed-by: Prike Liang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 28 ++ 1 file changed, 28 insertions(+) diff --gi

[PATCH 3/8] drm/amdgpu/mes: add callback for gang submit

Add function pointer for gang submit setup. Acked-by: Sunil Khatri Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 8 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h index e98b0d8

[PATCH 2/8] drm/amdgpu/mes11: add API for gang submit

Add API for setting up a gang. Gangs schedule together. Acked-by: Sunil Khatri Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v11_0.c| 2 +- drivers/gpu/drm/amd/include/mes_v11_api_def.h | 18 ++ 2 files changed, 19 insertions(+), 1 deletion(-) diff --