On 3/29/25 09:26, Simon Ser wrote:
I would also highlight that we need to seamlessly switch between HW
fixed-function blocks and shaders/CPU with no visible difference. Depending on
the content being displayed we might need to fallback to shaders/CPU at any
time. (A classic example would be a
Move work queue allocation into a helper for a more streamlined function
body.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthew Brost
Cc: Philipp Stanner
---
drivers/gpu/drm/scheduler/sched_main.c | 28 +-
1 file changed, 14 insertion
Now that the run queue to scheduler relationship is always 1:1 we can
embed it (the run queue) directly in the scheduler struct and save on
some allocation error handling code and such.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthew Brost
Cc: Philipp Stanner
There is no reason to queue just a single job if scheduler can take more
and re-queue the worker to queue more. We can simply feed the hardware
with as much as it can take in one go and hopefully win some latency.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthe
Move the code dealing with entities entering and exiting run queues to
helpers to logically separate it from jobs entering and exiting entities.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthew Brost
Cc: Philipp Stanner
---
drivers/gpu/drm/scheduler/sched_en
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthew Brost
Cc: Philipp Stanner
Cc: Pierre-Eric Pelloux-Prayer
---
drivers/gpu/drm/scheduler/tests/Makefile | 3 +-
.../gpu/drm/scheduler/tests/tests_scheduler.c | 548 ++
2 files changed, 550
On 2025-03-31 09:18, Ваторопин Андрей wrote:
From: Andrey Vatoropin
Static analysis shows that pointer "svms" cannot be NULL because it points
to the object "struct svm_range_list". Remove the extra NULL check. It is
meaningless and harms the readability of the code.
In the function svm_range_
From: Ruili Ji
Implement VCN engine reset by sending MSG_ResetVCN
on smu 13.0.6.
Reviewed-by:Sonny Jiang
Reviewed-by:Leo Liu
Signed-off-by: Ruili Ji
---
drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 15 +++
drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 1 +
drivers/gpu
On Mon, Mar 31, 2025, at 11:20 AM, Harry Wentland wrote:
> Agreed. Little timing changes often have unintended effects.
> I have no desire to change working code unless it's required
> to fix a real-life issue.
>
> Harry
Thanks for your explanation, and for taking the time to review.
Best regar
Round-robin being the non-default policy and unclear how much it is used,
we can notice that it can be implemented using the FIFO data structures if
we only invent a fake submit timestamp which is monotonically increasing
inside drm_sched_rq instances.
So instead of remembering which was the last
If the new deadline policy is at least as good as FIFO and we can afford
to remove round-robin, we can simplify the scheduler code by making the
scheduler to run queue relationship always 1:1 and remove some code.
Also, now that the FIFO policy is gone the tree of entities is not a FIFO
tree any m
Rq->lock only protects the tree walk so lets move the rest out.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthew Brost
Cc: Philipp Stanner
---
drivers/gpu/drm/scheduler/sched_main.c | 31 ++
1 file changed, 17 insertions(+), 14 deleti
Currently the job free work item will lock sched->job_list_lock first time
to see if there are any jobs, free a single job, and then lock again to
decide whether to re-queue itself if there are more finished jobs.
Since drm_sched_get_finished_job() already looks at the second job in the
queue we c
From: Ruili Ji
Add interface for hardware init by vcn instance.
Reviewed-by:Sonny Jiang
Reviewed-by:Leo Liu
Signed-off-by: Ruili Ji
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 53 +++--
1 file changed, 33 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/amd/
From: Ruili Ji
Add function for vcn queue reset to make driver to
do fine-grained reset instead of the whole gpu reset.
Reviewed-by:Sonny Jiang
Reviewed-by:Leo Liu
Signed-off-by: Ruili Ji
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 32 +
1 file changed, 32 insertion
On 3/31/25 19:04, Shengyu Qu wrote:
My understanding is that currently the driver would just report no
colorop support on cursor plane and actually implement the background
plane's colorop on cursor?
No.
Again it is up to compositors or apps to determine how color pipeline
and color
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Leslie
Any comment on this?
Looks like you add this code 3 years ago on patch: drm/amdgpu: Unmap MMIO
mappings when device is not unplugged
Best,
Zhenguo
Cloud-GPU Core team, SRDC
-Original Message-
From: Koenig, Christian
Se
Am 31.03.25 um 13:26 schrieb ZhenGuo Yin:
> Kernel doorbell BOs needs to be freed before ttm_fini.
Good catch, but does anybody remember why we have the
drm_dev_enter()/drm_dev_exit() here?
It's clearly for hotplug, but it doesn't make sense to have the
amdgpu_doorbell_fini() under it as far as
This reverts commit c2cc3648ba517a6c270500b5447d5a1efdad5936.
Turned out that this has some negative consequences for some workloads.
Instead check if the cleaner shader should run directly.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 4 ++--
drivers/gpu/drm/amd/
Kernel doorbell BOs needs to be freed before ttm_fini.
Fixes: 54c30d2a8def ("drm/amdgpu: create kernel doorbell pages")
Signed-off-by: ZhenGuo Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/am
On 3/30/25 06:59, Shengyu Qu wrote:
Hi,
Do we really need to disable cursor plane color pipeline support? I
don't think we need to disable that if it is supported, since there
might be some user-defined colored cursor icon.
This patch applies to AMD hardware only:
https://elixir.bootlin.
On 3/31/25 09:43, Shengyu Qu wrote:
Hi,
Thanks for reply. So currently we have to apply color conversion on the
background plane of the cursor to do some color space conversion. What
would happen if cursor and background plane needs different conversion
config? Or we just give the cursor a
On Fri, Mar 28, 2025 at 10:09 PM Gergo Koteles wrote:
>
> The _DDC method should return a buffer, or an integer in case of an error.
> But some Lenovo laptops incorrectly return EDID as buffer in ACPI package.
>
> Calling _DDC generates this ACPI Warning:
> ACPI Warning: \_SB.PCI0.GP17.VGA.LCD._DD
Am 26.03.25 um 08:00 schrieb James Flowers:
> msleep < 20ms will often sleep for ~20ms (according to
> Documentation/timers/timers-howto.rst).
Our display team has to decide but I don't think that this patch is justified.
The time given to msleep is just the minimum time necessary for some HW ac
Am 28.03.25 um 20:14 schrieb Alex Deucher:
> On Thu, Jan 9, 2025 at 12:07 PM Felix Kuehling wrote:
>> From: Christian König
>>
>> Try pinning into VRAM to allow P2P with RDMA NICs without ODP
>> support if all attachments can do P2P. If any attachment can't do
>> P2P just pin into GTT instead.
>>
KIQ invalidate_tlbs request has been seen to marginally exceed the
configured 100 ms timeout on systems under load.
All other KIQ requests in the driver use a 10 second timeout. Use a
similar timeout implementation on the invalidate_tlbs path.
v2: Poll once before msleep
v3: Fix return value
Sig
On 3/31/25 10:12, Shengyu Qu wrote:
So currently we have to hope the compositor won't use
DRM_PLANE_TYPE_CURSOR planes at all Why do we still register
DRM_PLANE_TYPE_CURSOR in the driver?
I am not sure what your question is. A compositor can choose or skip any
hardware features, but th
On 3/31/25 10:24, Shengyu Qu wrote:
在 2025/3/27 7:46, Alex Hung 写道:
From: Harry Wentland
Add documentation for color pipeline API.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
v8:
- Fix typo "definint" -> "defining"
v7:
- Add a commit messages
v5:
- Don't require
On 3/31/25 10:31, Shengyu Qu wrote:
Sorry for vague expression. I mean that I think we shouldn't register
DRM_PLANE_TYPE_CURSOR in the driver, as we don't have actual hardware
support.
This is not true. AMD has hardware cursor support.
在 2025/4/1 0:26, Alex Hung 写道:
On 3/31/25 10:12,
On 3/31/25 11:04, Shengyu Qu wrote:
Or we can add some kind of "linked with" info to plane's COLOR_PIPELINE
property, to let userspace know that cursor plane and background plane
share the same colorop config. So that userspace could do extra
conversion on cursor image data to avoid display
On 2025-03-31 08:34, Christian König wrote:
> Am 26.03.25 um 08:00 schrieb James Flowers:
>> msleep < 20ms will often sleep for ~20ms (according to
>> Documentation/timers/timers-howto.rst).
>
> Our display team has to decide but I don't think that this patch is justified.
>
> The time given
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