Am 25.03.25 um 07:46 schrieb Prike Liang:
> Reserve the move fence space before adding the fence
> to reserve objection.
NAK, the caller is doing this. We are just reserving a new slot for the next
move here.
Aborting without noting the fence is illegal and would lead to memory
corruption.
Reg
On 21/03/25 15:56, Daniel Stone wrote:
Hi Vignesh,
On Fri, 14 Mar 2025 at 08:59, Vignesh Raman wrote:
LAVA was recently patched [1] with a fix on how parameters are parsed in
`lava-test-case`, so we don't need to repeat quotes to send the
arguments properly to it. Uprev mesa to fix this issu
[Public]
Here it may need to test the uq_mgr list to see whether it is a fresh list
before adding it to the userq_mgr_list; otherwise, it may add a duplicated
uq_mgr list. I have sent a patch for that check.
Regards,
Prike
> -Original Message-
> From: amd-gfx On Behalf Of Alex
>
Am 24.03.25 um 23:48 schrieb Balbir Singh:
>>> lspci -v reports 8G of memory at 0xfc so I assmumed that is the GPU
>>> RAM.
>>> 03:00.0 Display controller: Advanced Micro Devices, Inc. [AMD/ATI] Navi 23
>>> [Radeon RX 6600/6600 XT/6600M] (rev c3)
>>> Subsystem: Micro-Star International
On 3/25/2025 12:45 PM, jesse.zh...@amd.com wrote:
> This temporarily reverts commit 47cad92043909928d7260b77e7a996a0ae043f8c.
>
> Signed-off-by: Jesse Zhang
Reviewed-by: Lijo Lazar
Thanks,
Lijo
> ---
> drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 77 ---
> .../gpu/drm/
This test will avoid to add the uq_mgr duplicated list to
the userq_mgr_list.
Fixes: 4ed9e48f0821 ("drm/amdgpu: store userq_managers in a list in adev")
Signed-off-by: Prike Liang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --gi
On 3/25/25 19:36, Christian König wrote:
> Am 25.03.25 um 00:07 schrieb Bert Karwatzki:
>> Here's the dmesg from linux-next-6.14-rc7-next20250321 (CONFIG_PCI_P2PDMA
>> not set)
>> The memory ranges of (afe-aff) or
>> (3ffe-3fff) are
>> mentioned in neither of them.
Hook up zero RPM enable for 9070 and 9070 XT based on RDNA3
(smu 13.0.0 and 13.0.7) code.
Tested on 9070 XT Hellhound
Signed-off-by: Tomasz Pakuła
---
.../drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c | 55 ++-
1 file changed, 54 insertions(+), 1 deletion(-)
diff --git a/drivers/gp
On 3/19/25 22:23, Huacai Chen wrote:
Hi, Alex,
On Thu, Mar 20, 2025 at 10:16 AM Alex Hung wrote:
On 3/18/25 05:17, Huacai Chen wrote:
Commit 7da55c27e76749b9 ("drm/amd/display: Remove incorrect FP context
start") removes the FP context protection of dml2_create(), and it said
"All the D
err_event_athub and dpc recovery will corrupt VCPU buffer,
so we need to restore fw data and clear buffer in amdgpu_vcn_resume()
Signed-off-by: Ce Sun
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/d
On 3/26/25 10:43, Balbir Singh wrote:
> On 3/26/25 10:21, Bert Karwatzki wrote:
>> Am Mittwoch, dem 26.03.2025 um 09:45 +1100 schrieb Balbir Singh:
>>>
>>>
>>> The second region seems to be additional, I suspect that is HMM mapping
>>> from kgd2kfd_init_zone_device()
>>>
>>> Balbir Singh
>>>
>> Go
On 03/25, Alex Deucher wrote:
> On Tue, Mar 25, 2025 at 4:16 PM Rodrigo Siqueira wrote:
> >
> > On 03/19, Alex Deucher wrote:
> > > We shouldn't return after the last section.
> > > We need to update the rest of the CSIB.
> >
> > What is CSIB?
>
> Clear State Indirect Buffer. It provides the cle
On 3/26/25 10:21, Bert Karwatzki wrote:
> Am Mittwoch, dem 26.03.2025 um 09:45 +1100 schrieb Balbir Singh:
>>
>>
>> The second region seems to be additional, I suspect that is HMM mapping from
>> kgd2kfd_init_zone_device()
>>
>> Balbir Singh
>>
> Good guess! I inserted a printk into kgd2kfd_init_z
On Tue, Mar 25, 2025 at 6:07 PM Brady Norander wrote:
>
> mfd_add_hotplug_devices() assigns child platform devices with
> PLATFORM_DEVID_AUTO, but the ACP machine drivers expect the platform
> device names to never change. Use mfd_add_devices() instead and give
> each cell a unique id.
While you
On 03/06, Alex Deucher wrote:
> Describes what debugfs files are available and what
> they are used for.
>
> v2: fix some typos (Mark Glines)
> v3: Address comments from Siqueira and Kent
>
> Signed-off-by: Alex Deucher
> ---
> Documentation/gpu/amdgpu/debugfs.rst | 210 ++
From: Lo-an Chen
[ Upstream commit d60073294cc3b46b73d6de247e0e5ae8684a6241 ]
[WHY]
The fw_state in dmub_srv was assigned with wrong address.
The address was pointed to the firmware region.
[HOW]
Fix the firmware state by using DMUB_DEBUG_FW_STATE_OFFSET
in dmub_cmd.h.
Reviewed-by: Nicholas Ka
On 03/19, Alex Deucher wrote:
> We shouldn't return after the last section.
> We need to update the rest of the CSIB.
What is CSIB?
What happens if the other CSIB is not updated?
Thanks
>
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 2 --
> 1 file changed, 2
On Tue, Mar 25, 2025 at 4:16 PM Rodrigo Siqueira wrote:
>
> On 03/19, Alex Deucher wrote:
> > We shouldn't return after the last section.
> > We need to update the rest of the CSIB.
>
> What is CSIB?
Clear State Indirect Buffer. It provides the clear state that gets
put into the hardware context
On 03/25, Alex Deucher wrote:
> Drop the cgs smu firmware code for SI, it's not used.
> The smu firmware fetching for SI is done in si_dpm.c.
>
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 61 -
> 1 file changed, 61 deletions(-)
>
> dif
On Tue, Mar 25, 2025 at 3:54 PM Rodrigo Siqueira wrote:
>
> On 03/25, Alex Deucher wrote:
> > Drop the cgs smu firmware code for SI, it's not used.
> > The smu firmware fetching for SI is done in si_dpm.c.
> >
> > Signed-off-by: Alex Deucher
> > ---
> > drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c |
On Tue, Mar 25, 2025 at 4:38 AM Christian König
wrote:
>
> Alex shouldn't be try to completely nuke the CGS functions?
Sure, but it would need to be replaced with something else so I'm not
sure it's worth the effort since it's only used by a few older GPUs.
Alex
>
> Christian.
>
> Am 25.03.25 u
On 3/25/25 18:35, Christian König wrote:
> Am 24.03.25 um 23:48 schrieb Balbir Singh:
lspci -v reports 8G of memory at 0xfc so I assmumed that is the
GPU RAM.
03:00.0 Display controller: Advanced Micro Devices, Inc. [AMD/ATI] Navi 23
[Radeon RX 6600/6600 XT/6600M] (rev
Invoke DRM_CLASSMAP_USE from xe_drm_client.c. When built with
CONFIG_DRM_USE_DYNAMIC_DEBUG=y, this tells dydnbg that Xe uses
has drm.debug calls.
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/xe/xe_drm_client.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_drm_clie
Applied. Thanks!
Alex
On Tue, Mar 25, 2025 at 4:14 AM AnantaSrikar wrote:
>
> From: Ananta Srikar
>
> Fixes a typo in the word "version" in an error message.
>
> Signed-off-by: Ananta Srikar
>
> ---
> drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion
On Mon, 24 Mar 2025 13:51:18 +0200, Dmitry Baryshkov wrote:
> Existing DPCD access functions return an error code or the number of
> bytes being read / write in case of partial access. However a lot of
> drivers either (incorrectly) ignore partial access or mishandle error
> codes. In other cases t
On Mon, Mar 24, 2025 at 03:34:02PM -0400, Lyude Paul wrote:
> This looks all good to me, do you need someone to push this to drm-misc?
No, I can do that. I have resent it in order to retrigger Intel and Xe
CI builds. It seems that Xe built was successful and i915 shows
unrelated issues. I think it
On Tue, Mar 25, 2025 at 4:33 AM Harald Judt wrote:
>
> From 9a2f16a4a43f424f5008d5c4a87e1329f682e919 Mon Sep 17 00:00:00 2001
> From: Harald Judt
> Date: Sat, 22 Mar 2025 23:01:57 +0100
> Subject: [PATCH] amdgpu: Do not trigger reset_method S3 workaround for S4
>
> Commit 3a9626c816db ("drm/amd:
On Tue, Mar 25, 2025 at 9:50 AM Christian König
wrote:
>
> Am 25.03.25 um 14:30 schrieb Alex Deucher:
> > On Tue, Mar 25, 2025 at 4:38 AM Christian König
> > wrote:
> >> Alex shouldn't be try to completely nuke the CGS functions?
> > Sure, but it would need to be replaced with something else so I
GC v9_4_2 uses a new versioning scheme for CP firmware, making
the warning ("CP firmware version too old, please update!") irrelevant."
Signed-off-by: Candice Li
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b
Enable pipes on both MECs for MES.
Fixes: 745f46b6a99f ("drm/amdgpu: enable mes v12 self test")
Reviewed-by: Prike Liang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgp
Port the workload profile setting logic into dm before MALL optimization.
Background:
MALL optimization strategy has changed in the firmware.Previously, firmware
does not
care what workload type it is, once there is a request from DAL for MALL,
firmware immediately
trigger the MALL setting seque
On 2025-03-25 3:09, Ваторопин Андрей wrote:
> From: Andrey Vatoropin
>
> Static analysis shows that pointer "svms" cannot be NULL because it points
> to the object "struct svm_range_list".
>
> Remove the extra NULL check. It is meaningless and harms the readability
> of the code.
>
> Found by Linu
Pipes and Queues are two common vocabulary that pervades discussions
around amdgpu core features. The definition and explanation of those
components are spread around multiple places in the code, mailing list,
and Gitlab, which sometimes leads to the wrong interpretation of these
concepts. This com
GC is a large block that plays a vital role for amdgpu; for this reason,
this commit creates one specific page for GC and adds extra information
about the CP component.
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/driver-core.rst | 30 ++-
Documentation/gpu/amdgpu/gc/
The APU and dGPU tables are hidden in the driver misc info, which makes
it hard to find specific hardware info when users need it. This commit
creates a single page for this information and adds it to the top of the
amdgpu list to improve searchability.
Signed-off-by: Rodrigo Siqueira
---
.../gp
Hi,
This patchset came from my endeavor to understand better how some of the
amdgpu components operate; in particular, I was focused on the ideas
behind Pipes, Hardware Queues, MES, and Ring Buffers. In some way, this
series is an attempt to put multiple pieces of information spread around
many di
This commit introduces some new acronyms extracted from the source code
and found on some web pages around the internet (most of them came from
ArchLinux, Gentoo, and Wikipedia links).
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/amdgpu-glossary.rst | 36
1 f
On Tue, Mar 25, 2025 at 4:23 AM Liang, Prike wrote:
>
> [Public]
>
> Here it may need to test the uq_mgr list to see whether it is a fresh list
> before adding it to the userq_mgr_list; otherwise, it may add a duplicated
> uq_mgr list. I have sent a patch for that check.
Good catch. We should
So we can iterate across them when we need to manage
all user queues.
v2: add uq_mgr to adev list in amdgpu_userq_mgr_init
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 3 +++
drivers/gpu/drm/amd/amdgpu/a
MES is an important firmware that lacks some essential documentation.
This commit introduces an overview of it and how it works.
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/driver-core.rst | 2 ++
Documentation/gpu/amdgpu/gc/index.rst| 7 -
Documentation/gpu/amdgpu/gc/
On 03/18, Alex Deucher wrote:
> On Tue, Mar 18, 2025 at 1:46 PM Rodrigo Siqueira wrote:
> >
> > On 03/13, Alex Deucher wrote:
> > > On Thu, Mar 13, 2025 at 6:21 PM Rodrigo Siqueira
> > > wrote:
> > > >
> > > > n 03/13, Alex Deucher wrote:
> > > > > To better evaluate user queues, add a module pa
Since driver-core has an overview of the AMD GPU hardware structure, it
makes more sense to keep it first. This commit move driver-core up in
the index list.
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/index.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
Drop the cgs smu firmware code for SI, it's not used.
The smu firmware fetching for SI is done in si_dpm.c.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 61 -
1 file changed, 61 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.
Applied. Thanks!
Alex
On Mon, Mar 24, 2025 at 8:08 PM Andres Urian Florez
wrote:
>
> Instead of using the strcpy() deprecated function to populate the
> fw_name, use the strscpy() function
>
> Link: https://www.kernel.org/doc/html/latest/process/deprecated.html#strcpy
>
> Signed-off-by: Andres
On Tue, Mar 25, 2025 at 8:42 AM Tomasz Pakuła
wrote:
>
> Hook up zero RPM enable for 9070 and 9070 XT based on RDNA3
> (smu 13.0.0 and 13.0.7) code.
>
> Tested on 9070 XT Hellhound
>
> Signed-off-by: Tomasz Pakuła
Applied. Thanks!
Alex
> ---
> .../drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c |
[AMD Official Use Only - AMD Internal Distribution Only]
Thanks, will improve it.
Best Regards,
Dean
From: Zhang, Hawking
Sent: Thursday, March 20, 2025 2:22 PM
To: Liu, Xiang(Dean) ; amd-gfx@lists.freedesktop.org
Cc: Wang, Yang(Kevin) ; Zhou1, Tao ;
Chai, T
This commit addresses the issue where the cleaner shader was not
correctly executed during gang submissions due to improper handling of
the isolation spearhead.
- Enhanced the `amdgpu_gfx_run_cleaner_shader_job` function to
initialize `isolation->spearhead` with the job's scheduled fence for
c
On Tue, 25 Mar 2025 at 05:36, Feng, Kenneth wrote:
>
> [AMD Official Use Only - AMD Internal Distribution Only]
>
> Hi Tomasz,
> We can only have zero rpm on/off setting.
> After confirmation, the fan stop temperature setting is not exposed to algin
> windows driver.
> So the fw always pick the d
Am 25.03.25 um 14:30 schrieb Alex Deucher:
> On Tue, Mar 25, 2025 at 4:38 AM Christian König
> wrote:
>> Alex shouldn't be try to completely nuke the CGS functions?
> Sure, but it would need to be replaced with something else so I'm not
> sure it's worth the effort since it's only used by a few ol
This temporarily reverts commit 47cad92043909928d7260b77e7a996a0ae043f8c.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 77 ---
.../gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h | 70 -
2 files changed, 14 insertions(+), 133 deletions
Invoke DYNAMIC_DEBUG_CLASSMAP_PARAM to hook drm.debug (__drm_debug) to the
DRM_UT_* classmap, replacing the ad-hoc wiring previously doing it.
Add DRM_CLASSMAP_* adapter macros to selectively use
DYNAMIC_DEBUG_CLASSMAP_* when DRM_USE_DYNAMIC_DEBUG=y is configured.
Signed-off-by: Jim Cromie
---
On Wed, 19 Mar 2025 10:28:53 +0100, Jiri Slaby (SUSE) wrote:
> tl;dr if patches are agreed upon, I ask subsys maintainers to take the
> respective ones via their trees (as they are split per subsys), so that
> the IRQ tree can take only the rest. That would minimize churn/conflicts
> during merge
Instead of using the strcpy() deprecated function to populate the
fw_name, use the strscpy() function
Link: https://www.kernel.org/doc/html/latest/process/deprecated.html#strcpy
Signed-off-by: Andres Urian Florez
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 68 -
1 file
On Sun, Mar 16, 2025 at 3:14 PM wrote:
>
> On Tue, Feb 25, 2025 at 7:29 AM Louis Chauvet
> wrote:
> >
> >
> >
> > Le 25/01/2025 à 07:45, Jim Cromie a écrit :
> > > move the DYNDBG_CLASSMAP_PARAM macro from test-dynamic-debug.c into
> > > the header, and refine it, by distinguishing the 2 use cas
Hello Alex!
"If there are a lot of requests to toggle gfxoff, the worker thread to
allow it again gets
cancelled and scheduled again, extending the time it's disallowed." -
That's true except one thing:
cancelling and scheduling also take CPU cycles, and the pause between
submissions can exceed
10
Since there are several GPU series that require additional GFXOFF
ON/OFF switches
to ensure stability, this algorithm can be seen as a way to mitigate
the negative effects
of workarounds.
Simple and efficient.
Regards,
Sergey
On Mon, Mar 24, 2025 at 4:34 PM Sergey Kovalenko
wrote:
>
> Hello Alex
From: Ananta Srikar
Fixes a typo in the word "version" in an error message.
Signed-off-by: Ananta Srikar
---
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/mes_v11_
On Mon, Mar 24, 2025 at 9:08 AM Louis Chauvet wrote:
>
>
>
> Le 20/03/2025 à 19:51, Jim Cromie a écrit :
> Thanks for your explanation of __outvar! It makes sense. I never seen
> this pattern anywhere in the kernel, maybe a simple doc comment is
> enough to carry the information:
Im gonna pull
From 9a2f16a4a43f424f5008d5c4a87e1329f682e919 Mon Sep 17 00:00:00 2001
From: Harald Judt
Date: Sat, 22 Mar 2025 23:01:57 +0100
Subject: [PATCH] amdgpu: Do not trigger reset_method S3 workaround for S4
Commit 3a9626c816db ("drm/amd: Stop evicting resources on APUs in suspend")
causes hibernation
On Thu, 20 Mar 2025 at 03:38, Feng, Kenneth wrote:
>
> [AMD Official Use Only - AMD Internal Distribution Only]
>
> Thanks Tohmasz.
> I confirmed that this change is not in the latest driver-if file.
> However, this is a fw interface provided by firmware team, we can not change
> it.
> That means
"Moreover the work only gets scheduled/cancelled
around a ref count of 0" - and this happens more than 600 times
per second under load, as you can see from the table.
Moreover these 600 GFXOFF requests are executed with a very
little interval between them. If we set GFXOFF delay to 0 by
default, i
The gma500 has 126 DRM_UT_* debugs, make them controllable when
CONFIG_DRM_USE_DYNAMIC_DEBUG=y by telling dyndbg that the module has
class'd debugs.
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/gma500/psb_drv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/gma500/psb_drv
Am 25.03.25 um 00:07 schrieb Bert Karwatzki:
> Here's the dmesg from linux-next-6.14-rc7-next20250321 (CONFIG_PCI_P2PDMA not
> set)
> The memory ranges of (afe-aff) or (3ffe-3fff)
> are
> mentioned in neither of them.
Ugh, next time either in two mails or as attac
Alex shouldn't be try to completely nuke the CGS functions?
Christian.
Am 25.03.25 um 01:07 schrieb Andres Urian Florez:
> Instead of using the strcpy() deprecated function to populate the
> fw_name, use the strscpy() function
>
> Link: https://www.kernel.org/doc/html/latest/process/deprecated.ht
Here is the impact:
Ryzen 5 2500U
Idle PkgWatt: 1.3W -> 0.75W
glxgears fps: 7200 -> 4500
aquarium 15,000 fish: 56-60 -> 45-50
These results are for gfx_off_ctrl_immediate()
https://github.com/pacoandres/laikm/issues/56
https://github.com/pacoandres/laikm/issues/47
Same results are for default zer
Am 25.03.25 um 11:14 schrieb Bert Karwatzki:
> My /proc/iomem contans two memory areas of 8G size which are
> belonging to PCI :03:00.0, one of the is the BAR reported by dmesg
> [ 0.312692] [ T1] pci :03:00.0: BAR 0 [mem 0xfc-0xfd
> 64bit pref]
> the other one is "afe000
I did some monitoring using this patch (on top of 6.12.18):
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
index 0760e70402ec..ccd0c9058cee 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_m
Incorrectly spelled CFLAGS- failed to add -DDYNAMIC_DEBUG_MODULE,
which disabled dynamic-debug in modules built with:
CONFIG_DYNAMIC_DEBUG=n # 1
CONFIG_DYNAMIC_DEBUG_CORE=y # 2
CONFIG_DRM_USE_DYNAMIC_DEBUG=y # 3
NB: this adds the flag (when 3) more often than strictly needed;
module
My /proc/iomem contans two memory areas of 8G size which are
belonging to PCI :03:00.0, one of the is the BAR reported by dmesg
[ 0.312692] [ T1] pci :03:00.0: BAR 0 [mem 0xfc-0xfd 64bit
pref]
the other one is "afe-aff : :03:00.0" (in the case without
From: Andrey Vatoropin
Static analysis shows that pointer "svms" cannot be NULL because it points
to the object "struct svm_range_list".
Remove the extra NULL check. It is meaningless and harms the readability
of the code.
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Signed
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