We sometimes have people trying to use debugging options in production
environments.
Mark options only meant to be used for debugging as unsafe so that the
kernel is tainted when they are used.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 14 +++---
1 fil
On 12/25/2024 5:09 PM, Chris Bainbridge wrote:
Commit c6a837088bed ("drm/amd/display: Fetch the EDID from _DDC if
available for eDP") added function dm_helpers_probe_acpi_edid, which
fetches the EDID from the BIOS by calling acpi_video_get_edid.
acpi_video_get_edid returns a pointer to the EDI
This patch adds the cec_notifier feature to amdgpu driver.
The changes will allow amdgpu driver code to notify EDID
and HPD changes to an eventual CEC adapter.
Signed-off-by: Kun Liu
---
drivers/gpu/drm/amd/display/Kconfig | 2 +
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 76
On 2025-01-06 21:31, Deng, Emily wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
From:
Yang, Philip
On Mon, Jan 6, 2025 at 2:37 PM Jay Cornwall wrote:
>
> gfx12 derivatives will have substantially different trap handler
> implementations from gfx10/gfx11. Add a separate source file for
> gfx12+ and remove unneeded conditional code.
>
> No functional change.
>
> v2: Revert copyright date to 2018,
On 1/6/2025 8:02 PM, Deng, Emily wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
*From:*Chen, Xiaogang
*Sent:* Monday, January 6, 2025 11:27 PM
*To:* Deng, Emily ; amd-gfx@lists.freedesktop.org
*Subject:* Re: [PATCH] drm/amdkfd: Fix partial migrate issue
On 1/2/2025 6:06 PM,
From: Wayne Lin
[Why]
For the legacy secure display, it involves PSP + DMUB to confgiure and
retrieve the CRC/ROI result. Have requirement to support mode which all
handled by driver only.
[How]
Add another "DisplayCRC" mode, which doesn't involve PSP + DMUB.
All things are handled by the driver
From: Wayne Lin
[Why]
Have the need to specify the CRC window on specific CRC engine.
dc_stream_configure_crc() today calculates CRC on crc engine 0 only and always
resets CRC engine at first.
[How]
Add index parameter to dc_stream_configure_crc() for selecting the desired crc
engine. Additional
From: Leo Li
[Why]
Outside of a modeset/link configuration change, we should not have to
wait for the panel to exit PSR. Depending on the panel and it's state,
it may take multiple frames for it to exit PSR. Therefore, waiting in
all scenarios may cause perceived stuttering, especially in combin
From: Dillon Varone
[WHY&HOW]
BIOS table will not always contain accurate UMC channel info when
harvesting is enabled, so get the correct info from SMU.
Reviewed-by: Alvin Lee
Signed-off-by: Dillon Varone
Signed-off-by: Tom Chung
---
.../amd/display/dc/clk_mgr/dcn401/dalsmc.h| 4 +-
...
From: Alex Hung
[WHAT & HOW]
Variables, used as denominators and maybe not assigned to other values,
should be initialized to non-zero to avoid DIVIDE_BY_ZERO, as reported
by Coverity.
Reviewed-by: Austin Zheng
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Alex Hung
Signed-off-by: Tom Chung
-
From: Robin Chen
[Why & How]
Add a new flag in replay_config to indicate the replay
low hz status.
Reviewed-by: Allen Li
Signed-off-by: Robin Chen
Signed-off-by: Tom Chung
---
drivers/gpu/drm/amd/display/dc/dc_types.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/
From: Nicholas Susanto
Revert commit 284f141f5ce5 ("drm/amd/display: Enable urgent latency adjustments
for DCN35")
[Why & How]
Urgent latency increase caused 2.8K OLED monitor caused it to
block this panel support P0.
Reverting this change does not reintroduce the netflix corruption issue
wh
From: Leo Li
[Why]
There should not be any need to revalidate bandwidth on memory placement
change, since the fb is expected to be pinned to DCN-accessable memory
before scanout. For APU it's DRAM, and DGPU, it's VRAM. However, async
flips + memory type change needs to be rejected.
[How]
Do no
From: Michael Strauss
[WHY]
The defines have also been updated with prefix AMD_ and atomfirmware.h
has been temporarily updated with both sets of defines to allow the
transition.
This update is being made to standardize workaround chip_cap flags,
in order to support more workaround flags in the f
From: Taimur Hassan
Refactoring some flags for replay
Acked-by: Wayne Lin
Signed-off-by: Taimur Hassan
Signed-off-by: Tom Chung
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/
From: Sung Lee
[WHY]
On entering/exiting idle power, certain parameters would be
very useful to know for power profiling purposes.
[HOW]
This commit adds certain hard min clocks and pipe types
to log output on idle optimization enter/exit.
Reviewed-by: Alvin Lee
Signed-off-by: Sung Lee
Signed
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
- Add some feature for secure display
- Add replay desync error count tracking and reset
- Update chip_cap defines and usage
- Remove unnecessary eDP power down
- Fix some stuttering/corruption issue on PSR panel
-
From: Jack Chang
[Why & How]
Build-up get/reset desync error count interface and implement the functions.
Reviewed-by: ChunTao Tso
Reviewed-by: Robin Chen
Signed-off-by: Jack Chang
Signed-off-by: Tom Chung
---
drivers/gpu/drm/amd/display/dc/dc_types.h| 2 ++
.../drm/amd/
From: Karthi Kandasamy
[Why]
The functions read_ono_state are no longer in use and have been identified
as redundant.
Removing them helps streamline the codebase and improve maintainability by
eliminating unnecessary code.
[How]
These unused functions were removed from Hwss module, ensuring that
From: Austin Zheng
[Why & How]
Add several DML21 fixes
Reviewed-by: Wenjing Liu
Signed-off-by: Austin Zheng
Signed-off-by: Tom Chung
---
.../src/dml2_core/dml2_core_dcn4_calcs.c | 107 --
.../src/dml2_core/dml2_core_shared_types.h| 6 +-
.../dml21/src/dml2_core/dml
From: Charlene Liu
[why & how]
this is to init to HW real DTBCLK.
and use real HW DTBCLK status to update internal logic state
Reviewed-by: Nicholas Kazlauskas
Reviewed-by: Martin Leung
Signed-off-by: Charlene Liu
Signed-off-by: Ausef Yousof
Signed-off-by: Tom Chung
---
.../display/dc/clk_
From: Dennis Chan
[why & how]
Revised Replay Full screen video Pseudo vblank control.
Reviewed-by: Allen Li
Signed-off-by: Dennis Chan
Signed-off-by: Tom Chung
---
drivers/gpu/drm/amd/display/dc/dc_types.h | 4 ++--
drivers/gpu/drm/amd/display/modules/power/power_helpers.c |
From: Peichen Huang
[WHY]
We see unstable DP LL 4.2.1.3 test result with dpia pre-train. It is
because the outbox interrupt mechanism can not handle HPD
immediately and require some improvement.
[HOW]
1. not enable link if hpd_pending is true.
2. abort pre-train if training failed and hpd_pendin
From: Ryan Seto
This version brings along following fixes:
- Add some feature for secure display
- Add replay desync error count tracking and reset
- Update chip_cap defines and usage
- Remove unnecessary eDP power down
- Fix some stuttering/corruption issue on PSR panel
- Cleanup and refactoring
From: Rafal Ostrowski
[Why]
There are a few cleanup and refactoring tasks that need to be done
with the DML2.1 wrapper and DC interface to remove dependencies on
legacy structures and N-1 prototypes.
[How]
Implemented pipe_ctx->global_sync.
Implemented new functions to use pipe_ctx->hubp_regs an
From: Gabe Teeger
[why]
Underflow and flickering was occuring due to high scaling ratios
when resizing videos.
[how]
Limit the scaling ratios by increasing the max scaling factor
Reviewed-by: Nicholas Kazlauskas
Signed-off-by: Gabe Teeger
Signed-off-by: Tom Chung
---
.../drm/amd/display/dc/
From: Wayne Lin
[Why & How]
Currently in dm_dp_mst_is_port_support_mode(), when valdidating mode
under dsc decoding at the last DP link config, we only validate the
case when there is an UFP. However, if the MSTB LCT=1, there is no
UFP.
Under this case, use root_link_bw_in_kbps as the available
On 2025-01-07 07:30, Deng, Emily wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Felix,
You are right, it is easily to hit deadlock, don't know why LOCKDEP doesn't catch this. Need to find another solution.
Hi Philip,
Do you have a sol
[Why]
Without the dmub hw lock, it may cause the lock timeout issue
while do modeset on PSR1 eDP panel.
[How]
Allow dmub hw lock for PSR1.
Reviewed-by: Sun peng Li
Signed-off-by: Tom Chung
---
drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.c | 3 ++-
1 file changed, 2 insertions(+), 1 del
On 1/7/2025 06:08, Kun Liu wrote:
This patch adds the cec_notifier feature to amdgpu driver.
The changes will allow amdgpu driver code to notify EDID
and HPD changes to an eventual CEC adapter.
Signed-off-by: Kun Liu
Reviewed-by: Mario Limonciello
---
drivers/gpu/drm/amd/display/Kconfig
On Mon, Jan 6, 2025 at 10:56 PM Feng, Kenneth wrote:
>
> [AMD Official Use Only - AMD Internal Distribution Only]
>
> -Original Message-
> From: Alex Deucher
> Sent: Monday, January 6, 2025 11:59 PM
> To: Feng, Kenneth
> Cc: amd-gfx@lists.freedesktop.org; Pillai, Aurabindo
> ; Deucher,
On Mon, Jan 6, 2025 at 6:12 AM Victor Zhao wrote:
>
> refill the ucode bo during psp resume for SRIOV, otherwise ucode load
> will fail after VM hibernation and fb clean.
Please drop the comment above amdgpu_ucode_init_bo() in psp_hw_init()
since it is no longer true. WIth that fixed, the patch
From: Wayne Lin
[Why]
Observed frame rate get dropped by tool like glxgear. Even though the
output to monitor is 60Hz, the rendered frame rate drops to 30Hz lower.
It's due to code path in some cases will trigger
dm_dp_mst_is_port_support_mode() to read out remote Link status to
assess the avail
From: Yiling Chen
[why]
When first time of link training is fail,
eDP would be powered down and
would not be powered up for next retry link training.
It causes that all of retry link linking would be fail.
[how]
We has extracted both power up and down sequence from
enable/disable link output fun
On Tue, Jan 07, 2025 at 03:53:08PM +0100, Christian König wrote:
> We sometimes have people trying to use debugging options in production
> environments.
>
> Mark options only meant to be used for debugging as unsafe so that the
> kernel is tainted when they are used.
>
> Signed-off-by: Christian
Get the PCIe link with of the device itself (or it's
integrated upstream bridge) and cache that.
v2: fix typo
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3820
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 152 -
drivers/gpu/drm/amd/in
Combine the platform and GPU caps like we do for PCIe Gen.
This aligns properly with expectations and documentation
for the interface.
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3820
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 19 +++
1 fi
On Sat, 14 Dec 2024 15:37:04 +0200, Dmitry Baryshkov wrote:
> While working on the generic mode_valid() implementation for the HDMI
> Connector framework I noticed that unlike other DRM objects
> drm_connector accepts non-const pointer to struct drm_display_mode,
> while obviously mode_valid() isn'
[Public]
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Kent Russell
Sent: Monday, December 23, 2024 9:29 AM
To: amd-gfx@lists.freedesktop.org
Cc: Jiang Liu ; Russell, Kent
Subject: [PATCH] amdgpu: tear down ttm range manager for doorbell in
amdgpu_ttm
CC Hans who's been dealing with the acpi_video code for some time.
On Thu, Dec 26, 2024 at 2:27 AM Chris Bainbridge
wrote:
>
> On Thu, Dec 26, 2024 at 12:19:02AM +0100, Tobias Jakobi wrote:
> > Hi Chris!
> >
> > On 12/26/24 00:09, Chris Bainbridge wrote:
> >
> > > Commit c6a837088bed ("drm/amd/di
this original test condition is unclear.
Signed-off-by: James Zhu
---
drivers/gpu/drm/ttm/ttm_bo.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 48c5365efca1..d40f07802c4f 100644
--- a/drivers/gpu/drm/ttm/ttm
On 2025-01-06 21:10, Deng, Emily wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
-Original Message-
From: Kuehling, Felix
Sent: Tuesday, January 7, 2025 4:53 AM
To: Deng, Emily ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdkfd: Fix partial migrate issue
On 1/4/2025 8:45 PM, Jiang Liu wrote:
Fix possible resource leakage on error recovery path in function
kgd2kfd_device_init().
Signed-off-by: Jiang Liu
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/
On 1/4/2025 8:45 PM, Jiang Liu wrote:
If some GPU device failed to probe, `rmmod amdgpu` will trigger a use
after free bug related to amdgpu_driver_release_kms() as:
2024-12-26 16:17:45 [16002.085540] BUG: kernel NULL pointer dereference,
address:
2024-12-26 16:17:45 [16002.093
On 1/4/2025 8:45 PM, Jiang Liu wrote:
Function detects initialization status by checking sched->ops, so set
sched->ops to non-NULL just before return in function drm_sched_init()
This commit message is not what the change did: you set sched->ops to
NULL just after return from drm_sched_init.
On 2025-01-07 10:50, Chen, Xiaogang
wrote:
On 1/6/2025 8:02 PM, Deng, Emily
wrote:
[AMD Official Use Only - AMD Internal
Distribution Only]
On 2025-01-07 09:53, Christian König wrote:
We sometimes have people trying to use debugging options in production
environments.
Mark options only meant to be used for debugging as unsafe so that the
kernel is tainted when they are used.
Signed-off-by: Christian König
Acked-by: Felix Kuehl
On 1/7/2025 2:44 PM, Philip Yang wrote:
On 2025-01-07 10:50, Chen, Xiaogang wrote:
On 1/6/2025 8:02 PM, Deng, Emily wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
*From:*Chen, Xiaogang
*Sent:* Monday, January 6, 2025 11:27 PM
*To:* Deng, Emily ; amd-gfx@lists.freedeskt
[AMD Official Use Only - AMD Internal Distribution Only]
Ping..
-Original Message-
From: Victor Zhao
Sent: Monday, January 6, 2025 6:52 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhao, Victor
Subject: [PATCH] drm/amdgpu: fill the ucode bo during psp resume for SRIOV
refill the ucode bo d
On Tue, 17 Dec 2024 13:06:52 -0300 Vignesh Raman wrote ---
> Uprev IGT to the latest version and update expectation files.
>
> Signed-off-by: Vignesh Raman vignesh.ra...@collabora.com>
Applied to drm-ci misc.
Thanks
Helen
> ---
>
> v1:
> - Pipeline link -
> https://
> 2025年1月6日 14:51,Lazar, Lijo 写道:
>
>
>
> On 1/5/2025 8:15 AM, Jiang Liu wrote:
>> Introduce new interface amdgpu_xcp_drm_dev_free() to free a specific
>> drm_device crreated by amdgpu_xcp_drm_dev_alloc(), which will be used
>> to do error recovery.
>>
>> Signed-off-by: Jiang Liu
>> ---
>>
在 2025/1/3 16:21, Koenig, Christian 写道:
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Shuai,
setting gpu_recovery=0 is not even remotely related to RAS. If that option
affects RAS behavior in any way then that is a bug.
The purpose of setting gpu_recovery=0 is to disable rese
Am 06.01.25 um 13:09 schrieb Simona Vetter:
On Fri, Jan 03, 2025 at 08:21:43AM +, Koenig, Christian wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Shuai,
setting gpu_recovery=0 is not even remotely related to RAS. If that
option affects RAS behavior in any way then that
Am 07.01.25 um 08:06 schrieb Shuai Xue:
在 2025/1/3 16:21, Koenig, Christian 写道:
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Shuai,
setting gpu_recovery=0 is not even remotely related to RAS. If that
option affects RAS behavior in any way then that is a bug.
The purpose of
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Felix,
You are right, it is easily to hit deadlock, don't know why LOCKDEP doesn't
catch this. Need to find another solution.
Hi Philip,
Do you have a solution for this delay free pt?
Emily Deng
Best Wishes
>-Original Mes
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Philip,
It still has the deadlock, maybe the best way is trying to remove the delayed
free pt work.
[Wed Jan 8 10:35:44 2025 <0.00>] INFO: task kfdtest:5827 blocked for
more than 122 seconds.
[Wed Jan 8 10:35:44 2025 <0.00
set the workload based on MALL status
Signed-off-by: Kenneth Feng
---
.../drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
b/drivers/gpu/drm/amd/display/amdgp
add the interface to set and save the bootup workload type
v2: add is_support_sw_smu check and pm mutex lock.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 39 +++
drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 3 ++
drivers/gpu/drm/amd/pm/swsm
On 1/8/2025 12:17 PM, Kenneth Feng wrote:
> add the interface to set and save the bootup workload type
> v2: add is_support_sw_smu check and pm mutex lock.
> v3: return before the scoreboard is set.
>
> Signed-off-by: Kenneth Feng
> ---
> drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 44 +++
[AMD Official Use Only - AMD Internal Distribution Only]
From: Yang, Philip
Sent: Tuesday, January 7, 2025 11:19 PM
To: Deng, Emily ; Kuehling, Felix ;
amd-gfx@lists.freedesktop.org; Yang, Philip ; Koenig,
Christian
Subject: Re: [PATCH v2] drm/amdgpu: Fix the looply call svm_range_restore_pa
[AMD Official Use Only - AMD Internal Distribution Only]
From: Yang, Philip
Sent: Tuesday, January 7, 2025 10:04 PM
To: Deng, Emily ; Yang, Philip ;
amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdkfd: Fix partial migrate issue
On 2025-01-06 21:31, Deng, Emily wrote:
[AMD Officia
[AMD Official Use Only - AMD Internal Distribution Only]
-Original Message-
From: amd-gfx On Behalf Of Kenneth Feng
Sent: Wednesday, January 8, 2025 11:36
To: amd-gfx@lists.freedesktop.org
Cc: Pillai, Aurabindo ; Deucher, Alexander
; Feng, Kenneth
Subject: [PATCH v2 1/2] drm/amd/pm: add
add the interface to set and save the bootup workload type
v2: add is_support_sw_smu check and pm mutex lock.
v3: return before the scoreboard is set.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 44 +++
drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
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