On 12/4/2024 10:15 PM, Alex Deucher wrote:
> On Wed, Dec 4, 2024 at 11:18 AM Lazar, Lijo wrote:
>>
>>
>>
>> On 12/4/2024 9:30 PM, Alex Deucher wrote:
>>> On Wed, Dec 4, 2024 at 10:56 AM Lazar, Lijo wrote:
On 12/4/2024 7:51 PM, Alex Deucher wrote:
> On Wed, Dec 4, 2024 a
On 12/4/2024 21:59, Lazar, Lijo wrote:
On 12/4/2024 10:15 PM, Alex Deucher wrote:
On Wed, Dec 4, 2024 at 11:18 AM Lazar, Lijo wrote:
On 12/4/2024 9:30 PM, Alex Deucher wrote:
On Wed, Dec 4, 2024 at 10:56 AM Lazar, Lijo wrote:
On 12/4/2024 7:51 PM, Alex Deucher wrote:
On Wed, Dec 4,
Instead of checking umc ras supported.
Signed-off-by: Candice Li
---
drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
index 621769255ffac2..37c4644f5ebc36
Add psp v14_0_3 ras support.
Signed-off-by: Candice Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 1de934cd5764fa..02662eec6776f2 100644
--- a/drivers/gpu/
On 12/5/2024 9:36 AM, Mario Limonciello wrote:
> On 12/4/2024 21:59, Lazar, Lijo wrote:
>>
>>
>> On 12/4/2024 10:15 PM, Alex Deucher wrote:
>>> On Wed, Dec 4, 2024 at 11:18 AM Lazar, Lijo wrote:
On 12/4/2024 9:30 PM, Alex Deucher wrote:
> On Wed, Dec 4, 2024 at 10:56 AM
[AMD Official Use Only - AMD Internal Distribution Only]
Series is
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: Kenneth Feng
Sent: Wednesday, December 4, 2024 4:32 PM
To: amd-gfx@lists.freedesktop.org
Cc: Wang, Yang(Kevin) ; Lazar, Lijo
; Feng, Kenneth
Subject:
Hi Julia,
sorry I totally missed your mail.
The basic problem for P2P is what I already described in my previous mail:
Well the problem is the virtualized environment. pci_p2pdma_distance()
checks if two physical PCI devices can communicate with each other
(and returns how many hops are in be
+ misc maintainers
On Tue, Dec 03, 2024 at 11:18:00AM +0100, Christian König wrote:
> Am 03.12.24 um 06:00 schrieb Raag Jadav:
> > On Mon, Dec 02, 2024 at 10:07:59AM +0200, Raag Jadav wrote:
> > > On Fri, Nov 29, 2024 at 10:40:14AM -0300, André Almeida wrote:
> > > > Hi Raag,
> > > >
> > > > Em 2
On Wed, Dec 4, 2024 at 12:47 AM Lazar, Lijo wrote:
>
>
>
> On 12/4/2024 10:44 AM, Mario Limonciello wrote:
> >
> >>> +enum amdgpu_ucode_required {
> >>> +AMDGPU_UCODE_NOT_REQUIRED,
> >>> +AMDGPU_UCODE_REQUIRED,
> >>
> >> Couldn't this be handled in another API instead of having to flag eve
From: Hawking Zhang
Add psp v13_0_12 firmware specifiers for sos and ta
Signed-off-by: Hawking Zhang
Reviewed-by: Shiwu Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
b
From: Le Ma
Add support for new psp 13_0_12 version
Signed-off-by: Le Ma
Reviewed-by: Lijo Lazar
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 +++
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c| 3 +++
From: Hawking Zhang
Enable RAS Cap check and initialize RAS funcs
for psp v13_0_12
Signed-off-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 5 +
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c | 1 +
2 files changed, 6 insertion
From: Hawking Zhang
spdm_drv is a firmware that needs to be loaded
in driver initialization phase.
Signed-off-by: Hawking Zhang
Reviewed-by: Lijo Lazar
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 15 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h |
From: Asad Kamal
Add support to fetch refclock value for SMU v13.0.12
Signed-off-by: Asad Kamal
Reviewed-by: Lijo Lazar
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
b/drivers/gpu/drm
From: Asad Kamal
Add support for new smu 13_0_12 version
v2: Updated subject & moved skipping p2s init to a separate patch
Signed-off-by: Asad Kamal
Reviewed-by: Lijo Lazar
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 1 +
1 file changed, 1 insertion(+)
diff
From: Asad Kamal
Add mode2 reset support for smu version 13.0.12
Signed-off-by: Asad Kamal
Reviewed-by: Lijo Lazar
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c | 2 ++
drivers/gpu/drm/amd/amdgpu/soc15.c| 1 +
2 files changed, 3 insertions(+)
diff --git a
From: Shiwu Zhang
Enable xgmi for gfx v9_5_0
Reviewed-by: Hawking Zhang
Signed-off-by: Shiwu Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/drivers/gpu/
From: Hawking Zhang
reuse mmhub v1_8 ras functuion
Signed-off-by: Hawking Zhang
Reviewed-by: Asad Kamal
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/drivers/gpu/drm/amd/amdgp
On Fri, Nov 29, 2024 at 8:59 AM Srinivasan Shanmugam
wrote:
>
> This update adds explainations to key functions related to process
explanations
> isolation and cleaner shader execution sysfs interfaces.
>
> - `amdgpu_gfx_set_run_cleaner_shader`: Describes how to run the cleaner
> shader via th
On 12/4/2024 7:51 PM, Alex Deucher wrote:
> On Wed, Dec 4, 2024 at 12:47 AM Lazar, Lijo wrote:
>>
>>
>>
>> On 12/4/2024 10:44 AM, Mario Limonciello wrote:
>>>
> +enum amdgpu_ucode_required {
> +AMDGPU_UCODE_NOT_REQUIRED,
> +AMDGPU_UCODE_REQUIRED,
Couldn't this be h
On Wed, Dec 4, 2024 at 10:56 AM Lazar, Lijo wrote:
>
>
>
> On 12/4/2024 7:51 PM, Alex Deucher wrote:
> > On Wed, Dec 4, 2024 at 12:47 AM Lazar, Lijo wrote:
> >>
> >>
> >>
> >> On 12/4/2024 10:44 AM, Mario Limonciello wrote:
> >>>
> > +enum amdgpu_ucode_required {
> > +AMDGPU_UCODE_NOT
On Mon, Dec 2, 2024 at 11:42 AM Srinivasan Shanmugam
wrote:
>
> This update adds explanations to key functions that manage how the
> Kernel Fusion Driver (KFD) and Kernel Graphics Driver (KGD) share the
> GPU.
>
> amdgpu_gfx_enforce_isolation_wait_for_kfd: Controls the waiting period
> for KFD to
On 12/4/2024 10:00, Alex Deucher wrote:
On Wed, Dec 4, 2024 at 10:56 AM Lazar, Lijo wrote:
On 12/4/2024 7:51 PM, Alex Deucher wrote:
On Wed, Dec 4, 2024 at 12:47 AM Lazar, Lijo wrote:
On 12/4/2024 10:44 AM, Mario Limonciello wrote:
+enum amdgpu_ucode_required {
+AMDGPU_UCODE_NOT
On 12/4/2024 9:30 PM, Alex Deucher wrote:
> On Wed, Dec 4, 2024 at 10:56 AM Lazar, Lijo wrote:
>>
>>
>>
>> On 12/4/2024 7:51 PM, Alex Deucher wrote:
>>> On Wed, Dec 4, 2024 at 12:47 AM Lazar, Lijo wrote:
On 12/4/2024 10:44 AM, Mario Limonciello wrote:
>
>>> +enum am
On Wed, Dec 4, 2024 at 11:18 AM Lazar, Lijo wrote:
>
>
>
> On 12/4/2024 9:30 PM, Alex Deucher wrote:
> > On Wed, Dec 4, 2024 at 10:56 AM Lazar, Lijo wrote:
> >>
> >>
> >>
> >> On 12/4/2024 7:51 PM, Alex Deucher wrote:
> >>> On Wed, Dec 4, 2024 at 12:47 AM Lazar, Lijo wrote:
>
>
>
A variety of the 3DLUT handling functions check
`debug.enable_mem_low_power.bits.cm` both in the caller and function.
For each of them reduce to just checking just in caller or function.
Signed-off-by: Mario Limonciello
---
.../drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c | 31 ---
DC driver is using two different values to define the maximum number of
surfaces: MAX_SURFACES and MAX_SURFACE_NUM. Consolidate MAX_SURFACES as
the unique definition for surface updates across DC.
It fixes page fault faced by Cosmic users on AMD display versions that
support two overlay planes, si
As the hw supports up to 4 surfaces, increase the maximum number of
surfaces to prevent the DC error when trying to use more than three
planes.
[drm:dc_state_add_plane [amdgpu]] *ERROR* Surface: can not attach plane_state
3e2cb82c! Maximum is: 3
Link: https://gitlab.freedesktop.org/drm/a
[Resending due to temporary mailing list server error on
gabe.freedesktop.org - trying again to reach dri-devel and amd-gfx]
Hi,
This is another attempt to approach page fault error faced by Cosmic
users of AMD display hw that exposes two overlay planes. It was first
reported as an interface fre
On Wed, Dec 04, 2024 at 04:31:12PM +0200, Jani Nikula wrote:
> We stopped using the driver initialized date in commit 7fb8af6798e8
> ("drm: deprecate driver date") and (eventually) started returning "0"
> for drm_version ioctl instead.
>
> Finish the job, and remove the unused date member from str
On 12/3/2024 5:58 AM, Dmitry Baryshkov wrote:
On Mon, Dec 02, 2024 at 07:27:45PM -0800, Abhinav Kumar wrote:
On 11/30/2024 3:55 PM, Dmitry Baryshkov wrote:
Reading access to connector->eld can happen at the same time the
drm_edid_to_eld() updates the data. Take the newly added eld_mutex in
From: Xiang Liu
[ Upstream commit 928cd772e18ffbd7723cb2361db4a8ccf235 ]
It is not necessarily corrupted. When there is RAS fatal error, device
memory access is blocked. Hence vcpu bo cannot be saved to system memory
as in a regular suspend sequence before going for reset. In other full
devi
From: Xiang Liu
[ Upstream commit 928cd772e18ffbd7723cb2361db4a8ccf235 ]
It is not necessarily corrupted. When there is RAS fatal error, device
memory access is blocked. Hence vcpu bo cannot be saved to system memory
as in a regular suspend sequence before going for reset. In other full
devi
base.sched may not be set for each instance and should not
be used for cases such as non-IB tests.
Signed-off-by: David (Ming Qiang) Wu
---
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
b/drivers/g
From: Xiang Liu
[ Upstream commit 928cd772e18ffbd7723cb2361db4a8ccf235 ]
It is not necessarily corrupted. When there is RAS fatal error, device
memory access is blocked. Hence vcpu bo cannot be saved to system memory
as in a regular suspend sequence before going for reset. In other full
devi
On 2024-12-04 18:36, Felix Kuehling wrote:
On 2024-12-03 09:30, Yunxiang Li wrote:
When using MES creating a pdd will require talking to the GPU to setup
the relevant context. The code here forgot to wake up the GPU in case it
was in suspend, this causes KVM to EFAULT for passthrough GPU for
On 2024-12-03 09:30, Yunxiang Li wrote:
When using MES creating a pdd will require talking to the GPU to setup
the relevant context. The code here forgot to wake up the GPU in case it
was in suspend, this causes KVM to EFAULT for passthrough GPU for
example. This issue can be masked if the GPU
From: Lijo Lazar
Refactor such that individual SMU IP versions can choose the startup
power profile mode. If no preference, then use the generic default power
profile selection logic.
Signed-off-by: Lijo Lazar
---
.../gpu/drm/amd/include/kgd_pp_interface.h| 1 +
drivers/gpu/drm/amd/pm/sws
On 28/11/2024 18:54, Yunxiang Li wrote:
Before, every time fdinfo is queried we try to lock all the BOs in the
VM and calculate memory usage from scratch. This works okay if the
fdinfo is rarely read and the VMs don't have a ton of BOs. If either of
these conditions is not true, we get a massiv
On středa 13. listopadu 2024 14:48:38, středoevropský standardní čas Tvrtko
Ursulin wrote:
> From: Tvrtko Ursulin
>
> As commit 746ae46c1113 ("drm/sched: Mark scheduler work queues with
> WQ_MEM_RECLAIM")
> points out, ever since
> a6149f039369 ("drm/sched: Convert drm scheduler to use a work q
On 03/12/2024 15:03, Li, Yunxiang (Teddy) wrote:
[Public]
From: Tvrtko Ursulin
Sent: Tuesday, December 3, 2024 9:42
On 28/11/2024 18:54, Yunxiang Li wrote:
Before, every time fdinfo is queried we try to lock all the BOs in the
VM and calculate memory usage from scratch. This works okay if t
On 28/11/2024 18:54, Yunxiang Li wrote:
Define how to handle buffers with multiple possible placement so we
don't get incompatible implementations. Callout the resident requirement
for drm-purgeable- explicitly. Remove the confusing requirement for
there to be only drm-memory- or only drm-resid
On 28/11/2024 18:54, Yunxiang Li wrote:
When memory stats is generated fresh everytime by going though all the
BOs, their active information is quite easy to get. But if the stats are
tracked with BO's state this becomes harder since the job scheduling
part doesn't really deal with individual b
Set the default workload type to bootup type on smu v13.0.7.
This is because of the constraint on smu v13.0.7.
Gfx activity has an even higher set point on 3D fullscreen
mode than the one on bootup mode. This causes the 3D fullscreen
mode's performance is worse than the bootup mode's performance
fo
On 2024-12-04 02:42, Prike Liang wrote:
The SVM DMA device map direction should be set the same as
the DMA unmap setting, otherwise the DMA core will report
the following warning.
Before finialize this solution, there're some discussion on
the DMA mapping type(stream-based or coherent) in this
On 2024-12-03 09:30, Russell, Kent wrote:
[Public]
*From:* amd-gfx on behalf of
Andrew Martin
*Sent:* Monday, December 2, 2024 7:45:55 a.m.
*To:* amd-gfx@lists.freedesktop.org
*Cc:* Kuehling, Felix ; Tudor, Alexa
Am 04.12.24 um 15:31 schrieb Jani Nikula:
We stopped using the driver initialized date in commit 7fb8af6798e8
("drm: deprecate driver date") and (eventually) started returning "0"
for drm_version ioctl instead.
Finish the job, and remove the unused date member from struct
drm_driver, its ini
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