[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Lazar, Lijo
Sent: Friday, November 29, 2024 10:54
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Deucher, Alexander
Subject: [PATCH] drm/amdgpu: Simpli
Hi all,
Sorry for my late reply. I don't know if you still remember this thread, let me
give a quick summary:
1. We want to implement the dGPU prime feature in guest VM. But we
encountered this issue: virtio-gpu doesn’t have ->get_sg_table implemented
which is required by drm_gem_map_attach
Add the correct fences count variable [num_fences] in the fences
array iteration to handle the userq / non-userq fences.
v2:(Christian)
- All fences in the array either come from some reservation object
or drm_syncobj. If any of those are NULL then there is a bug
somewhere else.
Signed-
Add mqd support for userq compute queue.
Signed-off-by: Arunpravin Paneer Selvam
---
drivers/gpu/drm/amd/amdgpu/mes_v11_0_userqueue.c | 13 ++---
drivers/gpu/drm/amd/include/v11_structs.h| 4 ++--
2 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/am
Fix out-of-bounds issue in userq fence create when
accessing the userq xa structure. Added a lock to
protect the race condition.
BUG: KASAN: slab-out-of-bounds in amdgpu_userq_fence_create+0x726/0x880 [amdgpu]
[ +0.06] Call Trace:
[ +0.05]
[ +0.05] dump_stack_lvl+0x6c/0x90
[ +0.
The xarray pointer which has the userqueue xarray structure
reference should be cleared when the userqueue gets
destroyed. Otherwise, we may access the freed xa memory and
see the below warnings.
warning 1:
BUG: KASAN: slab-use-after-free in _raw_spin_lock+0x7a/0xe0
[ +0.44] Call Trace:
[ +0
Make spelling and punctuation changes to ease reading of the comments.
Signed-off-by: Randy Dunlap
Cc: Alex Deucher
Cc: Christian König
Cc: Xinhui Pan
Cc: amd-gfx@lists.freedesktop.org
Cc: David Airlie
Cc: Simona Vetter
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 30 +
Add MEC version from which alternate support for no PCIe atomics
is provided so that device is not skipped during KFD device init in
GFX1200/GFX1201.
Signed-off-by: Sreekant Somasekharan
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gp
[Public]
Reviewed-by: Harish Kasiviswanathan
-Original Message-
From: amd-gfx On Behalf Of Sreekant
Somasekharan
Sent: Thursday, November 28, 2024 5:20 PM
To: amd-gfx@lists.freedesktop.org
Cc: Somasekharan, Sreekant
Subject: [PATCH v2] drm/amdkfd: add MEC version that supports no PCI
On 2024-11-27 22:45, Lazar, Lijo wrote:
>
>
> On 11/28/2024 5:43 AM, Felix Kuehling wrote:
>>
>> On 2024-11-18 00:34, Lijo Lazar wrote:
>>> Write pointer could be 32-bit or 64-bit. Use the correct size during
>>> initialization.
>>>
>>> Signed-off-by: Lijo Lazar
>>> ---
>>> drivers/gpu/drm/
From: Peterson
[WHY]
When using a sw cursor and flip immediate, the plane that is flipping
immediately will do partial updates causing tearing.
When on certain displays, subvp is expected based on
timings but should be disabled in specific use cases that are not
accounted for.
[HOW]
This was fix
On 11/28/2024 8:12 PM, Felix Kuehling wrote:
>
>
> On 2024-11-27 22:45, Lazar, Lijo wrote:
>>
>>
>> On 11/28/2024 5:43 AM, Felix Kuehling wrote:
>>>
>>> On 2024-11-18 00:34, Lijo Lazar wrote:
Write pointer could be 32-bit or 64-bit. Use the correct size during
initialization.
>>
On 2024-11-28 11:26, Andrew Martin wrote:
> In the function pqm_uninit there is a call-assignment of "pdd =
> kfd_get_process_device_data" which could be null, and this value was
> later dereferenced without checking.
>
> Signed-off-by: Andrew Martin
This seems to fix a bug introduced by a pre
[Public]
>-Original Message-
>From: amd-gfx On Behalf Of Jinzhou Su
>Sent: Thursday, November 28, 2024 11:31 AM
>To: amd-gfx@lists.freedesktop.org
>Cc: Zhang, Hawking ; Lin, Wayne
>; Strauss, Andrew ; Su, Joe
>; Lin, Wayne
>Subject: [PATCH] drm/amdgpu: Add secure display v2 command
>
>Ad
Add secure display v2 command to support multiple ROI instances per
display.
v2: fix typo and coding style issue
Signed-off-by: Wayne Lin
Signed-off-by: Jinzhou Su
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 ++-
.../gpu/drm/amd/amdgpu/ta_secureDisplay_if.h | 25 +--
Thanks for the feedback, the problem is anyway real breaking userspace apps
if my patch is not in use. I have actually spend this day for investigating
and testing another gpu hang bug that has been reported originally by
others on gfx1010/AMD RX 5700. I thought originally that the bug is
different
FRU info is expected to be non-NULL if FRU sys files are created.
Simplify the check.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c
b/drivers/gpu/drm
[AMD Official Use Only - AMD Internal Distribution Only]
>-Original Message-
>From: amd-gfx On Behalf Of Jinzhou Su
>Sent: Friday, November 29, 2024 10:30 AM
>To: amd-gfx@lists.freedesktop.org
>Cc: Zhang, Hawking ; Lin, Wayne
>; Strauss, Andrew ; Yu, Lang
>; Su, Joe ; Lin, Wayne
>
>Subjec
From: Alex Deucher
Split resume into a 3rd step to handle displays when DCC is
enabled on DCN 4.0.1. Move display after the buffer funcs
have been re-enabled so that the GPU will do the move and
properly set the DCC metadata for DCN.
Signed-off-by: Alex Deucher
Ack-by: Fangzhi Zuo
---
driver
From: Cruise
Move DP tunneling field DPCD reading after all other RX caps are read.
Reviewed-by: Wenjing Liu
Signed-off-by: Cruise
Signed-off-by: Fangzhi Zuo
---
.../dc/link/protocols/link_dp_capability.c| 21 +--
1 file changed, 10 insertions(+), 11 deletions(-)
diff --
From: Samson Tam
[Why & How]
v and h tap calculations slightly different
Use h tap calculation for both v and h tap
Reviewed-by: Navid Assadian
Signed-off-by: Samson Tam
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/spl/dc_spl.c | 8
1 file changed, 4 insertions(+),
From: Ausef Yousof
[WHY]
Soft hang/lag observed during 10bit playback + moving cursor, corruption
observed in other tickets for same reason, also failing MPO.
1. Currently, we are always running
calculate_lowest_supported_state_for_temp_read which is only
necessary on dGPU
2. Fast validat
From: Aric Cyr
DC 3.2.312 contains some improvements as summarized below:
* Fix dcn351 clk table
* Bug fix on IP2, reply, DP tunneling
Reviewed-by: Fangzhi Zuo
Signed-off-by: Aric Cyr
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1
This DC patchset brings improvements in multiple areas. In summary, we have:
* Fix dcn351 clk table
* Bug fix on IP2, reply, DP tunneling
Cc: Daniel Wheeler
Alex Deucher (1):
drm/amdgpu: rework resume handling for display
Aric Cyr (1):
drm/amd/display: 3.2.312
Ausef Yousof (1):
drm/amd/d
From: Dennis Chan
[why]
Revised Replay Full screen video Pseudo vblank control.
Reviewed-by: ChunTao Tso
Signed-off-by: Dennis Chan
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/dc_types.h | 4 ++--
drivers/gpu/drm/amd/display/modules/power/power_helpers.c | 4
From: Nicholas Kazlauskas
[Why]
The existing changes to the DPMS off flag should help reduce
accidental entry, but this change further restricts the entry condition.
[How]
Record last power state as sent to DMUB.
Don't send IPS2 allow if it's D0.
Reviewed-by: Ovidiu Bunea
Signed-off-by: Nichol
From: Charlene Liu
[why]
driver got wrong clock table due to miss match dtm_table headers.
correct the dtn_clock table based on pmfw header.
Reviewed-by: Alvin Lee
Reviewed-by: Sung joon Kim
Signed-off-by: Charlene Liu
Signed-off-by: Fangzhi Zuo
---
.../display/dc/clk_mgr/dcn35/dcn35_clk_mg
This information is not available in ip discovery table.
Signed-off-by: Harish Kasiviswanathan
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
b/drivers/gpu/drm/amd/amdkfd
Signed-off-by: Harish Kasiviswanathan
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
index 3ca95f54601e..e0faec4682f3 100644
--- a/drivers/gpu/drm/amd/amdk
On 2024-11-27 22:22, Mario Limonciello wrote:
> From: Mario Limonciello
>
> commit 38077562e0594 ("drm/amd/display: Implement new
> backlight_level_params structure") adjusted DC core to require
> the backlight type to be programmed in the dc link when changing
> brightness. This isn't initia
On 2024-11-27 22:25, Mario Limonciello wrote:
> From: Mario Limonciello
>
> An HP Pavilion Aero Laptop 13-be0xxx/8916 has an ACPI EDID, but using
> it is causing corruption. It's got illogical values of not specifying
> a digital interface. Sanity check the ACPI EDID to avoid tripping such
> prob
On 2024-11-28 10:21, Lazar, Lijo wrote:
>
>
> On 11/28/2024 8:12 PM, Felix Kuehling wrote:
>>
>>
>> On 2024-11-27 22:45, Lazar, Lijo wrote:
>>>
>>>
>>> On 11/28/2024 5:43 AM, Felix Kuehling wrote:
On 2024-11-18 00:34, Lijo Lazar wrote:
> Write pointer could be 32-bit or 64-bit. Us
In the function pqm_uninit there is a call-assignment of "pdd =
kfd_get_process_device_data" which could be null, and this value was
later dereferenced without checking.
Signed-off-by: Andrew Martin
---
.../drm/amd/amdkfd/kfd_process_queue_manager.c | 16
1 file changed, 12 in
When memory stats is generated fresh everytime by going though all the
BOs, their active information is quite easy to get. But if the stats are
tracked with BO's state this becomes harder since the job scheduling
part doesn't really deal with individual buffers.
Make drm-active- optional to enable
Add a helper to check if the memory stats is zero, this will be used to
check for memory accounting errors.
Signed-off-by: Yunxiang Li
Reviewed-by: Christian König
CC: dri-de...@lists.freedesktop.org
---
drivers/gpu/drm/drm_file.c | 10 ++
include/drm/drm_file.h | 1 +
2 files chan
amdgpu_vm_bo_invalidate doesn't use the adev parameter and not all
callers have a reference to adev handy, so remove it for cleanliness.
Signed-off-by: Yunxiang Li
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
Before, every time fdinfo is queried we try to lock all the BOs in the
VM and calculate memory usage from scratch. This works okay if the
fdinfo is rarely read and the VMs don't have a ton of BOs. If either of
these conditions is not true, we get a massive performance hit.
In this new revision, we
Define how to handle buffers with multiple possible placement so we
don't get incompatible implementations. Callout the resident requirement
for drm-purgeable- explicitly. Remove the confusing requirement for
there to be only drm-memory- or only drm-resident-, and clarify that
drm-memory- is legacy
Right now every time the fdinfo is read, we go through the vm lists and
lock all the BOs to calcuate the statistics. This causes a lot of lock
contention when the VM is actively used. It gets worse if there is a lot
of shared BOs or if there's a lot of submissions. We have seen
submissions lock-up
Add MEC version from which alternate support for no PCIe atomics
is provided so that device is not skipped during KFD device init in
GFX1200/GFX1201.
Signed-off-by: Sreekant Somasekharan
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/d
On 2024-11-25 10:39, Xiaogang.Chen wrote:
From: Xiaogang Chen
Current kfd driver has its own PASID value for a kfd process and uses it to
locate vm at interrupt handler or mapping between kfd process and vm. That
design is not working when a physical gpu device has multiple spatial
partitions
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: David Belanger
> -Original Message-
> From: amd-gfx On Behalf Of Sreekant
> Somasekharan
> Sent: Thursday, November 28, 2024 1:20 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Somasekharan, Sreekant
> Subject: [PATCH]
[Public]
-Original Message-
From: amd-gfx On Behalf Of Sreekant
Somasekharan
Sent: Thursday, November 28, 2024 1:20 PM
To: amd-gfx@lists.freedesktop.org
Cc: Somasekharan, Sreekant
Subject: [PATCH] drm/amdkfd: add MEC version that supports no PCIe atomics for
GFX12
Add MEC version from
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