Add helper rdev_to_drm(rdev), similar to amdgpu, most function should
access the "drm_device" with "rdev_to_drm(rdev)" instead, where amdgpu has
"adev_to_drm(adev)". It also makes changing from "*drm_device" to "drm_device"
in "radeon_devicce" later on easier.
Signed-off-by: Wu Hoi Pok
---
drive
.load and drm_dev_alloc are deprecated. These patch series aims to
remove them.
v3: Both v1 and v2 sucks. v3 improves greatly on readability.
Wu Hoi Pok (6):
drm/radeon: change variable name "dev" to "ddev" for consistency
drm/radeon: remove load callback from kms_driver
drm/radeon: use var
In the probe function of amdgpu, it uses "ddev" as the name of "struct
drm_device *",
so I suggest renaming it to be consistent.
Signed-off-by: Wu Hoi Pok
---
drivers/gpu/drm/radeon/radeon_drv.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm
The ".load" callback in "struct drm_driver" is deprecated. In order to remove
the callback, we have to manually call "radeon_driver_load_kms" instead.
Signed-off-by: Wu Hoi Pok
---
drivers/gpu/drm/radeon/radeon_drv.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers
The return value from the call to dml21_find_dc_pipes_for_plane() is int.
However, the return value is being assigned to an unsigned int variable
'num_pipes', the condition if(num_pipes <= 0) is not rigorous enough,
so making 'num_pipes' an int.
./drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wr
"drm_dev_alloc" is deprecated, in order to use the newer "devm_drm_dev_alloc",
the "drm_device" is stored inside "radeon_device", by changing
"rdev_to_drm(rdev)"
other functions still gain access to the member "drm_device". Also,
"devm_drm_dev_alloc"
is now allocating "radeon_device", allocation
This patch changes the way "drm_device" is accessed. It uses "rdev_to_drm(rdev)"
instead of accessing the struct member directly.
Signed-off-by: Wu Hoi Pok
---
drivers/gpu/drm/radeon/atombios_encoders.c | 2 +-
drivers/gpu/drm/radeon/cik.c | 14 ++--
drivers/gpu/drm/radeon/dce6_af
Dear Thmoas,
Thanks a lot for the feedback.
I admit that my patch was a mess, sorry about that.
I have submitted a v3 to change a lot of stuff, these patches should
be able to be built now.
I also improve readability, where each patch does their own stuff.
Best regards,
Wu
On Wed, Jun 26, 2024
Dear AMD GPU Kernel Maintainers,
I am writing to report an issue with high power consumption of my AMD
RX6800xt graphics card when a secondary monitor is connected.
Upon investigation, I observed that my desktop computer generates more
heat while idling. I determined that the high power consumpti
On 6/23/24 01:51, Thomas Weißschuh wrote:
Panels using a PWM-controlled backlight source without an do not have a
standard way to communicate their valid PWM ranges.
On x86 the ranges are read from ACPI through driver-specific tables.
The built-in ranges are not necessarily correct, or may grow s
[AMD Official Use Only - AMD Internal Distribution Only]
OK
-
Best Regards,
Thomas
-Original Message-
From: Yang, Stanley
Sent: Monday, July 1, 2024 2:41 PM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Zhou1, Tao ; Li,
Candice ; Wang, Yang(Kevi
Sysfs node disable query error count during gpu reset.
Signed-off-by: YiPeng Chai
---
drivers/gpu/drm/amd/amdgpu/aldebaran.c | 2 --
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c| 3 +++
3 files changed, 5 insertions(+), 3 deletions(-)
diff
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Stanley.Yang
Regards,
Stanley
> -Original Message-
> From: Chai, Thomas
> Sent: Monday, July 1, 2024 4:11 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking ; Zhou1, Tao
> ; Li, Candice ; Wang, Yang(Kevin)
>
This patch enables following UMD stable Pstates profile
levels for power_dpm_force_performance_level interface.
- profile_peak
- profile_min_mclk
- profile_min_sclk
- profile_standard
Signed-off-by: Li Ma
---
.../drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c | 150 --
1 file changed
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Li,
> -Original Message-
> From: Ma, Li
> Sent: Monday, July 1, 2024 4:23 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Zhang, Yifan
> ; Huang, Tim ; Ma, Li
>
> Subject: [PATCH] drm/amd/swsmu: enable more Ps
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Tim,
> -Original Message-
> From: Huang, Tim
> Sent: Monday, July 1, 2024 5:34 PM
> To: Ma, Li ; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Zhang, Yifan
>
> Subject: RE: [PATCH] drm/amd/swsmu: enable more Pstates
On 01.07.24 10:10, YiPeng Chai wrote:
Sysfs node disable query error count during gpu reset.
Can you elaborate a bit more? Usually the body shouldn't be a 1:1 copy
of the summary phrase.
Signed-off-by: YiPeng Chai
---
drivers/gpu/drm/amd/amdgpu/aldebaran.c | 2 --
drivers/gpu/drm/amd
This patch enables following UMD stable Pstates profile
levels for power_dpm_force_performance_level interface.
- profile_peak
- profile_min_mclk
- profile_min_sclk
- profile_standard
Signed-off-by: Li Ma
---
.../drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c | 138 +-
1 file changed
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Li,
> -Original Message-
> From: Ma, Li
> Sent: Monday, July 1, 2024 6:44 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Zhang, Yifan
> ; Huang, Tim ; Ma, Li
>
> Subject: [PATCH v2] drm/amd/swsmu: enable more
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Tim,
> -Original Message-
> From: Huang, Tim
> Sent: Monday, July 1, 2024 7:32 PM
> To: Ma, Li ; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Zhang, Yifan
>
> Subject: RE: [PATCH v2] drm/amd/swsmu: enable more Pstat
Avoid pointer type value compared with 0 to make code clear.
./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_factory.c:31:12-13:
WARNING comparing pointer to 0.
Reported-by: Abaci Robot
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9458
Signed-off-by: Jiapeng Chong
-
Avoid pointer type value compared with 0 to make code clear.
./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_mcg/dml2_mcg_factory.c:19:12-13:
WARNING comparing pointer to 0.
Reported-by: Abaci Robot
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9458
Signed-off-by: Jiapeng Chong
-
Avoid pointer type value compared with 0 to make code clear.
./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_factory.c:14:12-13:
WARNING comparing pointer to 0.
Reported-by: Abaci Robot
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9458
Signed-off-by: Jiapeng Chong
Avoid pointer type value compared with 0 to make code clear.
./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_factory.c:24:12-13:
WARNING comparing pointer to 0.
Reported-by: Abaci Robot
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9458
Signed-off-by: Jiapeng Chong
On Mon, Jul 1, 2024 at 3:25 AM Jaroslav Pulchart
wrote:
>
> Dear AMD GPU Kernel Maintainers,
>
> I am writing to report an issue with high power consumption of my AMD
> RX6800xt graphics card when a secondary monitor is connected.
>
> Upon investigation, I observed that my desktop computer generat
On Sun, Jun 30, 2024 at 8:40 AM Jeff Layton wrote:
>
> I've been testing some vfs patches (multigrain timestamps) on my
> personal desktop with a 6.10.0-rc5-ish kernel, and have hit a number of
> warnings in the amdgpu driver, including a UBSAN warning that looks
> like a potential array overrun:
This is a variably sized array.
Link: https://lists.freedesktop.org/archives/amd-gfx/2024-June/110420.html
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/include/atomfirmware.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/include/atomfirmware.h
b/
From: Christian König
This reverts commit 8ee3a52e3f35e064a3bf82f21dc74ddaf9843648.
The new amdgpu_ctx_mgr_entity_fini() was never called, so it was pure
coincident that this patch didn't cause a crash. Since the workaround
shouldn't be needed any more just mostly revert the changes to amdgpu.
This exposes a accumulated GPU active time per client via the
fdinfo infrastructure.
Signed-off-by: Lucas Stach
---
v2:
- new patch
---
drivers/gpu/drm/etnaviv/etnaviv_drv.c | 32 ++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/etnaviv/et
From: Christian König
Instead of implementing this ourself.
Signed-off-by: Christian König
Signed-off-by: Lucas Stach
---
v2:
- rebased to v6.10-rc1
- adapted to match new function names
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 52 -
1 file changed, 8 insertions(+
From: Christian König
Multiple drivers came up with the requirement to measure how
much runtime each entity accumulated on the HW.
A previous attempt of accounting this had to be reverted because
HW submissions can have a lifetime exceeding that of the entity
originally issuing them.
Amdgpu on
[Public]
Series is:
Reviewed-by: Alex Deucher
From: Huang, Tim
Sent: Sunday, June 30, 2024 10:38 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Zhang, Yifan
; Huang, Tim ; Zhang, Yifan
Subject: [PATCH 7/7] drm/amdgpu: add firmware for GC IP v11
[Public]
Series is:
Reviewed-by: Alex Deucher
From: Huang, Tim
Sent: Sunday, June 30, 2024 10:48 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Zhang, Yifan
; Huang, Tim ; Zhang, Yifan
Subject: [PATCH 2/2] drm/amdgpu: Add NBIO IP v7.11.3 suppor
[Public]
Series is:
Reviewed-by: Alex Deucher
From: Huang, Tim
Sent: Sunday, June 30, 2024 10:50 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Zhang, Yifan
; Huang, Tim ; Zhang, Yifan
Subject: [PATCH 3/3] drm/amdgpu: add firmware for VPE IP v6
[AMD Official Use Only - AMD Internal Distribution Only]
Series is:
Reviewed-by: Alex Deucher
From: Huang, Tim
Sent: Sunday, June 30, 2024 10:58 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Zhang, Yifan
; Huang, Tim ; Zhang, Yifan
Subject: [P
[Public]
Reviewed-by: Alex Deucher
From: Huang, Tim
Sent: Sunday, June 30, 2024 11:45 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Zhang, Yifan
; Huang, Tim
Subject: [PATCH] drm/amd/pm: avoid to load smu firmware for APUs
Certain call paths s
[Public]
Series is:
Reviewed-by: Alex Deucher
From: Huang, Tim
Sent: Sunday, June 30, 2024 10:45 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Zhang, Yifan
; Huang, Tim ; Zhang, Yifan
Subject: [PATCH 3/3] drm/amdgpu: add firmware for SDMA IP v
[Public]
Reviewed-by: Alex Deucher
From: Min, Frank
Sent: Sunday, June 30, 2024 11:17 PM
To: Deucher, Alexander ; Olsak, Marek
; Koenig, Christian ; Zhang,
Hawking ; Gao, Likun ;
amd-gfx@lists.freedesktop.org
Subject: [PATCH] drm/amdgpu: restore dcc bo tillin
On 7/1/2024 13:47, Xaver Hugl wrote:
Am Do., 20. Juni 2024 um 22:22 Uhr schrieb Xaver Hugl :
Merging can only happen once a real world userspace application has
implemented support for it. I'll try to do that sometime next week in
KWin
Here's the promised implementation:
https://invent.kde.org
On Mon, 2024-07-01 at 12:55 -0400, Alex Deucher wrote:
> This is a variably sized array.
>
> Link:
> https://lists.freedesktop.org/archives/amd-gfx/2024-June/110420.html
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/include/atomfirmware.h | 2 +-
> 1 file changed, 1 insertion(+), 1 d
Am Do., 20. Juni 2024 um 22:22 Uhr schrieb Xaver Hugl :
> Merging can only happen once a real world userspace application has
> implemented support for it. I'll try to do that sometime next week in
> KWin
Here's the promised implementation:
https://invent.kde.org/plasma/kwin/-/merge_requests/6028
Applied. Thanks!
On Sun, Jun 30, 2024 at 11:10 PM Jiapeng Chong
wrote:
>
> The return value from the call to dml21_find_dc_pipes_for_plane() is int.
> However, the return value is being assigned to an unsigned int variable
> 'num_pipes', the condition if(num_pipes <= 0) is not rigorous enough,
>
Applied the series. Thanks!
Alex
On Mon, Jul 1, 2024 at 3:15 AM Jiapeng Chong
wrote:
>
> Avoid pointer type value compared with 0 to make code clear.
>
> ./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_factory.c:14:12-13:
> WARNING comparing pointer to 0.
>
> Reported-by: A
Need to handle the interrupt enables for all pipes.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 130 +
1 file changed, 109 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v1
Need to handle the interrupt enables for all pipes.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 134 -
1 file changed, 111 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v1
This reverts commit 28ebbdd7677d84d6d25ccff40ea6e9f01c2c8c7d.
Let's see if this works with the gfx pipe1 interrupts fixed.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/
Need to handle the interrupt enables for all pipes.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 130 -
1 file changed, 106 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v1
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Li,
> -Original Message-
> From: Ma, Li
> Sent: Monday, July 1, 2024 9:14 PM
> To: Huang, Tim ; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Zhang, Yifan
>
> Subject: RE: [PATCH v2] drm/amd/swsmu: enable more Pstate
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Jaroslav,
Are both of your monitors 4K resolution?
Then most likely the memory clock is expected to be boosted.
Thanks.
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Monday, July 1, 2024 11:07 PM
To: Jaroslav
[AMD Official Use Only - AMD Internal Distribution Only]
The two high resolution panels have different timings so it's needed to be
fixed to high memory clock level.
@Li, Humphrey to further comment.
Thanks.
-Original Message-
From: Jaroslav Pulchart
Sent: Tuesday, July 2, 2024 12:20 P
[AMD Official Use Only - AMD Internal Distribution Only]
yeah, there timings look the same, but could you try panels of exactly the
same model?
Humphrey
From: Jaroslav Pulchart
Sent: Tuesday, July 2, 2024 13:59
To: Feng, Kenneth
Cc: Li, Humphrey ; Alex De
V1: This patch enables following UMD stable Pstates profile
levels for power_dpm_force_performance_level interface.
- profile_peak
- profile_min_mclk
- profile_min_sclk
- profile_standard
V2: Fix conflict with commit "drm/amd/pm: smu v14.0.4 reuse s
[AMD Official Use Only - AMD Internal Distribution Only]
This patch is,
Reviewed-by: Tim Huang
> -Original Message-
> From: Ma, Li
> Sent: Tuesday, July 2, 2024 2:20 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Huang, Tim ; Deucher, Alexander
> ; Zhang, Yifan ; Ma,
> Li
> Subject: [
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