> In enable_phantom_plane, we should better check null pointer before
> accessing various structs.
1. Can a wording approach (like the following) be a better change description?
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/submitting-patches.rst
> > In enable_phantom_plane, we should better check null pointer before
> > accessing various structs.
>
> Thanks for the fix, I'll apply this.
Do you care for better commit messages and summary phrases?
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/
[Public]
> -Original Message-
> From: Lyude Paul
> Sent: Thursday, June 27, 2024 12:21 AM
> To: Lin, Wayne ; amd-gfx@lists.freedesktop.org; dri-
> de...@lists.freedesktop.org
> Cc: jani.nik...@intel.com; imre.d...@intel.com; dan...@ffwll.ch; Wentland,
> Harry ; Zuo, Jerry ;
> Wentland, Ha
Similar to xe, enable some simple management of VRAM only.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 6 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 6 ++
3 files changed, 14 insertions(+)
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
* FW Release 0.0.224.0
* Fix bw issue for dcn351
* Fix FAMS2 logic issue for dcn401
* Fix Coverity issues
* Fix cursor issues
* Refactor dio sources
Alex Hung (3):
drm/amd/display: Fix pos
From: Anthony Koo
- Add new Replay states 2A (initial Replay entry) and 4E (frame update)
to check is there is new frame update before sending
Signed-off-by: Jerry Zuo
Signed-off-by: Anthony Koo
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 2 ++
1 file changed, 2 insertions(+)
d
From: George Shen
[Why]
Certain situations cause pipes to have a recout of 0, such as when the
dst_rect lies completely outside of a given ODM slice.
[How]
Skip calculation that transforms cursor coordinates to viewport space.
Reviewed-by: Alvin Lee
Signed-off-by: Jerry Zuo
Signed-off-by: Geo
From: Sung Joon Kim
[why]
Previously, we decide on the unbounded request
purely based on pipe_cnt which is a wrong variable
to use to determine how many pipes are in "use".
DML already accounts for number of pipes in use
along with other various factors and is a more reliable
method of determinat
From: Tom Chung
[Why]
Sometimes the new_crtc_state->vrr_infopacket did not sync up with the
current state.
It will affect the update_freesync_state_on_stream() does not update
the state correctly.
[How]
Reset the freesync config before get_freesync_config_for_crtc() to
make sure we have the corr
From: Joshua Aberback
[Why]
This error message is unnecessary because returning when aconnector is
uninitialized is the desired outcome during initialization. As well, there
is no equivalent error message for read_dpcd.
Reviewed-by: Aurabindo Pillai
Signed-off-by: Jerry Zuo
Signed-off-by: Josh
From: Teeger
This reverts commit a698d910ea7714e512261fa due to multiple issues found.
Reviewed-by: Nicholas Kazlauskas
Signed-off-by: Jerry Zuo
Signed-off-by: Teeger
---
.../gpu/drm/amd/display/dc/dml2/dml2_wrapper.c| 15 ---
.../gpu/drm/amd/display/dc/dml2/dml2_wrapper.h
From: Alex Hung
[WHAT & HOW]
Integer multiplies integer may overflow in context that expects an
expression of unsigned/siged long long (64 bits). This can be fixed
by casting integer to unsigned/siged long long to force 64 bits results.
This fixes 26 OVERFLOW_BEFORE_WIDEN issues reported by Cove
From: Sherry Wang
[Why]
We try to disable abm immediately when it's being gradually
disabled, which causes backlight ramping being paused in the
middle
[How]
Don't disable abm immediately if abm has been or is being
disabled through set_abm_level path
Reviewed-by: Anthony Koo
Signed-off-by: Je
From: George Shen
[Why]
Certain configurations of DCN401 require ODM4:1 to support DCC for 10K
surfaces. DCC should be conservatively disabled in those cases.
The issue is that current logic limits 10K surface DCC for all
configurations of DCN401.
[How]
Add DC ASIC cap to indicate max surface w
From: Nevenko Stupar
[Why & How]
When MPC enabled, need to adjust x and hot spot x
position on one pipe when the cursor is between
MPC slices i.e. when the cursor is moving from one
MPC slice to next slice, while whole cursor size is not
contained within one pipe, to make part of the cursor
to be
From: Alex Hung
[WHAT & HOW]
A denominator cannot be 0, and is checked before used.
This fixes 2 DIVIDE_BY_ZERO issues reported by Coverity.
Reviewed-by: Harry Wentland
Signed-off-by: Jerry Zuo
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c| 2
From: Dillon Varone
[WHY&HOW]
Cleanup unnecessary code pathes as compile guards were added and removed
overtime.
Reviewed-by: Alvin Lee
Signed-off-by: Jerry Zuo
Signed-off-by: Dillon Varone
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c | 2 +-
1 file changed, 1 insertion(+)
From: Alex Hung
[WHAT & HOW]
A denominator cannot be 0, and is checked before used.
This fixes 1 DIVIDE_BY_ZERO issue reported by Coverity.
Reviewed-by: Harry Wentland
Signed-off-by: Jerry Zuo
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file chan
From: Ryan Seto
[Why]
Audio for 8K 240Hz monitor was not available when it should be
[How]
Added calculation based on stream state
Co-authored-by: Ryan Seto
Reviewed-by: George Shen
Signed-off-by: Jerry Zuo
Signed-off-by: Ryan Seto
---
.../gpu/drm/amd/display/dc/dce/dce_audio.c| 3 +-
From: Paul Hsieh
[Why]
Driver doesn't validate multi-display with scaling when OS calls DDI.
This behavior causes the validated result to be a mismatch
between some automated test cases.
To address this issue, some workaround was added that caused issues in 8k.
[How]
Since the origin issue had b
From: Tom Chung
[Why]
We only enable the VRR while monitor usable refresh rate range
is greater than 10 Hz.
But we did not check the range in DRM_EDID_FEATURE_CONTINUOUS_FREQ
case.
[How]
Add a refresh rate range check before set the freesync_capable flag
in DRM_EDID_FEATURE_CONTINUOUS_FREQ case.
From: Alvin Lee
[Description]
We need to ensure to take into account cursor prefetch BW in
mode support or we may pass ModeQuery but fail an actual flip
which will cause a hang. Flip may fail because the cursor_pre_bw
is populated during mode programming (and mode programming is
never called prio
From: Bhuvanachandra Pinninti
[why]
Refactor the code of dio to unit test.
[how]
Moved files to respective folders and changed cMakeLists and makefiles.
Signed-off-by: Jerry Zuo
Signed-off-by: Bhuvanachandra Pinninti
---
drivers/gpu/drm/amd/display/dc/dcn10/Makefile | 1 -
drivers/gpu/drm/a
From: Nicholas Kazlauskas
[Why]
DM can hook this up to disable SLDO optimizations in firmware during
DMCUB initialization for debug purposes.
[How]
Add the option and pass it through dmub_srv.
Reviewed-by: Hansen Dsouza
Signed-off-by: Jerry Zuo
Signed-off-by: Nicholas Kazlauskas
---
drivers
From: "Xi (Alex) Liu"
[Why]
In OTG disable workarund, CRTC is disabled immediately
to improve performance, but this may cause timing issue
in DP HPO encoder FIFO and result in blank CRCs.
[How]
Replace the immediate CRTC disable call with normal disable call
Reviewed-by: Nicholas Kazlauskas
From: Wenjing Liu
[why]
The function enumerates all pipes without checking pipe type. It is only
supposed to call program pixel clock for OTG master pipe only.
Reviewed-by: Alvin Lee
Signed-off-by: Jerry Zuo
Signed-off-by: Wenjing Liu
---
.../dc/clk_mgr/dcn401/dcn401_clk_mgr.c| 38 ++
From: Fangzhi Zuo
Reset fams stream count upon stream removal, otherwise
fams2 state machine in dmub will get corrupted.
Reviewed-by: Dillon Varone
Signed-off-by: Jerry Zuo
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c | 7 ++-
1 file changed, 6
From: Tom Chung
[Why]
Some of the panels does not have the refresh rate range info
in base EDID and only have the refresh rate range info in
DisplayID block.
It will cause the max/min freesync refresh rate set to 0.
[How]
Try to parse the refresh rate range info from DisplayID if the
max/min ref
Fix 4k240 underflow on dcn351
Acked-by: Rodrigo Siqueira
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c
b/drivers/gpu/drm/amd/display/
From: Roman Li
[Why]
Potential out of bounds access in dml2_calculate_rq_and_dlg_params()
because the value of out_lowest_state_idx used as an index for FCLKChangeSupport
array can be greater than 1.
[How]
Currently dml2 core specifies identical values for all FCLKChangeSupport
elements. Always
From: Aric Cyr
* FW Release 0.0.224.0
* Fix bw issue for dcn351
* Fix FAMS2 logic issue for dcn401
* Fix Coverity issues
* Fix cursor issues
* Refactor dio sources
Acked-by: Rodrigo Siqueira
Signed-off-by: Jerry Zuo
Signed-off-by: Aric Cyr
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 fi
31 matches
Mail list logo