Dear Thomas,
Thank you for testing my patch. The dev->dev_private is indeed the problem.
However, most of the functions that uses dev->dev_private is passing
drm_device as parameter, and then uses dev->dev_private to retrieve
radeon_device,
contradicting what the patch intended. It should use rad
No functional modification involved.
./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared.c:3171:2-3:
Unneeded semicolon.
./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared.c:3185:2-3:
Unneeded semicolon.
./drivers/gpu/drm/amd/display/dc/dml2/dml21/s
We recently added locking to add_queue_mes() but this error path was
overlooked. Add an unlock to the error path.
Fixes: 1802b042a343 ("drm/amdgpu/kfd: remove is_hws_hang and is_resetting")
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 1 +
1 file chan
This code works, but it's not aligned correctly. Add a couple missing
tabs.
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_ty
Am Mi., 19. Juni 2024 um 06:08 Uhr schrieb Mario Limonciello
> Thanks! I don't have permissions, so can you (or someone else) please
> apply to drm-misc-next for me?
>
> After it's merged I'll rebase and work on the feedback for the new IGT
> tests.
Merging can only happen once a real world user
On Thu, Jun 20, 2024 at 10:11:27AM -0600, Alex Hung wrote:
> From: Dillon Varone
>
> [WHY & HOW]
> Currently the force only works for a single display, make it so it can
> be forced per stream.
>
> Reviewed-by: Alvin Lee
> Cc: Mario Limonciello
> Cc: Alex Deucher
> Cc: sta...@vger.kernel.org
Hi
Am 20.06.24 um 16:30 schrieb Hoi Pok Wu:
Dear Thomas,
Thank you for testing my patch. The dev->dev_private is indeed the problem.
However, most of the functions that uses dev->dev_private is passing
drm_device as parameter, and then uses dev->dev_private to retrieve
radeon_device,
contradic
Am 21.06.24 um 09:16 schrieb Thomas Zimmermann:
Hi
Am 20.06.24 um 16:30 schrieb Hoi Pok Wu:
Dear Thomas,
Thank you for testing my patch. The dev->dev_private is indeed the
problem.
However, most of the functions that uses dev->dev_private is passing
drm_device as parameter, and then uses de
Hi
Am 20.06.24 um 17:50 schrieb Christian König:
Am 20.06.24 um 16:44 schrieb Thomas Zimmermann:
Prepares for using ttm_bo_vmap() and ttm_bo_vunmap() in amdgpu. Both
require the caller to hold the GEM reservation lock, which is not the
case while releasing a buffer object. Hence, push a possibl
adev->gfx.imu.funcs could be NULL.
Signed-off-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 8
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 8
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gpu/drm/a
[AMD Official Use Only - AMD Internal Distribution Only]
Hi,
The fix is sent out for code review.
Regards,
Hawking
-Original Message-
From: Dan Carpenter
Sent: Saturday, June 15, 2024 01:33
To: Zhang, Hawking
Cc: amd-gfx@lists.freedesktop.org; SHANMUGAM, SRINIVASAN
Subject: [bug rep
[WHY]
sriov has the higher bit violation when flushing tlb
[HOW]
normalize the registers to keep lower 16-bit(dword aligned) to aviod higher bit
violation
RLCG will mask xcd out and always assume it's accessing its own xcd
[TODO]
later will add the normalization in sriovw/rreg after fixing bugs
Am 21.06.24 um 09:32 schrieb Thomas Zimmermann:
Hi
Am 20.06.24 um 17:50 schrieb Christian König:
Am 20.06.24 um 16:44 schrieb Thomas Zimmermann:
Prepares for using ttm_bo_vmap() and ttm_bo_vunmap() in amdgpu. Both
require the caller to hold the GEM reservation lock, which is not the
case while
[AMD Official Use Only - AMD Internal Distribution Only]
Seems only need to deal with this on gfx v11, for gfx v12, it will judgement
whether (adev->gfx.imu.funcs && (amdgpu_dpm > 0)) before use imu funcs on
gfx_v12_0_rlc_backdoor_autoload_enable.
Regards,
Likun
-Original Message-
From
On Thu, Jun 20, 2024 at 09:00:23AM GMT, Alex Deucher wrote:
> On Thu, Jun 20, 2024 at 3:10 AM Maxime Ripard wrote:
> >
> > Hi,
> >
> > On Wed, Jun 19, 2024 at 09:53:12AM GMT, Alex Deucher wrote:
> > > On Wed, Jun 19, 2024 at 9:50 AM Alex Deucher
> > > wrote:
> > > >
> > > > On Tue, Jun 18, 2024
[AMD Official Use Only - AMD Internal Distribution Only]
prevd_queried_count and de_queried_count are used to accurately count the
number of DE lost after driver receives a large number of poison creation
interrupts.
Since amdgpu_ras_query_error_status can be called by page_retirment_thread,
x
Fix the unchecked return value warning reported by Coverity,
so add error handling.
Signed-off-by: Bob Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 7 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 4 +++-
drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.c | 6 --
drivers/gpu/dr
Am 21.06.24 um 11:24 schrieb Bob Zhou:
Fix the unchecked return value warning reported by Coverity,
so add error handling.
That seems to be completely superfluous. The only case when
amdgpu_ring_alloc() returns an error is when we try to allocate more
than the maximum submission size.
And i
adev->gfx.imu.funcs could be NULL
Signed-off-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index b4575765d7a8..5c17409439f8
[AMD Official Use Only - AMD Internal Distribution Only]
Sure, that works. Send out v2
Regards,
Hawking
-Original Message-
From: Gao, Likun
Sent: Friday, June 21, 2024 16:35
To: Zhang, Hawking ; amd-gfx@lists.freedesktop.org; Min,
Frank
Cc: Zhang, Hawking
Subject: RE: [PATCH] drm/amd
[AMD Official Use Only - AMD Internal Distribution Only]
This patch was
Reviewed-by: Likun Gao .
Regards,
Likun
-Original Message-
From: Hawking Zhang
Sent: Friday, June 21, 2024 5:54 PM
To: amd-gfx@lists.freedesktop.org; Gao, Likun ; Min, Frank
Cc: Zhang, Hawking
Subject: [PATCH] dr
On Fri, Jun 21, 2024 at 12:56 PM Linux regression tracking (Thorsten
Leemhuis) wrote:
> Hmmm, I might have missed something, but it looks like nothing happened
> here since then. What's the status? Is the issue still happening?
Yes. Tested on e5b3efbe1ab1.
I spotted that the problem disappears a
On 09.06.24 23:19, Mikhail Gavrilov wrote:
> On Fri, Jun 7, 2024 at 6:39 PM Alex Deucher wrote:
>>
>> --- a/drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c
>> +++ b/drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c
>> @@ -944,7 +944,7 @@ void optc1_set_drr(
>>
Hi,
On 21/06/2024 06:29, Arunpravin Paneer Selvam wrote:
- Add a new start parameter in trim function to specify exact
address from where to start the trimming. This would help us
in situations like if drivers would like to do address alignment
for specific requirements.
- Add a new fl
From: Xiaogang Chen
When user adds new vm range that has overlapping with existing svm pranges
current kfd clones new prange and remove existing pranges including all data
associate with it. It is not necessary. We can handle the overlapping on
existing pranges directly that would simplify kfd co
Do not allow the compute partition mode switch from the guest driver.
Signed-off-by: Rajneesh Bhardwaj
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index 82452
Under SRIOV environment, the compute partition mode is setup by the
host driver so state machine cached copy might be different when doing
the transition for the first time.
Signed-off-by: Rajneesh Bhardwaj
---
drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c | 3 ++-
1 file changed, 2 insertions(+), 1 d
[AMD Official Use Only - AMD Internal Distribution Only]
Should we also set fed flag for the case where kfd detects timeout first?
I.e. adding
amdgpu_ras_set_fed(adev, true);
to amdgpu_device_gpu_recover or amdgpu_virt_rcvd_ras_interrupt if the RAS
signature is found?
Thanks,
Hing Pong
-
28 matches
Mail list logo
