-Original Message-
From: Chai, Thomas
Sent: 2024年6月18日 14:34
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Zhou1, Tao ; Li,
Candice ; Wang, Yang(Kevin) ; Yang,
Stanley ; Chai, Thomas
Subject: [PATCH 5/5] drm/amdgpu: add gpu reset check and exception handling
Add gpu reset c
On Mon, 2024-06-17 at 22:30 +0800, Icenowy Zheng wrote:
> > Two consecutive writes to the same bus address are perfectly legal
> > from
> > the PCIe specification and can happen all the time, even without this
> > specific hw workaround.
>
> Yes I know it, and I am not from Loongson, just some us
As reported in my previous email. In my device I don't see a more
critical system freeze, which causes system reboot, during video play.
But I still experience green screen problem during full screen
toggling while watching video (Screenshot: https://ibb.co/8Dpdxc3). It
didn't cause my system to re
On 6/12/24 21:15, Mirsad Todorovac wrote:
> Hi, all!
>
> Running the vanilla torvalds tree kernel 6.10-rc3, there occurred an error in
> boot with
> amdgpu.
>
> Here is the complete output:
>
> kernel: [8.704024] WARNING: CPU: 24 PID: 689 at
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c:137
This reverts commit 354436e7905d166011f2aa26dccd9fa04b20940e.
Revert this patch to modify lock type back to 'mutex' to avoid kernel
calltrace issue.
[ 602.668806] Workqueue: amdgpu-reset-dev amdgpu_ras_do_recovery [amdgpu]
[ 602.668939] Call Trace:
[ 602.668940]
[ 602.668941] dump_stack_lv
This reverts commit 379e6cd11499f35d67bbf8f0114b0a054b9f73d7
revert this patch to modify lock type back to 'mutex' to avoid kernel
calltrace issue.
[ 602.668806] Workqueue: amdgpu-reset-dev amdgpu_ras_do_recovery [amdgpu]
[ 602.668939] Call Trace:
[ 602.668940]
[ 602.668941] dump_stack_lvl
[AMD Official Use Only - AMD Internal Distribution Only]
Series is
Reviewed-by: YiPeng Chai
-
Best Regards,
Thomas
-Original Message-
From: Wang, Yang(Kevin)
Sent: Tuesday, June 18, 2024 3:49 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Zhou1, Tao ;
Chai,
Cache the PCI state before bus master is disabled. The saved state is
later used for other cases like restoring config space after mode-2
reset.
Signed-off-by: Lijo Lazar
Fixes: 5c03e5843e6b ("drm/amdgpu:add smu mode1/2 support for aldebaran")
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7 +
[AMD Official Use Only - AMD Internal Distribution Only]
-
Best Regards,
Thomas
-Original Message-
From: Wang, Yang(Kevin)
Sent: Tuesday, June 18, 2024 3:19 PM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Zhou1, Tao ; Li,
Candice ; Yang, Stanley
On 6/17/2024 3:41 PM, Jane Jian wrote:
> [WHY]
> sriov has the higher bit violation when flushing tlb
>
> [HOW]
> normalize the registers to keep lower 16-bit(dword aligned) to aviod higher
> bit violation
> RLCG will mask xcd out and always assume it's accessing its own xcd
>
> also fix the
On Tue, 18 Jun 2024, André Almeida wrote:
> Drivers have different capabilities on what plane types they can or
> cannot perform async flips. Create a plane::async_flip field so each
> driver can choose which planes they allow doing async flips.
>
> Signed-off-by: André Almeida
> ---
> include/d
On Tue, 18 Jun 2024 at 12:38, Jani Nikula wrote:
>
> On Tue, 18 Jun 2024, André Almeida wrote:
> > Drivers have different capabilities on what plane types they can or
> > cannot perform async flips. Create a plane::async_flip field so each
> > driver can choose which planes they allow doing async
On 6/18/2024 12:03 PM, YiPeng Chai wrote:
> Add completion to wait for ras reset to complete.
>
> Signed-off-by: YiPeng Chai
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 11 +++
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 1 +
> 2 files changed, 12 insertions(+)
>
> diff --git
[AMD Official Use Only - AMD Internal Distribution Only]
-
Best Regards,
Thomas
-Original Message-
From: Lazar, Lijo
Sent: Tuesday, June 18, 2024 6:09 PM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Zhou1, Tao ; Li,
Candice ; Wang, Yang(Kevin) ;
[AMD Official Use Only - AMD Internal Distribution Only]
-
Best Regards,
Thomas
-Original Message-
From: Chai, Thomas
Sent: Tuesday, June 18, 2024 7:09 PM
To: Lazar, Lijo ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Zhou1, Tao ; Li,
Candice ; Wang, Yang(Kevin) ; Y
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Lazar, Lijo
Sent: Tuesday, June 18, 2024 16:44
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Deucher, Alexander
; Kamal, Asad ; Xu, Feifei
Subject: [
Am 18.06.24 um 11:11 schrieb Pavel Machek:
Hi!
[ Upstream commit a0cf36546cc24ae1c95d72253c7795d4d2fc77aa ]
The pointer parent may be NULLed by the function amdgpu_vm_pt_parent.
To make the code more robust, check the pointer parent.
If this can happen, it should not WARN().
If this can not
On 6/18/2024 4:51 PM, Chai, Thomas wrote:
> [AMD Official Use Only - AMD Internal Distribution Only]
>
> -
> Best Regards,
> Thomas
>
> -Original Message-
> From: Chai, Thomas
> Sent: Tuesday, June 18, 2024 7:09 PM
> To: Lazar, Lijo ; amd-gfx@lists.freedesktop.org
> Cc:
From: Tasos Sahanidis
[ Upstream commit c6c4dd54012551cce5cde408b35468f2c62b0cce ]
Flexible arrays used [1] instead of []. Replace the former with the latter
to resolve multiple UBSAN warnings observed on boot with a BONAIRE card.
In addition, use the __counted_by attribute where possible to hi
[AMD Official Use Only - AMD Internal Distribution Only]
From: Frank Min
gfx12 only support MTYPE UC and NC, so update it accordingly.
Signed-off-by: Frank Min
---
drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_
On Tue, Jun 18, 2024 at 3:42 AM Winston Ma wrote:
>
> As reported in my previous email. In my device I don't see a more
> critical system freeze, which causes system reboot, during video play.
> But I still experience green screen problem during full screen
> toggling while watching video (Screens
On Tue, Jun 18, 2024 at 9:07 AM Min, Frank wrote:
>
> [AMD Official Use Only - AMD Internal Distribution Only]
>
> From: Frank Min
>
> gfx12 only support MTYPE UC and NC, so update it accordingly.
>
> Signed-off-by: Frank Min
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v12_
On 2024-06-14 15:54, Nathan Chancellor wrote:
> Commit 77acc6b55ae4 ("riscv: add support for kernel-mode FPU") and
> commit a28e4b672f04 ("drm/amd/display: use ARCH_HAS_KERNEL_FPU_SUPPORT")
> enabled support for CONFIG_DRM_AMD_DC_FP with RISC-V. Unfortunately,
> this exposed -Wframe-larger-than
Why:
If the reg mmMP1_SMN_C2PMSG_90 is being written to before or during
amdgpu driver load or driver unload in sriov case, subsequent amdgpu
driver load will fail at smu hw_init.
The default of mmMP1_SMN_C2PMSG_90 register at a clean environment is 0x1,
and if value differs from 0x1, amdgpu driver
This looks more like a workaround.
Can we write the C2PMSG_90 register to 1 on the PF side when host receive
GPU_RESET/GPU_INIT request command?
Best Regards,
Kevin
-Original Message-
From: amd-gfx On Behalf Of Danijel
Slivka
Sent: 2024年6月18日 23:00
To: amd-gfx@lists.freedesktop.org
Cc
The goal I'm aiming for is to be able to open a dri node and use
amdgpu_device_initialize without waking up the GPU. One visible outcome
is that it would become possible to call vkEnumeratePhysicalDevices
without having to resume all the GPUs in the system.
This series implements some of the chang
Waking up a device can take multiple seconds, so if it's not
going to be used we might as well not resume it.
The safest default behavior for all ioctls is to resume the GPU,
so this change allows specific ioctls to opt-out of generic
runtime pm.
Signed-off-by: Pierre-Eric Pelloux-Prayer
---
dr
These ioctls don't need to GPU, so don't resume it.
Signed-off-by: Pierre-Eric Pelloux-Prayer
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 45 +++--
1 file changed, 42 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/
libdrm_amdgpu uses AMDGPU_INFO_READ_MMR_REG to fill the dev->info.gb_addr_cfg
value.
Since this value is already known by the kernel, this commit implements a new
query to return it.
The libdrm MR to use this query is:
https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/368
Signed-off-by:
AMDGPU_INFO_xxx has lots of different queries, and only a small
number of them actually reaches out to the GPU.
This commit extract the amdgpu_info_ioctl implementation to a
helper function, and then wrap it with the runtime pm logic
each query type needs.
Signed-off-by: Pierre-Eric Pelloux-Praye
The fault handler may push some work to the GPU through amdgpu_bo_move
so use the pm_runtime functions before that.
Since we're in an interrupt context, we can't use the sync version,
so pm_runtime_get is called.
Signed-off-by: Pierre-Eric Pelloux-Prayer
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ge
This way these values can be returned directly when using
AMDGPU_INFO_DEV_INFO, without waking up the GPU.
Signed-off-by: Pierre-Eric Pelloux-Prayer
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 12 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c | 8
.../gpu/drm/amd/a
Em 18/06/2024 07:07, Dmitry Baryshkov escreveu:
On Tue, 18 Jun 2024 at 12:38, Jani Nikula wrote:
On Tue, 18 Jun 2024, André Almeida wrote:
Drivers have different capabilities on what plane types they can or
cannot perform async flips. Create a plane::async_flip field so each
driver can choos
From: Sonny Jiang
Doorbell needs to be configured after power up during each playback
Signed-off-by: Sonny Jiang
---
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
b/drivers/gpu/drm/
Although designs may contain an ISP IP block, the camera might be a USB
camera. Because of this the ISP firmware is considered optional from
amdgpu. However if the firmware doesn't get loaded the hardware should
not be initialized.
Adjust the return code for early init to ensure the IP block does
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Zhigang Luo
-Original Message-
From: Chander, Vignesh
Sent: Monday, June 17, 2024 10:55 AM
To: amd-gfx@lists.freedesktop.org
Cc: Chan, Hing Pong ; Luo, Zhigang ;
Chander, Vignesh ; Chander, Vignesh
Subject: [PATCH
On Tue, Jun 18, 2024 at 01:18:10PM GMT, André Almeida wrote:
> Em 18/06/2024 07:07, Dmitry Baryshkov escreveu:
> > On Tue, 18 Jun 2024 at 12:38, Jani Nikula
> > wrote:
> > >
> > > On Tue, 18 Jun 2024, André Almeida wrote:
> > > > Drivers have different capabilities on what plane types they can
[AMD Official Use Only - AMD Internal Distribution Only]
LGTM, thank you.
-Original Message-
From: Limonciello, Mario
Sent: Tuesday, June 18, 2024 12:43 PM
To: amd-gfx@lists.freedesktop.org
Cc: Nirujogi, Pratap ; Limonciello, Mario
Subject: [PATCH] drm/amd: Don't initialize ISP hardwar
[AMD Official Use Only - AMD Internal Distribution Only]
I tried to set the C2PMSG_90 register to 1 on the PF side ( after receiving
command for request GPU init from VF) and from PF side this value is set to 0x1
but from VF side the register still reads the old value.
BR,
Danijel
>-Origi
On Tue, Jun 18, 2024 at 1:17 PM Sonny Jiang wrote:
>
> From: Sonny Jiang
>
> Doorbell needs to be configured after power up during each playback
>
> Signed-off-by: Sonny Jiang
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c | 8
> 1 file changed, 4 insertions
On Tue, Jun 18, 2024 at 2:02 PM Mario Limonciello
wrote:
>
> Although designs may contain an ISP IP block, the camera might be a USB
> camera. Because of this the ISP firmware is considered optional from
> amdgpu. However if the firmware doesn't get loaded the hardware should
> not be initialized
On 2024-06-12 16:11, Xiaogang.Chen wrote:
From: Xiaogang Chen
Current kfd/svm driver acquires mm's mmap write lock before update
mm->notifier_subscriptions->itree. This tree is already protected
by mm->notifier_subscriptions->lock at mmu notifier. Each process mm interval
tree update from dif
Thanks for the tests! FYI IGT patches should also cc
igt-...@lists.freedesktop.org
Some comments inline:
On 2024-05-22 18:08, Mario Limonciello wrote:
From: Mario Limonciello
When the "panel power saving" property is set to forbidden the
compositor has indicated that userspace prefers to h
On 2024-05-22 18:08, Mario Limonciello wrote:
Verify that the property has disabled PSR
---
tests/amdgpu/amd_psr.c | 74 ++
1 file changed, 74 insertions(+)
diff --git a/tests/amdgpu/amd_psr.c b/tests/amdgpu/amd_psr.c
index 9da161a09..a9f4a6aa5 10064
Em 18/06/2024 14:43, Dmitry Baryshkov escreveu:
On Tue, Jun 18, 2024 at 01:18:10PM GMT, André Almeida wrote:
Em 18/06/2024 07:07, Dmitry Baryshkov escreveu:
On Tue, 18 Jun 2024 at 12:38, Jani Nikula wrote:
On Tue, 18 Jun 2024, André Almeida wrote:
Drivers have different capabilities on wha
On 6/18/2024 15:20, Leo Li wrote:
Thanks for the tests! FYI IGT patches should also cc
igt-...@lists.freedesktop.org
Some comments inline:
On 2024-05-22 18:08, Mario Limonciello wrote:
From: Mario Limonciello
When the "panel power saving" property is set to forbidden the
compositor has in
On 6/18/2024 15:20, Leo Li wrote:
On 2024-05-22 18:08, Mario Limonciello wrote:
Verify that the property has disabled PSR
---
tests/amdgpu/amd_psr.c | 74 ++
1 file changed, 74 insertions(+)
diff --git a/tests/amdgpu/amd_psr.c b/tests/amdgpu/amd_psr.
For RAS error scenario, VF guest driver will check mailbox
and set fed flag to avoid unnecessary HW accesses.
additionally, poll for reset completion message first
to avoid accidentally spamming multiple reset requests to host.
v2: add another mailbox check for handling case where kfd detects
time
Applied. Thanks!
Alex
On Tue, Jun 18, 2024 at 10:17 AM Harry Wentland wrote:
>
>
>
> On 2024-06-14 15:54, Nathan Chancellor wrote:
> > Commit 77acc6b55ae4 ("riscv: add support for kernel-mode FPU") and
> > commit a28e4b672f04 ("drm/amd/display: use ARCH_HAS_KERNEL_FPU_SUPPORT")
> > enabled supp
Hi,
On Mon, Jun 17, 2024 at 8:01 AM Alex Deucher wrote:
>
> On Wed, Jun 12, 2024 at 6:37 PM Douglas Anderson
> wrote:
> >
> > Based on grepping through the source code this driver appears to be
> > missing a call to drm_atomic_helper_shutdown() at system shutdown
> > time. Among other things,
On Tue, Jun 18, 2024 at 5:40 PM Doug Anderson wrote:
>
> Hi,
>
>
> On Mon, Jun 17, 2024 at 8:01 AM Alex Deucher wrote:
> >
> > On Wed, Jun 12, 2024 at 6:37 PM Douglas Anderson
> > wrote:
> > >
> > > Based on grepping through the source code this driver appears to be
> > > missing a call to drm_
Ping?
Alex
On Fri, Jun 14, 2024 at 2:12 PM Alex Deucher wrote:
>
> v3.x changed the how vram width was encoded. The previous
> implementation actually worked correctly for most boards.
> Fix the implementation to work correctly everywhere.
>
> This fixes the vram width reported in the kernel lo
On 2024-06-05 22:04, Mario Limonciello wrote:
When the `power_saving_policy` property is set to bit mask
"Require color accuracy" ABM should be disabled immediately and
any requests by sysfs to update will return an -EBUSY error.
When the `power_saving_policy` property is set to bit mask
"Req
Hi,
On Tue, Jun 18, 2024 at 3:00 PM Alex Deucher wrote:
>
> On Tue, Jun 18, 2024 at 5:40 PM Doug Anderson wrote:
> >
> > Hi,
> >
> >
> > On Mon, Jun 17, 2024 at 8:01 AM Alex Deucher wrote:
> > >
> > > On Wed, Jun 12, 2024 at 6:37 PM Douglas Anderson
> > > wrote:
> > > >
> > > > Based on grepp
I would put this into drm_amdgpu_info_device. That structure can grow in size.
Marek
On Tue, Jun 18, 2024 at 11:30 AM Pierre-Eric Pelloux-Prayer
wrote:
>
> libdrm_amdgpu uses AMDGPU_INFO_READ_MMR_REG to fill the dev->info.gb_addr_cfg
> value.
> Since this value is already known by the kernel, th
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Saturday, June 15, 2024 01:55
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH] drm/amdgpu/atomf
[AMD Official Use Only - AMD Internal Distribution Only]
-
Best Regards,
Thomas
-Original Message-
From: Lazar, Lijo
Sent: Tuesday, June 18, 2024 8:00 PM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Zhou1, Tao ; Li,
Candice ; Wang, Yang(Kevin) ;
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Feifei Xu
-Original Message-
From: Zhang, Hawking
Sent: Tuesday, June 18, 2024 7:34 PM
To: Lazar, Lijo ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Kamal, Asad
; Xu, Feifei
Subject: RE: [PATCH] drm/amdgp
On 6/18/2024 17:36, Leo Li wrote:
On 2024-06-05 22:04, Mario Limonciello wrote:
When the `power_saving_policy` property is set to bit mask
"Require color accuracy" ABM should be disabled immediately and
any requests by sysfs to update will return an -EBUSY error.
When the `power_saving_policy
Instead of using state->fb->obj[0] directly, get object from framebuffer
by calling drm_gem_fb_get_obj() and return error code when object is
null to avoid using null object of framebuffer.
v2: Call drm_gem_fb_get_obj after check old_state->fb for NULL.
Signed-off-by: Julia Zhang
---
drivers/gp
On Wed, Jun 19, 2024 at 12:29:24PM +0800, Zhang, Julia wrote:
> Instead of using state->fb->obj[0] directly, get object from framebuffer
> by calling drm_gem_fb_get_obj() and return error code when object is
> null to avoid using null object of framebuffer.
>
> v2: Call drm_gem_fb_get_obj after ch
On Wed, Jun 19, 2024 at 12:46:25PM +0800, Huang Rui wrote:
> On Wed, Jun 19, 2024 at 12:29:24PM +0800, Zhang, Julia wrote:
> > Instead of using state->fb->obj[0] directly, get object from framebuffer
> > by calling drm_gem_fb_get_obj() and return error code when object is
> > null to avoid using nu
On 2024/6/19 12:53, Huang Rui wrote:
On Wed, Jun 19, 2024 at 12:46:25PM +0800, Huang Rui wrote:
On Wed, Jun 19, 2024 at 12:29:24PM +0800, Zhang, Julia wrote:
Instead of using state->fb->obj[0] directly, get object from framebuffer
by calling drm_gem_fb_get_obj() and return error code when obje
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Kenneth Feng
-Original Message-
From: amd-gfx On Behalf Of Sonny Jiang
Sent: Wednesday, June 19, 2024 12:40 AM
To: amd-gfx@lists.freedesktop.org
Cc: Jiang, Sonny
Subject: [PATCH] drm/amdgpu/jpeg5: reprogram doorbell
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