Am 31.05.24 um 14:34 schrieb Lijo Lazar:
Skip scheduling coredump when gpu reset is intentionally triggered
through debugfs.
Signed-off-by: Lijo Lazar
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/g
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Feifei Xu
-Original Message-
From: amd-gfx On Behalf Of Lijo Lazar
Sent: Monday, June 3, 2024 2:58 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Deucher, Alexander
; Li, Candice
Subject: [PATCH] drm/amdg
Am 03.06.24 um 07:59 schrieb Bob Zhou:
The return value of RREG32_SOC15 is unsigned int, so modify variable to
unsigned.
And why is that an improvement?
Regards,
Christian.
Signed-off-by: Bob Zhou
---
drivers/gpu/drm/amd/amdgpu/imu_v12_0.c | 6 +++---
1 file changed, 3 insertions(+), 3
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Eric,
To consider other reset cases also, you may have something like attached.
Thanks,
Lijo
-Original Message-
From: amd-gfx On Behalf Of Eric Huang
Sent: Friday, May 31, 2024 8:38 PM
To: amd-gfx@lists.freedesktop.org
Cc: Kasi
Thanks Alex, the patch is:
Acked-by: Pierre-Eric Pelloux-Prayer
Le 31/05/2024 à 19:42, Alex Deucher a écrit :
This reverts commit 269226a8fdf2cac0e03920f9ba0d670a056af3d6.
Pierre-Eric reported problems with this on his navi33. Revert
for now until we understand what is going wrong.
Jesse Zhang (12):
drm/amd/pm: remove dead code in si_convert_power_level_to_smc
drm/amdgpu: remove dead code in cik_program_aspm
drm/amdgpu: remove dead code in sdma_v6_0_load_microcode
drm/amdgpu: remove dead code in atom_get_src_int
drm/amd/pm: remove dead code in navi10_emit_clk_leve
Since gmc_pg is false, setting mcFlags with SISLANDS_SMC_MC_PG_EN cannot be
reach.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
b/drivers/gpu/drm/amd/pm/legacy-dpm/si_
Since disable_clkreq is false, execution cannot reach this statement:
clk_req_support = false.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/cik.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c
index cf1d5d462
Remove legacy method to load firmware mode, since that code cannot be reach.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 39 --
1 file changed, 39 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/s
Since the range of align is 0~7, the expression is: align = (attr >> 3) & 7.
In the case of ATOM_ARG_IMM, the code cannot reach the default case.
So there is no need for "break".
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/atom.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/d
Since the range of the varibable i is 0 - 3.
So execution cannot reach this statement: default.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
b/drivers/gpu/drm
These 2 traces events are tied to a specific VM so in order for them
to be useful for a tool we need to trace the amdgpu_vm as well.
Signed-off-by: Pierre-Eric Pelloux-Prayer
---
drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 20
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c| 8 +
dma_resv_trylock being successful doesn't guarantee that bo->tbo.base.resv
is not NULL, so check its validity before using it.
Signed-off-by: Pierre-Eric Pelloux-Prayer
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 63 +++---
1 file changed, 33 insertions(+), 30 deletions(-)
At the start it checks limit_level.
When switching on limit_level, the value of limit_level must be between -1 and
2.
The switch governing value limit_level cannot reach the default case.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 2 --
1 file changed, 2 deletion
When switching on idx, the value of idx must be between 0 and 3.
The switch governing value idx cannot reach the default case.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
b/dr
The value of type check at the start.
The switch governing value type cannot reach the default case.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 2 --
drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 2 --
2 files changed, 4 deletions(-)
diff --git a/
Since disable_l1 is false, the else branch cannot be reached.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/cik.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c
index 5428fd4071b8..0ad736e775db 100644
--- a/dr
The queue type can only be KFD_QUEUE_TYPE_DIQ or KFD_QUEUE_TYPE_HIQ,
and the default cannot be reached.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
b/drivers/gpu/
idr_for_each_entry can ensure that mem is not empty during the loop.
So don't need check mem again.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
b/drivers/gpu/drm/amd/amdk
The variable disable_l1 is false and execution cannot reach the else branch.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/si.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index 85235470e872..d80eec275090 100
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Christian,
It fixes a potential Overflowed constant (INTEGER_OVERFLOW) warning reported by
Coverity.
Regards,
Bob
-Original Message-
From: Koenig, Christian
Sent: 2024年6月3日 15:56
To: Zhou, Bob ; amd-gfx@lists.freedesktop.org;
[AMD Official Use Only - AMD Internal Distribution Only]
Could you share the problems you encountered?
Some compilers may prompt you to forget to handle default cases.
Best Regards,
Kevin
-Original Message-
From: amd-gfx On Behalf Of Jesse Zhang
Sent: Monday, June 3, 2024 4:48 PM
To: am
Am 03.06.24 um 10:46 schrieb Pierre-Eric Pelloux-Prayer:
These 2 traces events are tied to a specific VM so in order for them
to be useful for a tool we need to trace the amdgpu_vm as well.
The bo_va already contains the VM pointer the map/unmap operation
belongs to.
Signed-off-by: Pierre-
Hi Shaoyun,
yes my thinking goes into the same direction. The basic problem here is
that we are trying to stuff two different information into the same
variable.
The first information is if the commands haven been read by the MES from
the ring buffer. This information is necessary for the no
Am 31.05.24 um 08:52 schrieb Yang Wang:
Adding formatting string feature to improve function flexibility.
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 30 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 3 ++-
2 files changed, 24 insertions(+
Am 03.06.24 um 10:53 schrieb Zhou, Bob:
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Christian,
It fixes a potential Overflowed constant (INTEGER_OVERFLOW) warning reported by
Coverity.
You need to mention that in the commit message.
And I haven't checked the hardware docs, b
When flushing gpu tlb using kiq from gfxhub, kiq ring is always
local as xcc instance is selected for it. Thus using lower 18 bits
to access mmregs inside local xcc instead of full address used
when accessing regs outside of local xcc.
Remove redundent code.
Signed-off-by: Yiqing Yao
---
driver
Hi Christia,
Le 03/06/2024 à 11:58, Christian König a écrit :
Am 03.06.24 um 10:46 schrieb Pierre-Eric Pelloux-Prayer:
These 2 traces events are tied to a specific VM so in order for them
to be useful for a tool we need to trace the amdgpu_vm as well.
The bo_va already contains the VM pointer
On Sun, 2 Jun 2024, Andy Shevchenko wrote:
> On Fri, May 31, 2024 at 02:31:45PM -0700, Chia-I Wu wrote:
> > On Fri, May 31, 2024 at 1:57 AM Andy Shevchenko <
> > andriy.shevche...@linux.intel.com> wrote:
> > > On Thu, May 30, 2024 at 10:36:57PM -0700, Chia-I Wu wrote:
>
> ...
>
> > > P.S> I'm no
Compilation fails on arm with:
link_factory.c:743:1: error: the frame size of 1032 bytes is larger than 1024
bytes [-Werror=frame-larger-than=]
Fix the frame size by allocation one of the big structures.
Signed-off-by: Andy Shevchenko
---
.../gpu/drm/amd/display/dc/link/link_factory.c|
On 5/31/24 2:32 AM, Colin Ian King wrote:
> There are a few spelling mistakes in dml2_printf messages. Fix them.
>
> Signed-off-by: Colin Ian King
Reviewed-by: Randy Dunlap
Thanks.
> ---
> .../dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c | 6 +++---
> .../display/dc/dml2/dml21
Hello,
with 6.10.0-rc1, I noticed the following in dmesg:
[ 10.967791] amdgpu :0b:00.0: amdgpu: RAS: optional ras ta ucode is not
available
[ 10.973672] amdgpu :0b:00.0: amdgpu: RAP: optional rap ta ucode is not
available
[ 10.973674] amdgpu :0b:00.0: amdgpu: SECUREDISPLAY: sec
On Thu, May 30, 2024 at 10:36:57PM -0700, Chia-I Wu wrote:
> We can skip children resources when the parent resource does not cover
> the range.
> This should help vmf_insert_* users on x86, such as several DRM drivers.
vmf_insert_*()
> On my AMD Ryzen 5 7520C, when streaming data from cpu memor
Flexible arrays used [1] instead of []. Replace the former with the latter
to resolve multiple UBSAN warnings observed on boot with a BONAIRE card.
In addition, use the __counted_by attribute where possible to hint the
length of the arrays to the compiler and any sanitizers.
Signed-off-by: Tasos
On Sun, Jun 02, 2024 at 05:21:03PM +0300, Andy Shevchenko wrote:
> Compilation fails on arm with:
>
> link_factory.c:743:1: error: the frame size of 1032 bytes is larger than
> 1024 bytes [-Werror=frame-larger-than=]
>
> Fix the frame size by allocation one of the big structures.
Fixed even i
On 30/05/2024 20:57, Hamza Mahfooz wrote:
On 5/28/24 08:57, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Currently when one enables driver debugging dmesg gets spammed, at I
suspect vblank rate, with messages like:
[drm:amdgpu_dm_atomic_check [amdgpu]] MPO enablement requested on
crtc:[000
On Fri, May 31, 2024 at 02:31:45PM -0700, Chia-I Wu wrote:
> On Fri, May 31, 2024 at 1:57 AM Andy Shevchenko <
> andriy.shevche...@linux.intel.com> wrote:
> > On Thu, May 30, 2024 at 10:36:57PM -0700, Chia-I Wu wrote:
...
> > P.S> I'm not so sure about this change. It needs a thoroughly testing,
On Fri, 31 May 2024, Chia-I Wu wrote:
> On Fri, May 31, 2024 at 1:57 AM Andy Shevchenko
>
> wrote:
> On Thu, May 30, 2024 at 10:36:57PM -0700, Chia-I Wu wrote:
> > We can skip children resources when the parent resource does not cover
> > the range.
> >
> > This shou
[Public]
Hi all,
This week this patchset was tested on the following systems:
• Lenovo ThinkBook T13s Gen4 with AMD Ryzen 5 6600U
• MSI Gaming X Trio RX 6800
• Gigabyte Gaming OC RX 7900 XTX
These systems were tested on the following display/connection types:
• eD
Am 03.06.24 um 13:52 schrieb Pierre-Eric Pelloux-Prayer:
Hi Christia,
Le 03/06/2024 à 11:58, Christian König a écrit :
Am 03.06.24 um 10:46 schrieb Pierre-Eric Pelloux-Prayer:
These 2 traces events are tied to a specific VM so in order for them
to be useful for a tool we need to trace the amdg
We can't read/write to DCN registers while in IPS. Since, that can cause
the system to hang. So, before proceeding with the access in that
scenario, force the system out of IPS.
Cc: sta...@vger.kernel.org # 6.6+
Signed-off-by: Hamza Mahfooz
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |
[AMD Official Use Only - AMD Internal Distribution Only]
From: Frank Min
Set PTE_IS_PTE bit while PRT is enabled on gfx12.
Signed-off-by: Frank Min
---
drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
b/drivers/
Thanks Lijo, I will send another patch with your suggestion.
Regards,
Eric
On 2024-06-03 04:03, Lazar, Lijo wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Eric,
To consider other reset cases also, you may have something like attached.
Thanks,
Lijo
-Original Message---
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 861a3cb5a2a8480d361fa6708da24747d6fa72fe Add linux-next specific
files for 20240603
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202406031357.4t4jtalq-...@intel.com
https
Am 03.06.24 um 13:46 schrieb Yiqing Yao:
When flushing gpu tlb using kiq from gfxhub, kiq ring is always
local as xcc instance is selected for it. Thus using lower 18 bits
to access mmregs inside local xcc instead of full address used
when accessing regs outside of local xcc.
Remove redundent co
reset source or reset cause is very useful info
for reset context, it will be used by events API.
Suggested-by: Lijo Lazar
Signed-off-by: Eric Huang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c | 34 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h | 13 +
2 files chan
reset cause is requested by customer as additional
info for gpu reset smi event.
v2: integerate reset sources suggested by Lijo Lazar
Signed-off-by: Eric Huang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 3 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 10 +++---
drivers/gpu/drm/
[AMD Official Use Only - AMD Internal Distribution Only]
Thanks Christian for the detail explanation.
I checked your patch , you try to use query_scheduler_status package to check
the command completion . It may not work as expected since this API query the
status is for MES itself , so mes ca
[Public]
Reviewed-by: Roman Li
> -Original Message-
> From: Mahfooz, Hamza
> Sent: Monday, June 3, 2024 10:35 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Wentland, Harry ; Li, Sun peng (Leo)
> ; Siqueira, Rodrigo ;
> Deucher, Alexander ; Hung, Alex
> ; Li, Roman ; Mahfooz, Hamza
> ; st
This reverts commit 416b5c5eec9e708b31c68f00cb79130f2cfaf7ed.
This patch caused a regression on DCN 3.2 on the IGT test assr-links-suspend,
with
the dmesg warning:
BUG: sleeping function called from invalid context at
include/linux/sched/mm.h:306
in_atomic(): 1, irqs_disabled(): 0, non_block: 0
The approach of having a separate WB slot for each submission doesn't
really work well and for example breaks GPU reset.
Use a status query packet for the fence update instead since those
should always succeed we can use the fence of the original packet to
signal the state of the operation.
While
From: Christian König
The approach of having a separate WB slot for each submission doesn't
really work well and for example breaks GPU reset.
Use a status query packet for the fence update instead since those
should always succeed we can use the fence of the original packet to
signal the state
No longer used so remove it.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 12
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 4
2 files changed, 16 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_m
Hi Palmer,
On Thu, May 30, 2024 at 07:57:42AM -0700, Palmer Dabbelt wrote:
> From: Palmer Dabbelt
>
> I get a handful of build errors along the lines of
>
>
> linux/drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:58:13:
> error: stack frame size (2352) exceeds lim
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Kevin,
-Original Message-
From: Wang, Yang(Kevin)
Sent: Monday, June 3, 2024 5:09 PM
To: Zhang, Jesse(Jie) ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
; Kuehling, Felix ; Huang,
Tim ; Zhang, Jes
Hi Mario,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-misc/drm-misc-next]
[also build test ERROR on drm/drm-next drm-exynos/exynos-drm-next
drm-intel/for-linux-next drm-intel/for-linux-next-fixes drm-tip/drm-tip
linus/master v6.10-rc2 next-20240603]
[If
[AMD Official Use Only - AMD Internal Distribution Only]
From: Frank Min mailto:frank@amd.com>>
Update to latest changes.
Signed-off-by: Frank Min mailto:frank@amd.com>>
---
drivers/gpu/drm/amd/include/soc21_enum.h | 2 +-
drivers/gpu/drm/amd/include/soc24_enum.h | 2 +-
2 files
[AMD Official Use Only - AMD Internal Distribution Only]
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/navi10_ppt.o
/home/kevin/Work/disk/linux/linux-next/drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/navi10_ppt.c:
In function 'navi10_emit_clk_levels':
/home/kevin/Work/disk/linux/linux-ne
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Min, Frank
Sent: Monday, June 3, 2024 23:04
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
; Zhang, Hawking ; Gao, Likun
; Olsak,
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Kevin
I guess you didn't apply the patch correctly.
This patch doesn't remove default branch for clk_type.
In the case of SMU_OD_VDDC_CURVE in function navi10_emit_clk_levels ,
The variable i ranges from 0 -3, so the default branch in
[AMD Official Use Only - AMD Internal Distribution Only]
Thank you for your clarification.
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: Zhang, Jesse(Jie)
Sent: Tuesday, June 4, 2024 11:52 AM
To: Wang, Yang(Kevin) ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alex
On Mon, Jun 3, 2024 at 12:24 AM Ilpo Järvinen
wrote:
>
> On Sun, 2 Jun 2024, Andy Shevchenko wrote:
>
> > On Fri, May 31, 2024 at 02:31:45PM -0700, Chia-I Wu wrote:
> > > On Fri, May 31, 2024 at 1:57 AM Andy Shevchenko <
> > > andriy.shevche...@linux.intel.com> wrote:
> > > > On Thu, May 30, 2024
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Christian,
Thanks for your comments, the RREG32_SOC15() macro should return the 32bit wide
value so it couldn't need the mask.
And I will send out v2 patch to modify the commit message and use uint32_t or
u32 instead .
Regards,
Bob
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