fix typo "info.ue_count" in amdgpu_ras_aca_sysfs_read() function.
Fixes: edd67b5417f5 ("drm/amdgpu: add aca deferred error type support")
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Tao Zhou
> -Original Message-
> From: Wang, Yang(Kevin)
> Sent: Monday, May 27, 2024 3:47 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking ; Zhou1, Tao
> ; Chai, Thomas
> Subject: [PATCH] drm/amdgpu: fix t
Am 27.05.24 um 03:20 schrieb Zhouyi Zhou:
In r100_cp_init_microcode, if rdev->family don't match any of
if statement, fw_name will be NULL, which will cause
gcc (11.4.0 powerpc64le-linux-gnu) complain:
In function ‘r100_cp_init_microcode’,
inlined from ‘r100_cp_init’ at drivers/gpu/drm/rad
If the lid on a laptop is closed when eDP connectors are populated
then it remains enabled when the initial framebuffer configuration
is built.
When creating the initial framebuffer configuration detect the ACPI
lid status and if it's closed disable any eDP connectors.
Suggested-by: Alex Deucher
On 5/24/24 06:18, Alex Deucher wrote:
On Fri, May 24, 2024 at 9:17 AM Alex Deucher wrote:
On Fri, May 24, 2024 at 5:16 AM Guenter Roeck wrote:
Hi,
On Fri, Mar 29, 2024 at 12:18:28AM -0700, Samuel Holland wrote:
Now that all previously-supported architectures select
ARCH_HAS_KERNEL_FPU_SUP
On 5/24/24 06:18, Alex Deucher wrote:
On Fri, May 24, 2024 at 9:17 AM Alex Deucher wrote:
On Fri, May 24, 2024 at 5:16 AM Guenter Roeck wrote:
Hi,
On Fri, Mar 29, 2024 at 12:18:28AM -0700, Samuel Holland wrote:
Now that all previously-supported architectures select
ARCH_HAS_KERNEL_FPU_SUP
In r100_cp_init_microcode, if rdev->family don't match any of
if statement, fw_name will be NULL, which will cause
gcc (11.4.0 powerpc64le-linux-gnu) complain:
In function ‘r100_cp_init_microcode’,
inlined from ‘r100_cp_init’ at drivers/gpu/drm/radeon/r100.c:1136:7:
./include/linux/printk.h:4
On 2024-05-23 17:52, Alex Deucher wrote:
> On Thu, May 23, 2024 at 9:05 AM Tasos Sahanidis wrote:
>>
>> Dyanmically sized arrays used [1] instead of []. Replacing the former
>> with the latter resolves multiple warnings observed on boot with a
>> BONAIRE card.
>>
>> Signed-off-by: Tasos Sahanidis
On Mon, 27 May 2024, Geert Uytterhoeven wrote:
Below is the list of build error/warning regressions/improvements in
v6.10-rc1[1] compared to v6.9[2].
Summarized:
- build errors: +27/-20
- build warnings: +3/-1601
Happy fixing! ;-)
Thanks to the linux-next team for providing the build service
On 5/24/24 06:43, Guenter Roeck wrote:
On 5/24/24 06:18, Alex Deucher wrote:
On Fri, May 24, 2024 at 9:17 AM Alex Deucher wrote:
On Fri, May 24, 2024 at 5:16 AM Guenter Roeck wrote:
Hi,
On Fri, Mar 29, 2024 at 12:18:28AM -0700, Samuel Holland wrote:
Now that all previously-supported arch
Am 23.05.24 um 21:48 schrieb Alex Deucher:
It was an enablement vehicle for MES 11 and was never
productized. Remove it.
v2: drop additional checks in the GFX10 code.
v3: drop mes_api_def.h
Signed-off-by: Alex Deucher
Acked-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/Makefile
On Mon, May 27, 2024 at 10:32 AM Mario Limonciello
wrote:
>
> If the lid on a laptop is closed when eDP connectors are populated
> then it remains enabled when the initial framebuffer configuration
> is built.
>
> When creating the initial framebuffer configuration detect the ACPI
> lid status and
On Mon, May 27, 2024 at 5:42 AM Tasos Sahanidis wrote:
>
> On 2024-05-23 17:52, Alex Deucher wrote:
> > On Thu, May 23, 2024 at 9:05 AM Tasos Sahanidis wrote:
> >>
> >> Dyanmically sized arrays used [1] instead of []. Replacing the former
> >> with the latter resolves multiple warnings observed o
On 2024-05-23 15:20, Aurabindo Pillai wrote:
> Allocate some memory, send the address in chunks to dmub, and finally
> ask it to copy the bounding box data into the newly allocated memory.
>
> Signed-off-by: Aurabindo Pillai
The entire series is
Acked-by: Harry Wentland
Harry
> ---
> .../
From: Nicholas Kazlauskas
[ Upstream commit f30a3bea92bdab398531129d187629fb1d28f598 ]
[WHY]
PSP can access DCN registers during command submission and we need
to ensure that DCN is not in PG before doing so.
[HOW]
Add a callback to DM to lock and notify DC for idle optimization exit.
It can't
From: Nicholas Kazlauskas
[ Upstream commit b5b6d6251579a29dafdad25f4bc7f3ff7bfd2c86 ]
[Why]
Cursor update can be pre-empted by a request for setting target flip
submission.
This causes an issue where we're in the middle of the exit sequence
trying to log to DM, but the pre-emption starts anoth
From: "Xi (Alex) Liu"
[ Upstream commit de2d1105a3757742b45b0d8270b3c8734cd6b6f8 ]
[Why and how]
External display has corruption because no root clock control function. Add the
function pointer to fix the issue.
Reviewed-by: Daniel Miess
Reviewed-by: Nicholas Kazlauskas
Acked-by: Roman Li
From: Nicholas Kazlauskas
[ Upstream commit f30a3bea92bdab398531129d187629fb1d28f598 ]
[WHY]
PSP can access DCN registers during command submission and we need
to ensure that DCN is not in PG before doing so.
[HOW]
Add a callback to DM to lock and notify DC for idle optimization exit.
It can't
From: Nicholas Kazlauskas
[ Upstream commit b5b6d6251579a29dafdad25f4bc7f3ff7bfd2c86 ]
[Why]
Cursor update can be pre-empted by a request for setting target flip
submission.
This causes an issue where we're in the middle of the exit sequence
trying to log to DM, but the pre-emption starts anoth
From: "Xi (Alex) Liu"
[ Upstream commit de2d1105a3757742b45b0d8270b3c8734cd6b6f8 ]
[Why and how]
External display has corruption because no root clock control function. Add the
function pointer to fix the issue.
Reviewed-by: Daniel Miess
Reviewed-by: Nicholas Kazlauskas
Acked-by: Roman Li
From: Nicholas Kazlauskas
[ Upstream commit f30a3bea92bdab398531129d187629fb1d28f598 ]
[WHY]
PSP can access DCN registers during command submission and we need
to ensure that DCN is not in PG before doing so.
[HOW]
Add a callback to DM to lock and notify DC for idle optimization exit.
It can't
From: Nicholas Kazlauskas
[ Upstream commit f30a3bea92bdab398531129d187629fb1d28f598 ]
[WHY]
PSP can access DCN registers during command submission and we need
to ensure that DCN is not in PG before doing so.
[HOW]
Add a callback to DM to lock and notify DC for idle optimization exit.
It can't
From: Nicholas Kazlauskas
[ Upstream commit f30a3bea92bdab398531129d187629fb1d28f598 ]
[WHY]
PSP can access DCN registers during command submission and we need
to ensure that DCN is not in PG before doing so.
[HOW]
Add a callback to DM to lock and notify DC for idle optimization exit.
It can't
From: Nicholas Kazlauskas
[ Upstream commit f30a3bea92bdab398531129d187629fb1d28f598 ]
[WHY]
PSP can access DCN registers during command submission and we need
to ensure that DCN is not in PG before doing so.
[HOW]
Add a callback to DM to lock and notify DC for idle optimization exit.
It can't
Add extra flag definition for ids_flag field to distinguish
between vf/pf/pt modes
v2: Updated kms driver minor version & removed pf check as default is 0
Signed-off-by: Asad Kamal
Reviewed-by: Lijo Lazar
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_k
On 2024-05-24 10:08, Alex Deucher wrote:
With commit 89773b85599a
("drm/amdkfd: Let VRAM allocations go to GTT domain on small APUs")
big and small APU "VRAM" handling in KFD was unified. Since AMD_IS_APU
is set for both big and small APUs, we can simplify the checks in
the code.
v2: clean up a
On 2024-05-22 15:15, Rajneesh Bhardwaj wrote:
On GFXIP9.4.3, make CPX mode as the default compute mode if the node is
setup in NPS4 memory partition mode. This change is only applicable for
dGPU, for APU, continue to use TPX mode.
Cc: Lijo Lazar
Signed-off-by: Rajneesh Bhardwaj
Reviewed-by:
flush_gpu_tlb may be called from another thread while
device_gpu_recover is running.
Both of these threads access registers through the VF
RLCG interface during VF Full Access. Add a lock around this interface
to prevent race conditions between these threads.
Signed-off-by: Victor Skvortsov
---
On Mon, May 27, 2024 at 3:22 PM Felix Kuehling wrote:
>
> On 2024-05-24 10:08, Alex Deucher wrote:
> > With commit 89773b85599a
> > ("drm/amdkfd: Let VRAM allocations go to GTT domain on small APUs")
> > big and small APU "VRAM" handling in KFD was unified. Since AMD_IS_APU
> > is set for both bi
Add estimate of how much vram we need to reserve for RAS
when caculating the total available vram.
Signed-off-by: Hawking Zhang
---
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 9 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c| 18 ++
drivers/gpu/drm/amd/amdgpu/am
[AMD Official Use Only - AMD Internal Distribution Only]
> -Original Message-
> From: amd-gfx On Behalf Of Hawking
> Zhang
> Sent: Tuesday, May 28, 2024 10:21 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhou1, Tao ; Kuehling, Felix
> ; Kasiviswanathan, Harish
> ; Zhang, Hawking
>
> Subj
Hi Maintainers,
There are some flaky tests reported for amdgpu driver testing in drm-ci.
# Board Name: hp-11A-G6-EE-grunt
# IGT Version: 1.28-g0df7b9b97
# Linux Version: 6.9.0-rc7
# Failure Rate: 50
kms_async_flips@async-flip-with-page-flip-events
kms_async_flips@crc
kms_plane@pixel-format-sourc
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Tao,
We don't plan to apply the change to gfx adapters. And it's only applicable to
aldebran and aqua_vanjaram. I will add back aldebran in v2.
Regards,
Hawking
-Original Message-
From: Zhou1, Tao
Sent: Tuesday, May 28, 2024
Add estimate of how much vram we need to reserve for RAS
when caculating the total available vram.
v2: apply the change to MP0 v13_0_2 and v13_0_14
Signed-off-by: Hawking Zhang
---
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 9 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 20 +
[AMD Official Use Only - AMD Internal Distribution Only]
I prefer to add comment for AMDGPU_RAS_RESERVED_VRAM_SIZE to explain the value
of 16MB, anyway the patch is:
Reviewed-by: Tao Zhou
> -Original Message-
> From: Zhang, Hawking
> Sent: Tuesday, May 28, 2024 1:57 PM
> To: amd-gfx@l
[AMD Official Use Only - AMD Internal Distribution Only]
Thanks Tao. Yes, I added the comments to amdgpu_ras.h.
+/* Reserve 8 physical dram row for possible retirement.
+ * In worst cases, it will lose 8 * 2MB memory in vram domain */
+#define AMDGPU_RAS_RESERVED_VRAM_SIZE (16ULL << 20)
Regards
This commit adds null checks for the 'stream' and 'plane' variables in
the dcn30_apply_idle_power_optimizations function. These variables were
previously assumed to be null at line 922, but they were used later in
the code without checking if they were null. This could potentially lead
to a null po
This commit ensures that an error code -EINVAL is set in the
amdgpu_od_set_init function when the od_kobj_list has only one entry,
indicating that the list is not in the expected state.
Fixes the below:
drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_pm.c:4355 amdgpu_od_set_init() warn:
missing error cod
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