Am 22.05.24 um 19:27 schrieb Yunxiang Li:
Random accesses to the GPU while it is not re-initialized can lead to a
bad time. So add a rwsem to prevent such accesses. Normal accesses will
now take the read lock for shared GPU access, reset takes the write lock
for exclusive GPU access.
Care need t
Am 23.05.24 um 08:13 schrieb Jesse Zhang:
The pointer parent may be NULLed by the function amdgpu_vm_pt_parent.
To make the code more robust, check the pointer parent.
No that doesn't make any sense.
When parent is NULL here we should probably call BUG() instead.
Regards,
Christian.
Signed
The pointer parent may be NULLed by the function amdgpu_vm_pt_parent.
To make the code more robust, check the pointer parent.
V2: When parent is NULL here we should
probably call BUG() instead. (Christian)
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c | 8 +++-
1
Am 23.05.24 um 10:07 schrieb Jesse Zhang:
The pointer parent may be NULLed by the function amdgpu_vm_pt_parent.
To make the code more robust, check the pointer parent.
V2: When parent is NULL here we should
probably call BUG() instead. (Christian)
Signed-off-by: Jesse Zhang
---
drivers/gpu
The pointer parent may be NULLed by the function amdgpu_vm_pt_parent.
To make the code more robust, check the pointer parent.
Signed-off-by: Jesse Zhang
Suggested-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff -
This commit refactors the sysfs attribute management functions
(`amdgpu_device_attr_create`, `amdgpu_device_attr_remove`,
`amdgpu_device_attr_create_groups`, `amdgpu_device_attr_remove_groups`)
into `amdgpu_sysfs.c`, which were originally in `amdgpu_pm.c`. This
change allows these functions to be r
On Thu, 23 May 2024 at 09:07, Vignesh Raman wrote:
>
> Hi Dmitry,
>
> On 20/05/24 16:13, Dmitry Baryshkov wrote:
> > On Fri, May 17, 2024 at 02:54:57PM +0530, Vignesh Raman wrote:
> >> zlib.net is not allowing tarball download anymore and results
> >> in below error in kernel+rootfs_arm32 containe
Set the flag to true if bad page number reaches threshold.
Signed-off-by: Tao Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c| 7 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 10 ++
drivers/gpu/drm/amd/amdgpu/am
Check RMA status in bad page retirement flow.
Signed-off-by: Tao Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 16 +---
drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c | 7 +++
2 files changed, 16 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> -Original Message-
> From: dri-devel On Behalf Of Jani
> Nikula
> Sent: Friday, May 10, 2024 8:38 PM
> To: dri-de...@lists.freedesktop.org
> Cc: amd-gfx@lists.freedesktop.org; nouv...@lists.freedesktop.org; intel-
> g...@lists.freedesktop.org; Nikula, Jani
> Subject: [RESEND 5/6] drm/ed
> -Original Message-
> From: dri-devel On Behalf Of Jani
> Nikula
> Sent: Friday, May 10, 2024 8:38 PM
> To: dri-de...@lists.freedesktop.org
> Cc: amd-gfx@lists.freedesktop.org; nouv...@lists.freedesktop.org; intel-
> g...@lists.freedesktop.org; Nikula, Jani
> Subject: [RESEND 6/6] drm/co
[AMD Official Use Only - AMD Internal Distribution Only]
> > +void amdgpu_lock_hw_access(struct amdgpu_device *adev); void
> > +amdgpu_unlock_hw_access(struct amdgpu_device *adev); int
> > +amdgpu_begin_hw_access(struct amdgpu_device *adev); void
> > +amdgpu_end_hw_access(struct amdgpu_device *ade
Looked through the patch series from Andri Yngvason and that does
exactly what I wanted in the first place. I think that the patch
series should be encouraged to be merged in as fast as possible.
For the patch I have submitted, it stands on its own, since the patch
series from Andri Yngvason does
To be perfectly honest with you, I haven't given that much though. I
used the 'bpc' and 'colorspace' property in debugfs, since I could not
find that information anywhere else. And since I also needed to verify
the pixel encoding being used, I added it where those other values
were. That made for a
On Tue, May 21, 2024 at 02:39:06PM +0500, Mikhail Gavrilov wrote:
> Hi,
> Yesterday on the fresh kernel snapshot
> I spotted a new bug message with follow stacktrace:
> [4.307097] BUG: sleeping function called from invalid context at
> kernel/locking/mutex.c:585
> [4.307135] in_atomic(): 1,
Dyanmically sized arrays used [1] instead of []. Replacing the former
with the latter resolves multiple warnings observed on boot with a
BONAIRE card.
Signed-off-by: Tasos Sahanidis
---
drivers/gpu/drm/amd/include/pptable.h | 24
1 file changed, 12 insertions(+), 12 dele
On 2024-05-22 09:25:54, Dmitry Baryshkov wrote:
> This panel driver uses DSC PPS functions and as such depends on the
> DRM_DISPLAY_DP_HELPER. Select this symbol to make required functions
Here and in the title: maybe this is a remnant from v2, but you split out a
DRM_DISPLAY_DSC_HELPER and should
On Mon, 13 May 2024, Alex Deucher wrote:
> On Mon, May 13, 2024 at 8:20 AM Jani Nikula wrote:
>>
>> On Fri, 10 May 2024, Alex Deucher wrote:
>> > On Fri, May 10, 2024 at 11:17 AM Jani Nikula wrote:
>> > Series is:
>> > Acked-by: Alex Deucher
>>
>> Thanks, do you want to pick these up via your
Am 23.05.24 um 11:16 schrieb Jesse Zhang:
The pointer parent may be NULLed by the function amdgpu_vm_pt_parent.
To make the code more robust, check the pointer parent.
Signed-off-by: Jesse Zhang
Suggested-by: Christian König
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/am
[AMD Official Use Only - AMD Internal Distribution Only]
> -Original Message-
> From: amd-gfx On Behalf Of Tao Zhou
> Sent: Thursday, May 23, 2024 6:02 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhou1, Tao
> Subject: [PATCH 1/2] drm/amdgpu: add RAS is_rma flag
>
> Set the flag to true
On 2024-05-08 17:45, Mario Limonciello wrote:
MST colorspace property support was disabled due to a series of warnings
that came up when the device was plugged in since the properties weren't
made at device creation. Create the properties in advance instead.
Suggested-by: Ville Syrjälä
Fixes: 6
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 3689b0ef08b70e4e03b82ebd37730a03a672853a Add linux-next specific
files for 20240523
Unverified Error/Warning (likely false positive, please contact us if
interested):
drivers/gpu/drm/xe
Source and binary have become mismatched during branch activity.
Signed-off-by: Jay Cornwall
Cc: Lancelot Six
---
.../gpu/drm/amd/amdkfd/cwsr_trap_handler.h| 57 ---
1 file changed, 24 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.
Newer assemblers reject S_WAITCNT. All instances of S_WAITCNT can be
replaced by S_WAITCNT 0 (< gfx12) or S_WAIT_IDLE (>= gfx12) since
there is no concurrency of different memory instruction classes.
Signed-off-by: Jay Cornwall
Cc: Lancelot Six
---
.../gpu/drm/amd/amdkfd/cwsr_trap_handler.h
Fix LDS size interpretation: 512 bytes (>= gfx12) vs 256 (< gfx12).
Ensure STATE_PRIV.BARRIER_COMPLETE cannot change after reading or
before writing. Other waves in the threadgroup may cause this field
to assert if they complete the barrier.
Do not overwrite EXCP_FLAG_PRIV.{SAVE_CONTEXT,HOST_TRAP
On Thu, May 23, 2024 at 9:05 AM Tasos Sahanidis wrote:
>
> Dyanmically sized arrays used [1] instead of []. Replacing the former
> with the latter resolves multiple warnings observed on boot with a
> BONAIRE card.
>
> Signed-off-by: Tasos Sahanidis
> ---
> drivers/gpu/drm/amd/include/pptable.h |
Am 23.05.24 um 13:36 schrieb Li, Yunxiang (Teddy):
[AMD Official Use Only - AMD Internal Distribution Only]
+void amdgpu_lock_hw_access(struct amdgpu_device *adev); void
+amdgpu_unlock_hw_access(struct amdgpu_device *adev); int
+amdgpu_begin_hw_access(struct amdgpu_device *adev); void
+amdgpu_e
We have messages when the VCN fails to initialize and
there is no need to report on success.
Also PSP loading FWs is the default for production.
Signed-off-by: David (Ming Qiang) Wu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 1 -
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c | 3 ---
drivers/gp
[Public]
> > Here is taking a different lock than the reset_domain->sem. It is a
> > seperate reset_domain->gpu_sem that is only locked when we will actuall do
> > reset, it is not taken in the skip_hw_reset path.
>
> Exactly that is what you should *not* do. Please don't add any new lock to
>
[AMD Official Use Only - AMD Internal Distribution Only]
Please see my question inline below.
Thanks,
Ruijing
-Original Message-
From: Wu, David
Sent: Thursday, May 23, 2024 11:05 AM
To: amd-gfx@lists.freedesktop.org; Koenig, Christian
Cc: Deucher, Alexander ; Liu, Leo ;
Jiang, Sonny
On Wed, May 22, 2024 at 12:58 AM Armin Wolf wrote:
>
> Am 20.05.24 um 18:22 schrieb Alex Deucher:
>
> > On Sat, May 18, 2024 at 8:17 PM Armin Wolf wrote:
> >> Am 17.05.24 um 03:30 schrieb Barry Kauler:
> >>
> >>> Armin, Yifan, Prike,
> >>> I will top-post, so you don't have to scroll down.
> >>>
Am 23.05.24 um 15:13 schrieb Barry Kauler:
On Wed, May 22, 2024 at 12:58 AM Armin Wolf wrote:
Am 20.05.24 um 18:22 schrieb Alex Deucher:
On Sat, May 18, 2024 at 8:17 PM Armin Wolf wrote:
Am 17.05.24 um 03:30 schrieb Barry Kauler:
Armin, Yifan, Prike,
I will top-post, so you don't have to
Since commit a61ddb4393ad ("drm: enable (most) W=1 warnings by default
across the subsystem"), most of the extra warnings in the driver
Makefile are redundant. Remove them.
Note that -Wmissing-declarations and -Wmissing-prototypes are always
enabled by default in scripts/Makefile.extrawarn.
Signe
Enabling -Wformat-truncation yields the following warning:
../drivers/gpu/drm/imx/ipuv3/imx-ldb.c: In function ‘imx_ldb_probe’:
../drivers/gpu/drm/imx/ipuv3/imx-ldb.c:658:57: error: ‘_sel’ directive output
may be truncated writing 4 bytes into a region of size between 3 and 13
[-Werror=format-tr
With the -Wformat-truncation warnings fixed, finish the job started in
commit a61ddb4393ad ("drm: enable (most) W=1 warnings by default across
the subsystem"), and enable that warning too.
Signed-off-by: Jani Nikula
---
Gut feeling says there are more issues, and my configs just don't catch
the
Enabling -Wformat-truncation yields the following warning:
../drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c: In function
‘amdgpu_gfx_kiq_init_ring’:
../drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c:332:61: error: ‘%d’ directive output
may be truncated writing between 1 and 10 bytes into a region of size bet
Since commit a61ddb4393ad ("drm: enable (most) W=1 warnings by default
across the subsystem"), most of the extra warnings in the driver
Makefile are redundant. Remove them.
Note that -Wmissing-declarations and -Wmissing-prototypes are always
enabled by default in scripts/Makefile.extrawarn.
Signe
Enabling -Wformat-truncation yields the following warning:
../drivers/gpu/drm/nouveau/nouveau_backlight.c: In function
‘nouveau_backlight_init’:
../drivers/gpu/drm/nouveau/nouveau_backlight.c:56:69: error: ‘%d’ directive
output may be truncated writing between 1 and 10 bytes into a region of siz
Jani Nikula (4):
drm/amdgpu: fix -Wformat-truncation warning in
amdgpu_gfx_kiq_init_ring()
drm/nouveau: fix -Wformat-truncation warning in
nouveau_backlight_init()
drm/imx: fix -Wformat-truncation warning in imx_ldb_probe()
drm: enable -Wformat-truncation across the subsystem
driv
Since commit a61ddb4393ad ("drm: enable (most) W=1 warnings by default
across the subsystem"), most of the extra warnings in the driver
Makefile are redundant. Remove them.
Note that -Wmissing-declarations and -Wmissing-prototypes are always
enabled by default in scripts/Makefile.extrawarn.
Signe
I'm sending these together, as they're related, and almost identical,
but I expect them to be merged individually to each driver.
BR,
Jani.
Jani Nikula (3):
drm/i915: drop redundant W=1 warnings from Makefile
drm/xe: drop redundant W=1 warnings from Makefile
drm/amdgpu: drop redundant W=1 w
please see in line.
On 2024-05-23 12:02, Dong, Ruijing wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
Please see my question inline below.
Thanks,
Ruijing
-Original Message-
From: Wu, David
Sent: Thursday, May 23, 2024 11:05 AM
To: amd-gfx@lists.freedesktop.org; Koen
[AMD Official Use Only - AMD Internal Distribution Only]
Thanks for the response, and it looks good to me.
Ruijing
-Original Message-
From: Wu, David
Sent: Thursday, May 23, 2024 12:55 PM
To: Dong, Ruijing ; Wu, David ;
amd-gfx@lists.freedesktop.org; Koenig, Christian
Cc: Deucher, Ale
[AMD Official Use Only - AMD Internal Distribution Only]
The patch is Reviewed-by: Sonny Jiang
Thanks,
Sonny
From: Dong, Ruijing
Sent: Thursday, May 23, 2024 12:58 PM
To: Wu, David ; amd-gfx@lists.freedesktop.org
; Koenig, Christian
Cc: Deucher, Alexander ; L
On Thu, May 23, 2024 at 06:51:08PM +0300, Jani Nikula wrote:
> Enabling -Wformat-truncation yields the following warning:
>
> ../drivers/gpu/drm/imx/ipuv3/imx-ldb.c: In function ‘imx_ldb_probe’:
> ../drivers/gpu/drm/imx/ipuv3/imx-ldb.c:658:57: error: ‘_sel’ directive output
> may be truncated wri
On Thu, May 23, 2024 at 11:51 AM Jani Nikula wrote:
>
> Enabling -Wformat-truncation yields the following warning:
>
> ../drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c: In function
> ‘amdgpu_gfx_kiq_init_ring’:
> ../drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c:332:61: error: ‘%d’ directive
> output may be
On Thu, May 23, 2024 at 11:32 AM Christian König
wrote:
>
> Am 23.05.24 um 13:36 schrieb Li, Yunxiang (Teddy):
> > [AMD Official Use Only - AMD Internal Distribution Only]
> >
> >>> +void amdgpu_lock_hw_access(struct amdgpu_device *adev); void
> >>> +amdgpu_unlock_hw_access(struct amdgpu_device *a
Series is:
Acked-by: Alex Deucher
On Thu, May 23, 2024 at 10:27 AM Jay Cornwall wrote:
>
> Source and binary have become mismatched during branch activity.
>
> Signed-off-by: Jay Cornwall
> Cc: Lancelot Six
> ---
> .../gpu/drm/amd/amdkfd/cwsr_trap_handler.h| 57 ---
> 1 fi
Hi Jay,
I have added a couple (minor) of comments below.
On 23/05/2024 15:08, Jay Cornwall wrote:
Fix LDS size interpretation: 512 bytes (>= gfx12) vs 256 (< gfx12).
Ensure STATE_PRIV.BARRIER_COMPLETE cannot change after reading or
before writing. Other waves in the threadgroup may cause this
With commit 89773b85599a
("drm/amdkfd: Let VRAM allocations go to GTT domain on small APUs")
big and small APU "VRAM" handling in KFD was unified. Since AMD_IS_APU
is set for both big and small APUs, we can simplify the checks in
the code.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amd
On 23/05/2024 15:08, Jay Cornwall wrote:
Source and binary have become mismatched during branch activity.
Signed-off-by: Jay Cornwall
Cc: Lancelot Six
Thanks for doing this.
This matches what I have when rebuilding the trap handlers.
Reviewed-by: Lancelot Six
---
.../gpu/drm/amd/am
On 23/05/2024 15:08, Jay Cornwall wrote:
Newer assemblers reject S_WAITCNT. All instances of S_WAITCNT can be
replaced by S_WAITCNT 0 (< gfx12) or S_WAIT_IDLE (>= gfx12) since
there is no concurrency of different memory instruction classes.
Signed-off-by: Jay Cornwall
Cc: Lancelot Six
Tha
Ping?
On Mon, May 20, 2024 at 2:52 PM Alex Deucher wrote:
>
> This reverts commit 28ebbb4981cb1fad12e0b1227dbecc88810b1ee8.
>
> Revert this commit as apparently the LLVM code to take advantage of
> this never landed.
>
> Signed-off-by: Alex Deucher
> Cc: Feifei Xu
> ---
> drivers/gpu/drm/amd/a
Ping?
On Thu, May 16, 2024 at 11:42 AM Alex Deucher wrote:
>
> Use current speed/width on devices which don't support
> dynamic PCIe switching.
>
> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3289
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 19
Ping?
On Thu, May 16, 2024 at 10:32 AM Alex Deucher wrote:
>
> Convert a variable sized array from [1] to [].
>
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/include/atomfirmware.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/include/a
Ping on this series?
Alex
On Mon, May 13, 2024 at 4:32 PM Alex Deucher wrote:
>
> Use correct ref/mask for differnent gfx ring pipe. Ported from
> ZhenGuo's patch for gfx10.
>
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 2 +-
> 1 file changed, 1 insertion(+),
Ping?
On Fri, May 10, 2024 at 7:37 PM Alex Deucher wrote:
>
> It was an enablement vehicle for MES 11 and was never
> productized. Remove it.
>
> v2: drop additional checks in the GFX10 code.
>
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/Makefile |1 -
> driv
From: "Arvindekar, Sridevi"
[Why]
Incorrect cursor position calculation in some scenarios. Also for
mirror and rotation cases.
[How]
Fix for incorrect cursor position. Added new test scenarios for diags
cursor test. Updated CRC for few of the diags cursor test scenarios.
Reviewed-by: Rodrigo
From: Samson Tam
[Why]
Enable sharpener support for DCN401
[How]
- Removed memcmp check that was preventing ISHARP from being enabled.
- Add missing ISHARP register defines, masks, and writes.
- Add programming of Blur and Scale coefficients.
- Program FMT_MODE and NLDELTA registers based on LLS
From: Rodrigo Siqueira
This commit removes some unused code with the required adjustments.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 -
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp.h | 2 +-
drivers/gpu/drm/amd/display/dc/d
From: Pinninti
[why]
cleaning up the code refactor requires hubp to be in its own component.
[how]
move all files under newly created hubp folder and fixing the makefiles.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Pinninti
---
drivers/gpu/drm/amd/display/dc/dcn401/Makefile | 1 -
Drop the extra HPD irq entry for DCN401.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
b/driver
DCN401 is using DCN 320 headers, which does not have all the right
registers for DCN401. This commit just replace DCN320 includes with the
one from DCN410.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c| 4 ++--
1
When ODM slice happens on DCN401, there is a null pointer exception
caused by that. This commit address this issue by checking if the
required data structures are initialized.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 8
All the DC_FP_START/END should be used before call anything from DML2,
for this reason, the use of those guards inside DML it is not correct.
This commit removes two unnecessary DC_FP_START/END from a dml2
function.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/d
New commands for enabling copy of DC bounding box values from VBIOS DMUB
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu/drm/a
Allocate some memory, send the address in chunks to dmub, and finally
ask it to copy the bounding box data into the newly allocated memory.
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 121 ++
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |
Move creation of CGS device node and the DAL allocation list from
amdgpu_dm_init() to dm_sw_init() which runs before dmub's sw init hook.
This is required for communicating with the VBIOS DMUB image from the
VBIOS that was loaded for early pre-os boot.
Signed-off-by: Aurabindo Pillai
---
.../gp
From: Rodrigo Siqueira
Signed-off-by: Rodrigo Siqueira
---
.../include/asic_reg/dcn/dcn_4_1_0_offset.h | 51 ++-
1 file changed, 50 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_4_1_0_offset.h
b/drivers/gpu/drm/amd/include/asic_reg/dc
On 5/23/2024 13:37, Lancelot SIX wrote:
@@ -622,8 +638,15 @@ L_SAVE_HWREG:
#if ASIC_FAMILY >= CHIP_GFX12
// Ensure no further changes to barrier or LDS state.
+ // STATE_PRIV.BARRIER_COMPLETE may change up to this point.
s_barrier_signal -2
s_barrier_wait -2
+
+ /
[AMD Official Use Only - AMD Internal Distribution Only]
File mes_api_def.h can also be removed. This is defined for gfx10.
One minor comment inline.
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Thursday, May 23, 2024 2:46 PM
To: Deucher, Alexander
Cc: amd-gfx@lists
On Thu, May 23, 2024 at 3:38 PM Kasiviswanathan, Harish
wrote:
>
> [AMD Official Use Only - AMD Internal Distribution Only]
>
> File mes_api_def.h can also be removed. This is defined for gfx10.
> One minor comment inline.
>
>
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Deuc
It was an enablement vehicle for MES 11 and was never
productized. Remove it.
v2: drop additional checks in the GFX10 code.
v3: drop mes_api_def.h
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/Makefile |1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 20 -
dri
Hi Jani,
On Thu, May 23, 2024 at 06:51:09PM +0300, Jani Nikula wrote:
> With the -Wformat-truncation warnings fixed, finish the job started in
> commit a61ddb4393ad ("drm: enable (most) W=1 warnings by default across
> the subsystem"), and enable that warning too.
>
> Signed-off-by: Jani Nikula
On 23/05/2024 20:31, Jay Cornwall wrote:
On 5/23/2024 13:37, Lancelot SIX wrote:
@@ -622,8 +638,15 @@ L_SAVE_HWREG:
#if ASIC_FAMILY >= CHIP_GFX12
// Ensure no further changes to barrier or LDS state.
+ // STATE_PRIV.BARRIER_COMPLETE may change up to this point.
s_barrier_sig
[AMD Official Use Only - AMD Internal Distribution Only]
I had one more comment. With that fixed this patch is Reviewed-by: Harish
Kasiviswanathan
static gfx_v10_0_ring_invalidate_tlbs() function can be removed since it is no
longer used.
Best Regards,
Harish
-Original Message-
From
[Public]
Hi Alex,
3 places are missed.
--- a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
@@ -1023,7 +1023,7 @@ int kgd2kfd_init_zone_device(struct amdgpu_device *adev)
if (amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(9, 0, 1))
Hi Dmitry,
On 23/05/24 15:29, Dmitry Baryshkov wrote:
On Thu, 23 May 2024 at 09:07, Vignesh Raman wrote:
Hi Dmitry,
On 20/05/24 16:13, Dmitry Baryshkov wrote:
On Fri, May 17, 2024 at 02:54:57PM +0530, Vignesh Raman wrote:
zlib.net is not allowing tarball download anymore and results
in bel
78 matches
Mail list logo
