if ras_manager obj null, don't print NBIO err data
Signed-off-by: Jesse Zhang
Suggested-by: Tim Huang
---
drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
i
Function hwmgr->hwmgr_func->get_num_of_pp_table_entries(hwmgr) returns a
negative number
Signed-off-by: Jesse Zhang
Suggested-by: Tim Huang
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/pp_psm.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm
[AMD Official Use Only - AMD Internal Distribution Only]
This patch is,
Reviewed-by: Tim Huang
> -Original Message-
> From: Jesse Zhang
> Sent: Monday, May 13, 2024 3:33 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Huang, Tim ; Zhang,
> Jess
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Jesse,
> -Original Message-
> From: Jesse Zhang
> Sent: Monday, May 13, 2024 3:34 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Huang, Tim ; Zhang,
> Jesse(Jie) ; Zhang, Jesse(Jie)
>
>
radeon_connector_edid() copies the EDID from edid_blob_ptr as a side
effect if radeon_connector->edid isn't initialized. However, everywhere
that the returned EDID is used, the EDID should have been set
beforehands.
Only the drm EDID code should look at the EDID property, anyway, so stop
using it.
amdgpu_connector_edid() copies the EDID from edid_blob_ptr as a side
effect if amdgpu_connector->edid isn't initialized. However, everywhere
that the returned EDID is used, the EDID should have been set
beforehands.
Only the drm EDID code should look at the EDID property, anyway, so stop
using it.
Accessing the EDID via edid_blob_ptr causes chicken-and-egg
problems. Keep edid_blob_ptr as the userspace interface that should be
accessed via dedicated functions.
Signed-off-by: Jani Nikula
---
include/drm/drm_connector.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a
Prefer the parsed results for is_hdmi and has_audio in display info over
calling drm_detect_hdmi_monitor() and drm_detect_monitor_audio(),
respectively.
Conveniently, this also removes the need to use edid_blob_ptr.
v2: Reverse a backwards if condition (Ilia)
Cc: Karol Herbst
Cc: Lyude Paul
Cc
I've sent this some moths ago, let's try again...
BR,
Jani.
Jani Nikula (6):
drm/nouveau: convert to using is_hdmi and has_audio from display info
drm/radeon: convert to using is_hdmi and has_audio from display info
drm/radeon: remove radeon_connector_edid() and stop using
edid_blob_ptr
No functional modification involved.
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn401/dcn401_resource.c:792
dcn401_i2c_hw_create() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn401/dcn401_resource.c:894
dcn401_hubp_create() warn: inconsistent indentin
Hi Marcelo,
On Sat, 11 May 2024 13:37:17 +1000 Stephen Rothwell
wrote:
>
> Thanks for doing this.
>
> I haven't tested it, but just a couple of little things:
>
> On Fri, 10 May 2024 21:02:02 -0300 Marcelo Mendes Spessoto Junior
> wrote:
> >
> > Fix most of the display documentation compile
Hi Marcelo,
Thanks for doing this.
I haven't tested it, but just a couple of little things:
On Fri, 10 May 2024 21:02:02 -0300 Marcelo Mendes Spessoto Junior
wrote:
>
> Fix most of the display documentation compile warnings by
> documenting struct mpc_funcs functions in dc/inc/hw/mpc.h file.
>
Prefer the parsed results for is_hdmi and has_audio in display info over
calling drm_detect_hdmi_monitor() and drm_detect_monitor_audio(),
respectively.
Cc: Alex Deucher
Cc: Christian König
Cc: Pan, Xinhui
Cc: amd-gfx@lists.freedesktop.org
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/radeon
Add a helper to get the EDID property for sysfs property show. This
hides all the edid_blob_ptr usage within drm_edid.c.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_crtc_internal.h | 2 ++
drivers/gpu/drm/drm_edid.c | 33 +
drivers/gpu/drm/drm_sysfs.c
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Tim,
-Original Message-
From: Huang, Tim
Sent: Monday, May 13, 2024 3:40 PM
To: Zhang, Jesse(Jie) ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
; Zhang, Jesse(Jie) ; Zhang,
Jesse(Jie)
Subject: RE:
Function hwmgr->hwmgr_func->get_num_of_pp_table_entries(hwmgr) returns a
negative number
Signed-off-by: Jesse Zhang
Suggested-by: Tim Huang
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/pp_psm.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/
[AMD Official Use Only - AMD Internal Distribution Only]
This patch is,
Reviewed-by: Tim Huang
> -Original Message-
> From: Jesse Zhang
> Sent: Monday, May 13, 2024 4:06 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Huang, Tim ; Zhang,
> Jess
On 12/05/2024 08:59, Arunpravin Paneer Selvam wrote:
Allocate cleared blocks in the bias range when the DRM
buddy's clear avail is zero. This will validate the bias
range allocation in scenarios like system boot when no
cleared blocks are available and exercise the fallback
path too. The resultin
[AMD Official Use Only - AMD Internal Distribution Only]
From: Frank Min
add initial value for gfx12 AGP aperture
Signed-off-by: Frank Min
---
drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
b/drivers/gpu/drm/a
optimize the code to avoid pass a null pointer (hwmgr->backend)
to function smu7_update_edc_leakage_table.
Signed-off-by: Ma Jun
---
.../drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 50 +--
1 file changed, 24 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powe
Check ras_manager before using it
Signed-off-by: Ma Jun
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 1dd13ed3b7b5..6da02a209890 100
Check handle pointer before using it
Signed-off-by: Ma Jun
---
drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
index 28febf33fb1b..e969a7d77b4d 1006
Check bo before using it
Signed-off-by: Ma Jun
---
drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
index 2b7b67916c1d..8269fd6828bf 100644
Remove dead code in amdgpu_ras_add_mca_err_addr
Signed-off-by: Ma Jun
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 13 -
1 file changed, 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 6da02a209890..0cf67923c0fc
[AMD Official Use Only - AMD Internal Distribution Only]
This patch was
Reviewed-by: Likun Gao .
Regards,
Likun
-Original Message-
From: Min, Frank
Sent: Monday, May 13, 2024 4:56 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
; Zhang, Hawking ; Gao, Li
This series adds APIs to get the supported PM policies and also set them. A PM
policy type is a predefined policy type supported by an SOC and each policy may
define two or more levels to choose from. A user can select the appropriate
level through amdgpu_dpm_set_pm_policy() or through sysfs node p
Add support to set/get information about different DPM policies. The
support is only available on SOCs which use swsmu architecture.
A DPM policy type may be defined with different levels. For example, a
policy may be defined to select Pstate preference and then later a
pstate preference may be ch
Add PMF message to select a Pstate policy in SOCs with SMU v13.0.6.
Signed-off-by: Lijo Lazar
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h | 3 ++-
drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 3 ++-
2 files changed, 4 insertions(
Add support to select pstate policy in SOCs with SMUv13.0.6
Signed-off-by: Lijo Lazar
Reviewed-by: Hawking Zhang
---
.../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c| 2 +
.../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 71 +++
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c| 30 +
On arcturus, allow changing xgmi plpd policy through pm_policy sysfs
interface.
Signed-off-by: Lijo Lazar
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 7 ++--
.../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 42 +++
2 files changed, 46 insertion
Add support to set XGMI PLPD policy levels through pm_policy sysfs node.
Signed-off-by: Lijo Lazar
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/include/kgd_pp_interface.h | 1 +
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 3 +++
2 files changed, 4 insertions(+)
diff --git a/drivers/
Replace the legacy interface with amdgpu_dpm_set_pm_policy to set XGMI
PLPD mode. Also, xgmi_plpd sysfs node is not used by any client. Remove
that as well.
Signed-off-by: Lijo Lazar
Reviewed-by: Hawking Zhang
---
v2: No change
v3: Rebase to remove device_attr_id__xgmi_plpd_policy
drivers/gpu/
On SOCs with SMU v13.0.6, allow changing xgmi plpd policy through
pm_policy sysfs interface.
Signed-off-by: Lijo Lazar
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 19 +--
.../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 51 +--
drivers/gpu/d
Remove unused callback to set PLPD policy and its implementation from
arcturus, aldebaran and SMUv13.0.6 SOCs.
Signed-off-by: Lijo Lazar
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 6 ---
.../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 22 ---
.../drm
On aldebaran, allow changing xgmi plpd policy through pm_policy sysfs
interface.
Signed-off-by: Lijo Lazar
Reviewed-by: Hawking Zhang
---
.../drm/amd/pm/swsmu/smu13/aldebaran_ppt.c| 35 +++
1 file changed, 35 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/ald
Add documentation about the newly added pm_policy node in sysfs.
Signed-off-by: Lijo Lazar
---
Documentation/gpu/amdgpu/thermal.rst | 6
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 48
2 files changed, 54 insertions(+)
diff --git a/Documentation/gpu/amdgpu/thermal.
On 5/13/2024 2:26 PM, Ma Jun wrote:
> Check ras_manager before using it
>
> Signed-off-by: Ma Jun
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 9 +++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> b/drivers/gpu/drm/amd
On 5/13/2024 2:26 PM, Ma Jun wrote:
> Check handle pointer before using it
>
> Signed-off-by: Ma Jun
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c | 6 +-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
> b/drivers/gpu/drm/amd/
On 5/10/2024 8:20 AM, Jesse Zhang wrote:
> Check for specific indexes that may be invalid values.
>
> Signed-off-by: Jesse Zhang
> ---
> drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_
On 5/13/2024 4:27 PM, Lazar, Lijo wrote:
>
>
> On 5/10/2024 8:20 AM, Jesse Zhang wrote:
>> Check for specific indexes that may be invalid values.
>>
>> Signed-off-by: Jesse Zhang
>> ---
>> drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> d
On 2024-05-09 13:05, Mario Limonciello wrote:
OLED panels don't support the ABM, they shouldn't offer the
panel_power_savings attribute to the user. Check whether aux BL
control support was enabled to decide whether to offer it.
Reported-by: Gergo Koteles
Closes: https://gitlab.freedesktop.org/
On 5/10/2024 8:20 AM, Jesse Zhang wrote:
> Check for specific indexes that may be invalid values.
>
> Signed-off-by: Jesse Zhang
> ---
> drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/
Am 10.05.24 um 04:50 schrieb Jesse Zhang:
check the pointer hive before use.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/
Am 10.05.24 um 20:12 schrieb Matthew Auld:
The driver release callback is called when a particular drm_device goes
away, just like with drmm, so here we should never nuke the pdev drvdata
pointer, since that could already be pointing to a new drvdata.
For example something hotunplugs the device,
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Leo Liu
> -Original Message-
> From: Wu, David
> Sent: Thursday, May 9, 2024 5:37 PM
> To: amd-gfx@lists.freedesktop.org; Deucher, Alexander
>
> Cc: Koenig, Christian ; Liu, Leo
> ; Jiang, Sonny
> Subject: [PATCH] d
Am 13.05.24 um 10:56 schrieb Ma Jun:
Check bo before using it
Signed-off-by: Ma Jun
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
b/dri
On Fri, 10 May 2024, Lyude Paul wrote:
> Reviewed-by: Lyude Paul
Thanks, how do you want to handle merging this?
BR,
Jani.
>
> On Fri, 2024-05-10 at 18:08 +0300, Jani Nikula wrote:
>> Prefer the parsed results for is_hdmi and has_audio in display info
>> over
>> calling drm_detect_hdmi_monito
On Fri, 10 May 2024, Alex Deucher wrote:
> On Fri, May 10, 2024 at 11:17 AM Jani Nikula wrote:
>>
>> I've sent this some moths ago, let's try again...
>>
>> BR,
>> Jani.
>>
>> Jani Nikula (6):
>> drm/nouveau: convert to using is_hdmi and has_audio from display info
>> drm/radeon: convert to u
Hi,
On 02.05.24 16:23, Maarten Lankhorst wrote:
Hey,
[snip]
For Xe, I've been loking at using cgroups. A small prototype is
available at
https://cgit.freedesktop.org/~mlankhorst/linux/log/?h=dumpcg
To stimulate discussion, I've added amdgpu support as well.
This should make it possible to is
On 09/05/2024 13:40, Tvrtko Ursulin wrote:
On 08/05/2024 19:09, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Last few days I was looking at the situation with VRAM over
subscription, what
happens versus what perhaps should happen. Browsing through the driver
and
running some simple experim
On Mon, May 13, 2024 at 8:20 AM Jani Nikula wrote:
>
> On Fri, 10 May 2024, Alex Deucher wrote:
> > On Fri, May 10, 2024 at 11:17 AM Jani Nikula wrote:
> >>
> >> I've sent this some moths ago, let's try again...
> >>
> >> BR,
> >> Jani.
> >>
> >> Jani Nikula (6):
> >> drm/nouveau: convert to u
Update the memory pointer from ip_dump to ipdump_core
to make it specific to core registers and rest other
registers to be dumped in their respective memories.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 2 +-
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 14 +++---
add support to dump registers of all instances of
cp registers in gfx10
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 1 +
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 117 +++-
2 files changed, 114 insertions(+), 4 deletions(-)
diff --git a/driver
add prints before and after during ip registers
dump. It avoids user to think of system being
stuck/hung as register dump takes time after a
gpu hang.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/
*** BLURB HERE ***
Sunil Khatri (4):
drm/amdgpu: update the ip_dump to ipdump_core
drm/amdgpu: Add support to dump gfx10 cp registers
drm/amdgpu: add support to dump gfx10 queue registers
drm/amdgpu: add prints while ip registr dump
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +
dri
Add gfx queue register for all instances in ip dump
for gfx10.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 1 +
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 86 +
2 files changed, 87 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu
Reviewed-by: Alex Deucher
On Mon, May 13, 2024 at 5:37 AM Gao, Likun wrote:
>
> [AMD Official Use Only - AMD Internal Distribution Only]
>
> This patch was
> Reviewed-by: Likun Gao .
>
> Regards,
> Likun
>
> -Original Message-
> From: Min, Frank
> Sent: Monday, May 13, 2024 4:56 PM
> To
On 09.05.24 11:19, Tvrtko Ursulin wrote:
On 08/05/2024 20:08, Friedrich Vock wrote:
On 08.05.24 20:09, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
The logic assumed any migration attempt worked and therefore would
over-
account the amount of data migrated during buffer re-validation. As a
con
[AMD Official Use Only - AMD Internal Distribution Only]
From: Frank Min
gfx12 query video mem channel/type/width from umc_info of atom list, so fix it
accordingly.
Signed-off-by: Frank Min
---
.../gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 263 ++
1 file changed, 148 insert
Hi Matthew,
On 5/13/2024 1:49 PM, Matthew Auld wrote:
On 12/05/2024 08:59, Arunpravin Paneer Selvam wrote:
Allocate cleared blocks in the bias range when the DRM
buddy's clear avail is zero. This will validate the bias
range allocation in scenarios like system boot when no
cleared blocks are av
From: Xiaogang Chen
This reverts 8a774fe912ff09e39c2d3a3589c729330113f388 "drm/amdgpu: avoid restore
process run into dead loop" since buffer got pined is not related whether it
needs mapping. And skip buffer validation at kfd driver if the buffer has been
pinned.
Signed-off-by: Xiaogang Chen
-
On 13/05/2024 16:11, Paneer Selvam, Arunpravin wrote:
Hi Matthew,
On 5/13/2024 1:49 PM, Matthew Auld wrote:
On 12/05/2024 08:59, Arunpravin Paneer Selvam wrote:
Allocate cleared blocks in the bias range when the DRM
buddy's clear avail is zero. This will validate the bias
range allocation in s
Am 10.05.24 um 10:50 schrieb Arunpravin Paneer Selvam:
This patch introduces new IOCTL for userqueue secure semaphore.
The signal IOCTL called from userspace application creates a drm
syncobj and array of bo GEM handles and passed in as parameter to
the driver to install the fence into it.
The
Am 13.05.24 um 06:14 schrieb Ori Messinger:
This patch adds 'ring hang' events to the driver.
This is done by adding a 'reset_ring_hang' bool variable to the
struct 'amdgpu_reset_context' in the amdgpu_reset.h file.
The purpose for this 'reset_ring_hang' variable is whenever a GPU
reset is initia
Am 10.05.24 um 10:50 schrieb Arunpravin Paneer Selvam:
Remove MES self test as this conflicts the userqueue fence
interrupts.
Please also completely remove the amdgpu_mes_self_test() function and
any now unused code.
Regards,
Christian.
Signed-off-by: Arunpravin Paneer Selvam
---
drive
Am 10.05.24 um 10:50 schrieb Arunpravin Paneer Selvam:
Add support to handle the userqueue protected fence signal hardware
interrupt.
Create a xarray which maps the doorbell index to the fence driver address.
This would help to retrieve the fence driver information when an userq fence
interrupt
On Fri, May 10, 2024 at 5:08 PM Jani Nikula wrote:
>
> Prefer the parsed results for is_hdmi and has_audio in display info over
> calling drm_detect_hdmi_monitor() and drm_detect_monitor_audio(),
> respectively.
>
> Cc: Alex Deucher
> Cc: Christian König
> Cc: Pan, Xinhui
> Cc: amd-gfx@lists.fr
On Mon, May 13, 2024 at 11:32 AM Min, Frank wrote:
>
> [AMD Official Use Only - AMD Internal Distribution Only]
>
> From: Frank Min
>
> gfx12 query video mem channel/type/width from umc_info of atom list, so fix
> it accordingly.
>
> Signed-off-by: Frank Min
Acked-by: Alex Deucher
> ---
> .
On Fri, May 10, 2024 at 5:08 PM Jani Nikula wrote:
>
> radeon_connector_edid() copies the EDID from edid_blob_ptr as a side
> effect if radeon_connector->edid isn't initialized. However, everywhere
> that the returned EDID is used, the EDID should have been set
> beforehands.
>
> Only the drm EDID
On Fri, May 10, 2024 at 5:09 PM Jani Nikula wrote:
>
> amdgpu_connector_edid() copies the EDID from edid_blob_ptr as a side
> effect if amdgpu_connector->edid isn't initialized. However, everywhere
> that the returned EDID is used, the EDID should have been set
> beforehands.
>
> Only the drm EDID
Am 09.05.24 um 20:40 schrieb David (Ming Qiang) Wu:
We do not directly enable/disable VCN IRQ in vcn 5.0.0.
And we do not handle the IRQ state as well. So the calls to
disable IRQ and set state are removed. This effectively gets
rid of the warining of
"WARN_ON(!amdgpu_irq_enabled(adev,
On 2024-05-13 13:11, Christian König wrote:
Am 09.05.24 um 20:40 schrieb David (Ming Qiang) Wu:
We do not directly enable/disable VCN IRQ in vcn 5.0.0.
And we do not handle the IRQ state as well. So the calls to
disable IRQ and set state are removed. This effectively gets
rid of the warining
Am 13.05.24 um 19:41 schrieb David Wu:
On 2024-05-13 13:11, Christian König wrote:
Am 09.05.24 um 20:40 schrieb David (Ming Qiang) Wu:
We do not directly enable/disable VCN IRQ in vcn 5.0.0.
And we do not handle the IRQ state as well. So the calls to
disable IRQ and set state are removed. Th
On 2024-05-13 13:43, Christian König wrote:
Am 13.05.24 um 19:41 schrieb David Wu:
On 2024-05-13 13:11, Christian König wrote:
Am 09.05.24 um 20:40 schrieb David (Ming Qiang) Wu:
We do not directly enable/disable VCN IRQ in vcn 5.0.0.
And we do not handle the IRQ state as well. So the cal
Am 09.05.24 um 22:41 schrieb Ori Messinger:
This patch adds 'ring hang' events to the driver.
This is done by adding a 'reset_ring_hang' bool variable to the
struct 'amdgpu_reset_context' in the amdgpu_reset.h file.
The purpose for this 'reset_ring_hang' variable is whenever a GPU
reset is initia
On Sat, May 11, 2024 at 12:22 AM Stephen Rothwell wrote:
>
> Hi Marcelo,
>
> On Sat, 11 May 2024 13:37:17 +1000 Stephen Rothwell
> wrote:
> >
> > Thanks for doing this.
> >
> > I haven't tested it, but just a couple of little things:
> >
> > On Fri, 10 May 2024 21:02:02 -0300 Marcelo Mendes Spes
Ping.
On Wed, May 8, 2024 at 3:42 PM Alex Deucher wrote:
>
> This fixes HDP flushes on systems with non-4K pages.
>
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/soc24.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/soc
Set up pipe1 as a high priority queue.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 36 ++
1 file changed, 25 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index c8
Use correct ref/mask for differnent gfx ring pipe. Ported from
ZhenGuo's patch for gfx10.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gpu/drm/amd/amdgp
Enable gfx pipe1 hardware support.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index d750ab86e4b27..96f441917b719
Ping?
On Thu, May 2, 2024 at 5:07 PM Alex Deucher wrote:
>
> Update documentation for RDNA3 dGPUs.
>
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/pm/amdgpu_pm.c | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> b/drivers/gpu/drm/am
They need a similar workaround.
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1839
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/si_dpm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
inde
They need a similar workaround.
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1839
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
b/drivers/gpu/d
[Public]
> -Original Message-
> From: Lazar, Lijo
> Sent: Monday, May 13, 2024 5:21 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking ; Deucher, Alexander
> ; Kamal, Asad ; Ma,
> Le
> Subject: [PATCH v3 10/10] Documentation/amdgpu: Add PM policy
> documentation
>
> Add document
[AMD Official Use Only - AMD Internal Distribution Only]
-Original Message-
From: Ma, Jun
Sent: Monday, May 13, 2024 4:56 PM
To: amd-gfx@lists.freedesktop.org
Cc: Feng, Kenneth ; Deucher, Alexander
; Wang, Yang(Kevin) ;
Koenig, Christian ; Ma, Jun
Subject: [PATCH 3/5] drm/amdgpu: Fix n
On 2024-05-13 11:18, Xiaogang.Chen wrote:
> From: Xiaogang Chen
>
> This reverts 8a774fe912ff09e39c2d3a3589c729330113f388 "drm/amdgpu: avoid
> restore
> process run into dead loop" since buffer got pined is not related whether it
Spelling: pined -> pinned
Same in the commit headline.
> ne
create a new helper function to avoid compiler 'side-effect'
check about RAS_EVENT_LOG() macro.
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 18 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 13 ++---
2 files changed, 24 insertions(+), 7 deletions
Hi Lijo & Kevin, thanks for review, will drop this patch
Regards,
Ma Jun
On 5/14/2024 7:13 AM, Wang, Yang(Kevin) wrote:
> [AMD Official Use Only - AMD Internal Distribution Only]
>
> -Original Message-
> From: Ma, Jun
> Sent: Monday, May 13, 2024 4:56 PM
> To: amd-gfx@lists.freedesktop.
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: YiPeng Chai
-
Best Regards,
Thomas
-Original Message-
From: amd-gfx On Behalf Of Ma Jun
Sent: Monday, May 13, 2024 4:56 PM
To: amd-gfx@lists.freedesktop.org
Cc: Feng, Kenneth ; Deucher, Alexander
; W
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: Ma, Jun
Sent: Monday, May 13, 2024 4:56 PM
To: amd-gfx@lists.freedesktop.org
Cc: Feng, Kenneth ; Deucher, Alexander
; Wang, Yang(Kevin) ;
Koenig, Christian ; M
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Christian,
-Original Message-
From: Christian König
Sent: Monday, May 13, 2024 7:41 PM
To: Zhang, Jesse(Jie) ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
; Huang, Tim
Subject: Re: [PATCH 01/22] dr
Check ras_manager before using it
Signed-off-by: Ma Jun
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 925ec65ac5ed..2bcf5c3b5d70 10064
Drop hard-code value of nsTmax because we read this
value from fantable below.
Signed-off-by: Ma Jun
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/process_pptables_v1_0.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/process_pptables_v1_0.c
b/drivers/g
On 5/14/2024 6:30 AM, Ma, Jun wrote:
> Hi Lijo & Kevin, thanks for review, will drop this patch
>
In the original function below check is there.
if (!handle || !info || type >= ACA_ERROR_TYPE_COUNT)
return -EINVAL;
So moving this to a later stage is still valid.
To avoid warning problems, drop index and
use PPSMC_MSG_GfxDriverReset instead of index for smu13.
Signed-off-by: Jesse Zhang
Suggested-by: Lijo Lazar
---
.../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 15 +--
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/driv
To avoid warning problems, drop index and
use PPSMC_MSG_GfxDriverReset instead of index for aldebaran.
Signed-off-by: Jesse Zhang
Suggested-by: Lijo Lazar
---
drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/dri
On 5/14/2024 11:34 AM, Jesse Zhang wrote:
> To avoid warning problems, drop index and
> use PPSMC_MSG_GfxDriverReset instead of index for aldebaran.
>
> Signed-off-by: Jesse Zhang
> Suggested-by: Lijo Lazar
> ---
> drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 13 +++--
> 1 fi
Add new gpu_metrics_v1_6 to acquire accumulated
throttler residencies
Signed-off-by: Asad Kamal
Reviewed-by: Lijo Lazar
---
.../gpu/drm/amd/include/kgd_pp_interface.h| 89 +++
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c| 3 +
2 files changed, 92 insertions(+)
diff --git
Use gpu_metrics_v1_6 for SMUv13.0.6 to fill gpu metric info
Signed-off-by: Asad Kamal
Reviewed-by: Lijo Lazar
---
.../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6
[AMD Official Use Only - AMD Internal Distribution Only]
Series is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Kamal, Asad
Sent: Tuesday, May 14, 2024 14:23
To: amd-gfx@lists.freedesktop.org
Cc: Lazar, Lijo ; Zhang, Hawking ;
Ma, Le ; Zhang, Morris ; Kamal, As
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