This DC patchset brings improvements in multiple areas. In summary, we have:
- Fix some problems reported by Coverity
- Fix idle optimization checks for multi-display and dual eDP
- Fix incorrect size calculation for loop
- Fix DSC-re-computing
- Add Replay capability and state in debugfs
- Refact
From: Leo Ma
[Why && How]
Copyright notice failed in the Palamida scan and make changes to
align with our guidelines.
Acked-by: Tom Chung
Signed-off-by: Leo Ma
---
drivers/gpu/drm/amd/display/Kconfig | 2 ++
.../drm/amd/display/dc/clk_mgr/dcn30/dcn30_smu11_driver_if.
From: Xi Liu
[Why and how]
Current 420 ODM combine will override debug settings.
Add support if debug settings is set for 420 ODM combine.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Tom Chung
Signed-off-by: Xi Liu
---
drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c | 2 +-
1 file ch
From: Revalla Hari Krishna
[why]
cleaning up the code refactor requires dccg to be in its own component.
[how]
move all files under newly created dccg folder and fixing the
makefiles.
Reviewed-by: Martin Leung
Acked-by: Tom Chung
Signed-off-by: Revalla Hari Krishna
---
drivers/gpu/drm/amd/d
[Why & How]
User can get the panel replay capability and state for debug.
sudo cat /sys/kernel/debug/dri/0/eDP-1/replay_capability
"Sink support: no" - if panel doesn't support Replay
"Sink support: yes" - if panel supports Replay
"Driver support: no\n" - if driver doesn't support Replay
"Driver s
From: Sreeja Golui
[Why]
Providing a mechanism to manipulate the pwm frequency on the
individual GPUs and monitor the transition during the switch.
[How]
Added a variable in dc_debug_options data structure. Using
this variable to call the newly added command on the firmware.
Reviewed-by: Harry
[Why & How]
Remove the panel replay initialization for DCN316.
Because currently DCN316 does not support the panel replay feature.
Reviewed-by: Wayne Lin
Acked-by: Tom Chung
Signed-off-by: Tom Chung
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 -
1 file changed, 1 deletion(-)
dif
From: Dillon Varone
[WHY]
Input mode for the DIG FIFO should be programmed as part of stream
encoder setup.
[HOW]
Pre-calculate the pixels per cycle as part of the pixel clock params,
and program as part of stream encoder setup.
Reviewed-by: Wenjing Liu
Acked-by: Tom Chung
Signed-off-by: Dill
From: Alex Hung
[WHY]
ENGINE_ID_UNKNOWN (-1) is not a valid eng_id and not a valid array
index.
[HOW]
Check whether eng_id is unknown to avoid access array with negative
array index.
This fixes 4 OVERRUN issues reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-
From: Alex Hung
[WHY & HOW]
tg_inst will be a negative if timing_generator_count equals 0, which
should be checked before used.
This fixes 2 OVERRUN issues reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/core/
From: Alex Hung
[WHY & HOW]
GPIO_ID_UNKNOWN (-1) is not a valid value for array index and therefore
should be checked in advance.
This fixes 5 OVERRUN issues reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/gpi
From: Hersen Wu
[WHY]
Coverity reports OVERRUN issues within amdgpu_dm
interrupt registers. Do not check index value before
access array. Do not check NULL pointer.
[HOW]
Add index value check for array. Add check for
pointer from amdgpu_dm_irq_register_interrupt.
Reviewed-by: Harry Wentland
A
From: Hersen Wu
[Why]
Coverity reports OVERRUN warning. Should abort amdgpu_dm
initialize.
[How]
Return failure to amdgpu_dm_init.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 -
1 file changed, 4 inse
From: Nicholas Susanto
[Why]
Underflow occurs when running Netflix in a 4k144 eDP + 4k60 HDMI FRL
setup. It is caused by latency varying based on the DCFCLK/FCLK state.
[How]
Enable urgent latency adjustment and match the reference to existing
ASIC that also see increased latency at low FCLK.
R
From: Agustin Gutierrez
[Why]
This fixes a bug introduced by change: c5365554514 "drm/amd/display: dsc
mst re-compute pbn for changes on hub".
The change caused light-up issues with a second display that required
DSC on some MST docks.
[How]
Use Virtual DPCD for DSC caps in MST case.
[Limitatio
From: Alex Hung
[WHY]
fe_clk_en has size of 5 but sizeof(fe_clk_en) has byte size 20 which is
lager than the array size.
[HOW]
Divide byte size 20 by its element size.
This fixes 2 OVERRUN issues reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
From: Hersen Wu
[Why]
Coverity report OVERRUN warning. There are
only max_links elements within dc->links. link
count could up to AMDGPU_DM_MAX_DISPLAY_INDEX 31.
[How]
Make sure link count less than max_links.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
driv
From: Samson Tam
[Why & How]
Split into a separate adjust and calculate call so
we can let the caller adjust recout
Reviewed-by: Jun Lei
Acked-by: Tom Chung
Signed-off-by: Samson Tam
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 23 +--
1 file changed, 16 insertions(+),
From: Alex Hung
aux_rd_interval has size of 7 and should be checked.
This fixes 3 OVERRUN and 1 INTEGER_OVERFLOW issues reported by Coverity.
Reviewed-by: Rodrigo Siqueira
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/dc/link/protocols/link_dp_training.c | 4 ++--
From: Hersen Wu
[Why & How]
ASSERT if return NULL from kcalloc.
Reviewed-by: Alex Hung
Reviewed-by: Rodrigo Siqueira
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
drivers/gpu/drm/amd/display/dc/link/protocols/link_dpcd.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm
From: Hersen Wu
[Why]
Coverity reports OVERRUN warning. Do not check if array
index valid.
[How]
Check msg_id valid and valid array index.
Reviewed-by: Alex Hung
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
.../drm/amd/display/modules/hdcp/hdcp_ddc.c | 28 ---
1 file c
From: Bhuvana Chandra Pinninti
[why]
cleaning up the code refactor requires hubp to be in its own component.
[how]
move all files under newly created hubp folder and fixing the makefiles.
Reviewed-by: Martin Leung
Acked-by: Tom Chung
Signed-off-by: Bhuvana Chandra Pinninti
---
drivers/gpu/d
From: Alex Hung
[WHY & HOW]
num_valid_sets needs to be checked to avoid a negative index when
accessing reader_wm_sets[num_valid_sets - 1].
This fixes an OVERRUN issue reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/disp
From: Alex Hung
This prevents accessing to negative index of link_encoders array.
This fixes an OVERRUN issue reported by Coverity.
Reviewed-by: Rodrigo Siqueira
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/link/link_factory.c | 2 +-
1 file changed, 1 ins
From: Alex Hung
[WHY & HOW]
HDCP_MESSAGE_ID_INVALID (-1) is not a valid msg_id nor is it a valid
array index, and it needs checking before used.
This fixes 4 OVERRUN issues reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd
From: Hersen Wu
[Why]
Coverity reports RESOURCE_LEAK warning. State memory
is not released if dm_create_color_properties fail.
[How]
Call kfree(state) before return.
Reviewed-by: Alex Hung
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
drivers/gpu/drm/amd/disp
From: Dillon Varone
[WHY & HOW]
Make enable and disable sequences symmetric.
Reviewed-by: Wenjing Liu
Acked-by: Tom Chung
Signed-off-by: Dillon Varone
---
drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/displa
From: Nicholas Kazlauskas
[Why]
Idle optimizations are blocked if there's more than one eDP connector
on the board - blocking S0i3 and IPS2 for static screen.
[How]
Fix the checks to correctly detect number of active eDP.
Also restrict the eDP support to panels that have correct feature
support.
From: Alex Hung
[WHY & HOW]
dc->links[] has max size of MAX_LINKS and NULL is return when trying to
access with out-of-bound index.
This fixes 3 OVERRUN and 1 RESOURCE_LEAK issues reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
drivers/gpu/
From: Agustin Gutierrez
[Why]
Some older MST hubs do not report DPCD registers according to
specification.
[How]
This change re-applies change: c5365554514 "drm/amd/display: dsc mst
re-compute pbn for changes on hub".
With an additional check for these older MST devices.
Reviewed-by: Swapnil Pa
From: Hersen Wu
[Why]
Coverity reports NULL_RETURN warning.
[How]
Add otg_master NULL check.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/
From: Hersen Wu
[Why]
For substrcation, coverity reports integer overflow
warning message when variable type is uint32_t.
[How]
Change varaible type to int32_t.
Reviewed-by: Alex Hung
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
drivers/gpu/drm/amd/display/d
From: Alvin Lee
This reverts commit 2147d93a90cc ("drm/amd/display: Only program P-State force
if pipe config changed")
Which causes regression.
Reviewed-by: Samson Tam
Acked-by: Tom Chung
Signed-off-by: Alvin Lee
---
.../amd/display/dc/hwss/dcn32/dcn32_hwseq.c| 18 +-
1
From: Wenjing Liu
[why]
Switching between DSC clock or disable DSC block are not double buffered update.
Corruption is observed if these updates happen before DSC double buffered
disconnection.
[how]
Move DSC disable and refclk reset to post unlock update. Wait for DSC double
buffered
disconnec
From: Hersen Wu
[Why]
For subtraction, coverity reports integer overflow
warning message when variable type is uint32_t.
[How]
Change variable type to int32_t.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c | 4
From: Hersen Wu
[Why & How]
Check return pointer of kzalloc before using it.
Reviewed-by: Alex Hung
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
.../gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c| 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/displ
From: Hersen Wu
[Why]
Coverity reports OVERRUN warning for
CalculateSwathAndDETConfiguration_params->hw_debug5
= &s->dummy_boolean[2].
bool dummy_boolean[2] is defined within
struct dml2_core_calcs_mode_support_locals.
[How]
Change array size from 2 to 3.
Reviewed-by: Aurabindo Pillai
Acked-by
From: Hersen Wu
[Why]
Coverity reports RESOURCE_LEAK for some implemenations
of clock_source_create. Do not release memory of clk_src
if contructor fails.
[How]
Free clk_src if contructor fails.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Hersen Wu
---
.../gpu/drm/amd/dis
From: Alex Hung
[WHAT & HOW]
Check clk table's array size to avoid out-of-bound memory accesses.
This fixes two OVERRUN issues reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c |
From: Alex Hung
[WHY & HOW]
A read of acrtc_attach->base.state->event was not locked so moving it
inside the spinlock.
This fixes a LOCK_EVASION issue reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/amdgpu_dm/amd
From: Alex Hung
[WHY & HOW]
ctx->architecture determine array sizes of ODMMode and DPPPerSurface
arrays to __DML2_WRAPPER_MAX_STREAMS_PLANES__ or __DML_NUM_PLANES__,
and these array index should be checked before used
This fixes 2 OVERRUN issues reported by Coverity.
Reviewed-by: Harry Wentland
From: Alex Hung
[Why]
dc_clk_table->entries has size of MAX_NUM_DPM_LVL(=8), but the loop
counter i can go up to DML_MAX_CLK_TABLE_SIZE(=20) - 1.
[How]
The loop should be min(DML_MAX_CLK_TABLE_SIZE, MAX_NUM_DPM_LVL) - 1
instead.
This fixes 21 OVERRUN issues reported by Coverity.
Reviewed-by: H
From: Hersen Wu
[Why]
For addtion (uint8_t) variable + constant 1,
coverity generates message below:
Truncation due to cast operation on "cur_idx + 1" from
32 to 8 bits.
Then Coverity assume result is 32 bits value be saved into
8 bits variable. When result is used as index to access
array, Cove
From: Anthony Koo
- Implement command interface to query ABM SW algorithm and
HW caps. This is primarily intended as a debugging interface
- Add new definitions for max number of histogram bins and ABM
curve segments available in hardware
- Add structures to retrieve caps to describe A
From: Alex Hung
[Why & How]
dml_stream_idx will be -1 when it is not found. Check and skip in such a
case as -1 is not a valid array index.
This fixes a NEGATIVE_RETURNS issue reported by Coverity.
Reviewed-by: Harry Wentland
Acked-by: Tom Chung
Signed-off-by: Alex Hung
---
drivers/gpu/drm/
From: Aric Cyr
This version brings along following fixes:
- Fix some problems reported by Coverity
- Fix idle optimization checks for multi-display and dual eDP
- Fix incorrect size calculation for loop
- Fix DSC-re-computing
- Add Replay capability and state in debugfs
- Refactor DCCG into compo
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specific
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specific
On 4/30/2024 1:29 PM, Rodrigo Vivi wrote:
> On Tue, Apr 30, 2024 at 05:38:02PM +, Easwar Hariharan wrote:
>> I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
>> with more appropriate terms. Inspired by and following on to Wolfram's
>> series to fix drivers/i2c/[1], f
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specific
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specific
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specific
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specific
On Mon, Apr 29, 2024 at 1:39 PM Jim Cromie wrote:
>
> Tell the compiler about our vectors (array,length), in 2 places:
>
these are not flex-arrays, using counted-by is wrong here.
Ive dropped this commit, series rebases clean wo it.
> h: struct _ddebug_info, which keeps refs to the __dyndbg_*
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specific
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of the
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the spec
On 30/04/2024 01:31, Felix Kuehling wrote:
On 2024-04-29 12:47, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
All apart from AMDGPU_GEM_DOMAIN_GTT memory domains map 1:1 to TTM
placements. And the former be either AMDGPU_PL_PREEMPT or TTM_PL_TT,
depending on AMDGPU_GEM_CREATE_PREEMPTIBLE.
Sim
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specific
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specific
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specific
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specific
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specific
Hi Dave, Sima,
Fixes for 6.9.
The following changes since commit e67572cd2204894179d89bd7b984072f19313b03:
Linux 6.9-rc6 (2024-04-28 13:47:24 -0700)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd-drm-fixes-6.9-2024-05-01
for you to fetch c
On 2024-04-30 19:29, Ramesh Errabolu
wrote:
Analysis of code by Coverity, a static code analyser, has identified
a resource leak in the symbol hmm_range. This leak occurs when one of
the prior steps before it is released encounters an error.
Signed-off-by: R
On 2024-04-30 19:29, Ramesh Errabolu wrote:
Analysis of code by Coverity, a static code analyser, has identified
a resource leak in the symbol hmm_range. This leak occurs when one of
the prior steps before it is released encounters an error.
Signed-off-by: Ramesh Errabolu
---
drivers/gpu/d
On 2024-05-01 14:34, Felix Kuehling wrote:
On 2024-04-30 19:29, Ramesh Errabolu wrote:
Analysis of code by Coverity, a static code analyser, has identified
a resource leak in the symbol hmm_range. This leak occurs when one of
the prior steps before it is released encounters an error.
Signed
[AMD Official Use Only - General]
Good catch on dropping return values
Regards,
Ramesh
-Original Message-
From: Kuehling, Felix
Sent: Thursday, May 2, 2024 12:30 AM
To: Errabolu, Ramesh ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amd/amdkfd: Fix a resource leak in
svm_rang
Analysis of code by Coverity, a static code analyser, has identified
a resource leak in the symbol hmm_range. This leak occurs when one of
the prior steps before it is released encounters an error.
Signed-off-by: Ramesh Errabolu
---
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 9 +++--
1 file chan
On Fri, Apr 26, 2024 at 10:07 AM Shashank Sharma
wrote:
>
> From: Alex Deucher
>
> This patch intorduces new UAPI/IOCTL for usermode graphics
> queue. The userspace app will fill this structure and request
> the graphics driver to add a graphics work queue for it. The
> output of this UAPI is a q
On Fri, Apr 26, 2024 at 10:27 AM Shashank Sharma
wrote:
>
> This patch does necessary modifications to enable the SDMA
> usermode queues using the existing userqueue infrastructure.
>
> V9: introduced this patch in the series
>
> Cc: Christian König
> Cc: Alex Deucher
> Signed-off-by: Shashank S
On Fri, Apr 26, 2024 at 10:27 AM Shashank Sharma
wrote:
>
> From: Arvind Yadav
>
> This patch does the necessary changes required to
> enable compute workload support using the existing
> usermode queues infrastructure.
>
> Cc: Alex Deucher
> Cc: Christian Koenig
> Signed-off-by: Arvind Yadav
On Fri, Apr 26, 2024 at 9:48 AM Shashank Sharma wrote:
>
> A Memory queue descriptor (MQD) of a userqueue defines it in
> the hw's context. As MQD format can vary between different
> graphics IPs, we need gfx GEN specific handlers to create MQDs.
>
> This patch:
> - Adds a new file which will be u
On Fri, Apr 26, 2024 at 10:07 AM Shashank Sharma
wrote:
>
> The FW expects us to allocate at least one page as context
> space to process gang, process, GDS and FW related work.
> This patch creates a joint object for the same, and calculates
> GPU space offsets of these spaces.
>
> V1: Addressed
On Fri, Apr 26, 2024 at 9:57 AM Shashank Sharma wrote:
>
> Current MES GFX mask prevents FW to enable oversubscription. This patch
> does the following:
> - Fixes the mask values and adds a description for the same.
> - Removes the central mask setup and makes it IP specific, as it would
> be di
On Fri, Apr 26, 2024 at 9:57 AM Shashank Sharma wrote:
>
> This patch adds skeleton code for amdgpu usermode queue.
> It contains:
> - A new files with init functions of usermode queues.
> - A queue context manager in driver private data.
>
> V1: Worked on design review comments from RFC patch ser
On Fri, Apr 26, 2024 at 10:07 AM Shashank Sharma
wrote:
>
> This patch introduces amdgpu_userqueue_object and its helper
> functions to creates and destroy this object. The helper
> functions creates/destroys a base amdgpu_bo, kmap/unmap it and
> save the respective GPU and CPU addresses in the en
On Fri, Apr 26, 2024 at 9:57 AM Shashank Sharma wrote:
>
> To support oversubscription, MES FW expects WPTR BOs to
> be mapped into GART, before they are submitted to usermode
> queues. This patch adds a function for the same.
>
> V4: fix the wptr value before mapping lookup (Bas, Christian).
>
>
On system with khugepaged enabled and user cases with THP buffer, the
hmm_range_fault may takes > 15 seconds to return -EBUSY, the arbitrary
timeout value is not accurate, cause memory allocation failure.
Remove the arbitrary timeout value, return EAGAIN to application if
hmm_range_fault return EB
No functional change. This will help in moving gpu_id creation to next
step while still being able to identify the correct GPU
Signed-off-by: Harish Kasiviswanathan
---
drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 19 ---
1 file changed, 8 insertions(+), 11 deletions(-)
diff --gi
gpu_id needs to be unique for user space to identify GPUs via KFD
interface. Do a single pass search to detect collision. If
detected, increment gpu_id by one.
Probability of collisons are very rare. Hence, no more complexity is
added to ensure uniqueness.
Signed-off-by: Harish Kasiviswanathan
-
On 2024-05-01 16:38, Ramesh Errabolu wrote:
Analysis of code by Coverity, a static code analyser, has identified
a resource leak in the symbol hmm_range. This leak occurs when one of
the prior steps before it is released encounters an error.
Signed-off-by: Ramesh Errabolu
Reviewed-by: Felix
On 2024-05-01 21:08, Harish Kasiviswanathan wrote:
> gpu_id needs to be unique for user space to identify GPUs via KFD
> interface. Do a single pass search to detect collision. If
> detected, increment gpu_id by one.
>
> Probability of collisons are very rare. Hence, no more complexity is
> add
On 2024-05-01 21:08, Harish Kasiviswanathan wrote:
> No functional change. This will help in moving gpu_id creation to next
> step while still being able to identify the correct GPU
>
> Signed-off-by: Harish Kasiviswanathan
Reviewed-by: Felix Kuehling
> ---
> drivers/gpu/drm/amd/amdkfd/kfd_
On 5/1/2024 5:56 PM, Philip Yang wrote:
Caution: This message originated from an External Source. Use proper caution
when opening attachments, clicking links, or responding.
On system with khugepaged enabled and user cases with THP buffer, the
hmm_range_fault may takes > 15 seconds to return
Hey Alex,
On 01/05/2024 22:39, Alex Deucher wrote:
On Fri, Apr 26, 2024 at 10:07 AM Shashank Sharma
wrote:
From: Alex Deucher
This patch intorduces new UAPI/IOCTL for usermode graphics
queue. The userspace app will fill this structure and request
the graphics driver to add a graphics work qu
On 01/05/2024 22:50, Alex Deucher wrote:
On Fri, Apr 26, 2024 at 9:48 AM Shashank Sharma wrote:
A Memory queue descriptor (MQD) of a userqueue defines it in
the hw's context. As MQD format can vary between different
graphics IPs, we need gfx GEN specific handlers to create MQDs.
This patch:
On 01/05/2024 23:11, Alex Deucher wrote:
On Fri, Apr 26, 2024 at 10:07 AM Shashank Sharma
wrote:
The FW expects us to allocate at least one page as context
space to process gang, process, GDS and FW related work.
This patch creates a joint object for the same, and calculates
GPU space offset
On 01/05/2024 23:36, Alex Deucher wrote:
On Fri, Apr 26, 2024 at 9:57 AM Shashank Sharma wrote:
To support oversubscription, MES FW expects WPTR BOs to
be mapped into GART, before they are submitted to usermode
queues. This patch adds a function for the same.
V4: fix the wptr value before ma
On 01/05/2024 22:41, Alex Deucher wrote:
On Fri, Apr 26, 2024 at 10:27 AM Shashank Sharma
wrote:
This patch does necessary modifications to enable the SDMA
usermode queues using the existing userqueue infrastructure.
V9: introduced this patch in the series
Cc: Christian König
Cc: Alex Deuc
On 01/05/2024 22:44, Alex Deucher wrote:
On Fri, Apr 26, 2024 at 10:27 AM Shashank Sharma
wrote:
From: Arvind Yadav
This patch does the necessary changes required to
enable compute workload support using the existing
usermode queues infrastructure.
Cc: Alex Deucher
Cc: Christian Koenig
S
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