On 3/25/2024 1:34 PM, Amadeusz Sławiński wrote:
On 3/25/2024 8:09 AM, Damien Le Moal wrote:
Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY
macro.
Signed-off-by: Damien Le Moal
---
sound/soc/intel/avs/core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --g
On Mon, Mar 25, 2024 at 04:09:20PM +0900, Damien Le Moal wrote:
> Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY
> macro.
Not needed anymore. MFD subsystem has a patch moving this to MSI support.
But you need to coordinate with Lee how to proceed (in case of conflicts MFD
vers
On 3/25/24 3:09 AM, Damien Le Moal wrote:
> Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY
> macro.
>
> Signed-off-by: Damien Le Moal
> ---
> drivers/infiniband/hw/qib/qib_iba7220.c | 2 +-
> drivers/infiniband/hw/qib/qib_iba7322.c | 5 ++---
> drivers/infiniband/hw/qib/qi
On 25.03.2024 08:09, Damien Le Moal wrote:
> Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY
> macro.
>
> Signed-off-by: Damien Le Moal
> ---
> drivers/net/ethernet/realtek/r8169_main.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethe
Damien,
> This patch series removes the use of the depracated PCI_IRQ_LEGACY macro
> and replace it with PCI_IRQ_INTX. No functional change.
SCSI changes look good to me.
Acked-by: Martin K. Petersen
--
Martin K. Petersen Oracle Linux Engineering
On 3/25/24 12:09 AM, Damien Le Moal wrote:
> Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY
> macro.
>
> Signed-off-by: Damien Le Moal
Reviewed-by: Dave Jiang
> ---
> drivers/ntb/hw/idt/ntb_hw_idt.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --gi
On 2024/3/25 22:09, Philip Yang wrote:
On 2024-03-25 02:31, Su Hui wrote:
Good catch, ioctl should return -errno. I will apply it to drm-next.
Reviewed-by: Philip Yang
---
Ps: When I try to compile this file, there is a error :
drivers/gpu/drm/amd/amdkfd/kfd_migrate.c:28:10: fatal error: am
Here are the corrections needed for the queue ring buffer size
calculation for the following cases:
- Remove the KIQ VM flush ring usage.
- Add the invalidate TLBs packet for gfx10 and gfx11 queue.
- There's no VM flush and PFP sync, so remove the gfx9 real
ring and compute ring buffer usage.
Si
add a new enumeration type to identify device attribute node,
this method is relatively more efficient compared with 'strcmp' in
update_attr() function.
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 4 +--
drivers/gpu/drm/amd/pm/inc/amdgpu_pm.h | 41 +
Use struct binary_header directly as parameter of
amdgpu_discovery_verify_binary_signature()
Signed-off-by: Ma Jun
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/dr
On 3/25/2024 3:45 PM, Ma Jun wrote:
> Add support for MACO flag checking.
> MACO mode only works if BACO is supported.
>
> Signed-off-by: Ma Jun
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h| 4 ++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
> drivers/gpu/dr
On 3/25/2024 3:45 PM, Ma Jun wrote:
> Optimize the code to add support for BAMACO mode checking
>
> Signed-off-by: Ma Jun
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 74 +++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.
On 3/26/2024 2:59 PM, Lazar, Lijo wrote:
>
>
> On 3/25/2024 3:45 PM, Ma Jun wrote:
>> Optimize the code to add support for BAMACO mode checking
>>
>> Signed-off-by: Ma Jun
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 +-
>> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 74 +
[AMD Official Use Only - General]
Hi, Alex
Could you please help to review this patch?
This should fix the bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2117.
Thx.
Best,
Zhenguo
Cloud-GPU Core team, SRDC
-Original Message-
From: Yin, ZhenGuo (Chris)
Sent: Friday, March 15, 2024
On Mon, Mar 25, 2024 at 04:09:17PM +0900, Damien Le Moal wrote:
> Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY
> macro.
>
> Signed-off-by: Damien Le Moal
Acked-by: Greg Kroah-Hartman
On Mon, Mar 25, 2024 at 04:09:24PM +0900, Damien Le Moal wrote:
> In vmci_guest_probe_device(), remove the reference to PCI_IRQ_LEGACY by
> using PCI_IRQ_ALL_TYPES instead of an explicit OR of all IRQ types.
>
> Signed-off-by: Damien Le Moal
> ---
Acked-by: Greg Kroah-Hartman
On Mon, Mar 25, 2024 at 04:09:16PM +0900, Damien Le Moal wrote:
> Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY
> macro.
>
> Signed-off-by: Damien Le Moal
Acked-by: Greg Kroah-Hartman
On Tue, Mar 26, 2024 at 8:28 AM Yin, ZhenGuo (Chris)
wrote:
>
> [AMD Official Use Only - General]
>
> Hi, Alex
>
> Could you please help to review this patch?
> This should fix the bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2117.
Please split this into two patches. The HDP fix is a stan
On Mon, Mar 18, 2024 at 5:47 PM Arunpravin Paneer Selvam
wrote:
>
> Add clear page support in vram memory region.
>
> v1(Christian):
> - Dont handle clear page as TTM flag since when moving the BO back
> in from GTT again we don't need that.
> - Make a specialized version of amdgpu_fill_bu
On Mon, Mar 25, 2024 at 7:52 PM Liu, Shaoyun wrote:
>
> [AMD Official Use Only - General]
>
> It can cause page fault when the log size exceed the page size .
I think we should make sure this patch goes back to stable for all
kernel versions where the logging is enabled.
Acked-by: Alex Deuch
Hi Alex,
On 3/26/2024 7:08 PM, Alex Deucher wrote:
On Mon, Mar 18, 2024 at 5:47 PM Arunpravin Paneer Selvam
wrote:
Add clear page support in vram memory region.
v1(Christian):
- Dont handle clear page as TTM flag since when moving the BO back
in from GTT again we don't need that.
-
On Tue, Mar 26, 2024 at 9:59 AM Paneer Selvam, Arunpravin
wrote:
>
> Hi Alex,
>
> On 3/26/2024 7:08 PM, Alex Deucher wrote:
> > On Mon, Mar 18, 2024 at 5:47 PM Arunpravin Paneer Selvam
> > wrote:
> >> Add clear page support in vram memory region.
> >>
> >> v1(Christian):
> >>- Dont handle cle
dump the bios binary in the devcoredump.
Signed-off-by: Sunil Khatri
---
.../gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c | 20 +++
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c
ind
From: Arnd Bergmann
This is a follow-up on a couple of patch series I sent in the past,
enabling -Wextra (aside from stuff that is explicitly disabled),
-Wcast-function-pointer-strict and -Wrestrict.
I have tested these on 'defconfig' and 'allmodconfig' builds across
all architectures, as well a
On 3/23/2024 1:27 AM, Zhigang Luo wrote:
> Signed-off-by: Zhigang Luo
> Change-Id: I2a98d513c26107ac76ecf20e951c188afbc7ede6
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 20
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 5 -
> drivers/gpu/drm/amd/amdkfd/kfd_d
On 2024-03-25 14:45, Felix Kuehling
wrote:
On
2024-03-22 15:57, Zhigang Luo wrote:
it will cause page fault after device
recovered if there is a process running.
Signed-off-by: Zhigang Luo
Change
On Tue, Mar 26, 2024 at 10:01 AM Alex Deucher wrote:
>
> On Tue, Mar 26, 2024 at 9:59 AM Paneer Selvam, Arunpravin
> wrote:
> >
> > Hi Alex,
> >
> > On 3/26/2024 7:08 PM, Alex Deucher wrote:
> > > On Mon, Mar 18, 2024 at 5:47 PM Arunpravin Paneer Selvam
> > > wrote:
> > >> Add clear page support
On 2024-03-26 10:53, Philip Yang wrote:
On 2024-03-25 14:45, Felix Kuehling wrote:
On 2024-03-22 15:57, Zhigang Luo wrote:
it will cause page fault after device recovered if there is a
process running.
Signed-off-by: Zhigang Luo
Change-Id: Ib1eddb56b69ecd41fe703abd169944154f48b0cd
---
dr
Thanks for the patch,
Patch pushed for staging.
Regards
Shashank
On 25/03/2024 00:23, Alex Deucher wrote:
On Sat, Mar 23, 2024 at 4:47 PM Sharma, Shashank
wrote:
On 23/03/2024 15:52, Johannes Weiner wrote:
On Thu, Mar 14, 2024 at 01:09:57PM -0400, Johannes Weiner wrote:
Hello,
On Fri,
On 2024-03-26 11:01, Felix Kuehling
wrote:
On
2024-03-26 10:53, Philip Yang wrote:
On 2024-03-25 14:45, Felix Kuehling wrote:
On 2024-03-22 15:57, Zhigang Luo wrote:
it will cause pa
[AMD Official Use Only - General]
ping
From: amd-gfx On Behalf Of Liu, Shaoyun
Sent: Monday, March 25, 2024 8:51 AM
To: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu : Add mes_log_enable to control mes log feature
[AMD Official Use Only - General]
[AMD Official Use Only - Gen
This adds allocation latency, but aligns better with user
expectations. The latency should improve with the drm buddy
clearing patches that Arun has been working on.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 3 ++-
1 file changed, 2 insertions(+), 1 dele
This adds allocation latency, but aligns better with user
expectations. The latency should improve with the drm buddy
clearing patches that Arun has been working on.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 4
1 file changed, 4 insertions(+)
diff --git a/d
Cc: amd-gfx@lists.freedesktop.org
On 3/26/24 10:47, Arnd Bergmann wrote:
From: Arnd Bergmann
The -Woverride-init warn about code that may be intentional or not,
but the inintentional ones tend to be real bugs, so there is a bit of
disagreement on whether this warning option should be enabled b
[AMD Official Use Only - General]
Looping in +@Zhang, Zhaochen
CAM control register can only be written by PF. VF can only read the register.
In SRIOV VF, the write won't work.
In SRIOV case, CAM's enablement is controlled by the host. Hence, we think the
enablement status should be decided by
On 2024-03-26 12:04, Alam, Dewan wrote:
[AMD Official Use Only - General]
Looping in +@Zhang, Zhaochen
CAM control register can only be written by PF. VF can only read the register.
In SRIOV VF, the write won't work.
In SRIOV case, CAM's enablement is controlled by the host. Hence, we think th
On Tue, Mar 26, 2024 at 11:51 AM Liu, Shaoyun wrote:
>
> [AMD Official Use Only - General]
>
>
> ping
Maybe we'd want to make this something we could dynamically enable via
debugfs? Not sure how much of a pain it would be to change this at
runtime. Something we can think about for the future.
On Tue, Mar 26, 2024 at 10:38 AM Sunil Khatri wrote:
>
> dump the bios binary in the devcoredump.
>
> Signed-off-by: Sunil Khatri
> ---
> .../gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c | 20 +++
> 1 file changed, 20 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_
Add FW information of all the IP's in the devcoredump.
Signed-off-by: Sunil Khatri
---
.../gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c | 122 ++
1 file changed, 122 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_dev
On 3/26/2024 10:23 PM, Alex Deucher wrote:
On Tue, Mar 26, 2024 at 10:38 AM Sunil Khatri wrote:
dump the bios binary in the devcoredump.
Signed-off-by: Sunil Khatri
---
.../gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c | 20 +++
1 file changed, 20 insertions(+)
diff --git a/
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 084c8e315db34b59d38d06e684b1a0dd07d30287 Add linux-next specific
files for 20240326
Error/Warning: (recently discovered and may have been fixed)
ERROR: modpost: "memcpy&quo
On 18/03/2024 21:40, Arunpravin Paneer Selvam wrote:
Add a new test case for the drm buddy clear and dirty
allocation.
Signed-off-by: Arunpravin Paneer Selvam
Suggested-by: Matthew Auld
---
drivers/gpu/drm/tests/drm_buddy_test.c | 127 +
1 file changed, 127 insertion
On 2024-03-25 19:33, Liu, Shaoyun wrote:
[AMD Official Use Only - General]
It can cause page fault when the log size exceed the page size .
I'd consider that a breaking change in the firmware that should be
avoided. Is there a way the updated driver can tell the FW the log size
that it
On 18/03/2024 21:40, Arunpravin Paneer Selvam wrote:
- Add tracking clear page feature.
- Driver should enable the DRM_BUDDY_CLEARED flag if it
successfully clears the blocks in the free path. On the otherhand,
DRM buddy marks each block as cleared.
- Track the available cleared pages siz
On 2024-03-26 11:52, Alex Deucher wrote:
This adds allocation latency, but aligns better with user
expectations. The latency should improve with the drm buddy
clearing patches that Arun has been working on.
If we submit this before the clear-page-tracking patches are in, this
will cause una
[AMD Official Use Only - General]
That requires extra work in MES and API level change to let driver send this
info to MES . I think that's kind of unnecessary complicated.
The original problem is MES fw doesn't encapsulate their API defines good
enough . Windows driver directly use MES inte
[AMD Official Use Only - General]
Thanks , and your suggestion sounds like a good idea , sometimes we might just
want to enable the log when we want to run something specific . I think what
we need is an API that driver can tell MES to enable it during runtime . I
will think it and check
On 3/20/2024 5:52 PM, Mukul Joshi wrote:
Caution: This message originated from an External Source. Use proper caution
when opening attachments, clicking links, or responding.
Destroy the high priority workqueue that handles interrupts
during KFD node cleanup.
Signed-off-by: Mukul Joshi
---
Currently, with F32 HWS GPU reset is only when unmap queue fails.
However, if compute queue doesn't repond to preemption request in time
unmap will return without any error. In this case, only preemption error
is logged and Reset is not triggered. Call GPU reset in this case also.
Signed-off-by:
On Mon, Mar 25, 2024 at 04:04:44PM -0500, Bjorn Helgaas wrote:
> On Mon, Mar 25, 2024 at 09:39:38PM +0200, Andy Shevchenko wrote:
> > On Mon, Mar 25, 2024 at 04:09:20PM +0900, Damien Le Moal wrote:
> > > Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY
> > > macro.
> >
> > Not n
[AMD Official Use Only - General]
Reviewed-by: Mukul Joshi
> -Original Message-
> From: amd-gfx On Behalf Of Harish
> Kasiviswanathan
> Sent: Tuesday, March 26, 2024 4:02 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Kasiviswanathan, Harish
> Subject: [PATCH] drm/amdkfd: Reset GPU on qu
[AMD Official Use Only - General]
Reviewed-by: Harish Kasiviswanathan
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Monday, March 25, 2024 11:01 AM
To: Friedrich Vock
Cc: Deucher, Alexander ;
amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu: always forc
On 3/26/2024 5:29 PM, Lazar, Lijo wrote:
>
>
> On 3/25/2024 3:45 PM, Ma Jun wrote:
>> Optimize the code to add support for BAMACO mode checking
>>
>> Signed-off-by: Ma Jun
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 +-
>> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 74 +
On Tue, Mar 26, 2024 at 4:12 PM Harish Kasiviswanathan
wrote:
>
> Currently, with F32 HWS GPU reset is only when unmap queue fails.
>
> However, if compute queue doesn't repond to preemption request in time
> unmap will return without any error. In this case, only preemption error
> is logged and
ping?
On Fri, Mar 15, 2024 at 12:44 PM Alex Deucher wrote:
>
> On Fri, Mar 15, 2024 at 12:07 PM Alex Deucher
> wrote:
> >
> > Covers GPU page fault debugging and adds a reference
> > to umr.
> >
> > v2: update client ids to include SQC/G
> >
> > Signed-off-by: Alex Deucher
> > ---
> > Documen
On Tue, Mar 26, 2024 at 11:41 PM Qiang Ma wrote:
>
> On Thu, 14 Mar 2024 14:40:40 +
> "Deucher, Alexander" wrote:
>
> > [Public]
> >
> > > -Original Message-
> > > From: Qiang Ma
> > > Sent: Wednesday, March 13, 2024 2:18 AM
> > > To: Deucher, Alexander ; Koenig,
> > > Christian ; Pa
support MES command SET_HW_RESOURCE1 in sriov
Signed-off-by: chongli2
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 6 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 5 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 4 ++
drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h |
support MES command SET_HW_RESOURCE1 in sriov
Signed-off-by: chongli2
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 6 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 5 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 4 ++
drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h |
[AMD Official Use Only - General]
Reviewed-by: Feifei Xu
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Saturday, March 16, 2024 12:45 AM
To: Deucher, Alexander
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] Documentation: add a page on amdgpu debugging
On Fr
On 3/26/2024 5:34 PM, Lazar, Lijo wrote:
>
>
> On 3/26/2024 2:59 PM, Lazar, Lijo wrote:
>>
>>
>> On 3/25/2024 3:45 PM, Ma Jun wrote:
>>> Optimize the code to add support for BAMACO mode checking
>>>
>>> Signed-off-by: Ma Jun
>>> ---
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 +-
>>> dr
Reviewed-by: Ma Jun
On 3/26/2024 5:02 PM, Yang Wang wrote:
> add a new enumeration type to identify device attribute node,
> this method is relatively more efficient compared with 'strcmp' in
> update_attr() function.
>
> Signed-off-by: Yang Wang
> ---
> drivers/gpu/drm/amd/pm/amdgpu_pm.c
Update table version and restore bad page records to EEPROM RAS table
for mismatched table version case. Otherwise force to reset the table.
Signed-off-by: Candice Li
---
.../gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c| 88 ---
1 file changed, 78 insertions(+), 10 deletions(-)
di
On 3/26/2024 2:32 PM, Yang Wang wrote:
> add a new enumeration type to identify device attribute node,
> this method is relatively more efficient compared with 'strcmp' in
> update_attr() function.
>
> Signed-off-by: Yang Wang
> ---
> drivers/gpu/drm/amd/pm/amdgpu_pm.c | 4 +--
> drivers
[AMD Official Use Only - General]
-Original Message-
From: Lazar, Lijo
Sent: Wednesday, March 27, 2024 2:22 PM
To: Wang, Yang(Kevin) ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Deucher, Alexander
Subject: Re: [PATCH] drm/amdgpu: make amdgpu device attr_update() function more
e
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