[AMD Official Use Only - General]
Let's not copy kfd interrupt handler and the work queue implementation from v9
to v10 since the firmware/hardware design are totally different.
We shall have another patch to fix kfd int v10 for poison consumption handling
and also v11.
Regards,
Hawking
-
When userland uses DRM_IOCTL_MODE_ADDFB to add a framebuffer, the DRM
subsystem tries to find a pixel format from the supplied depth and
bpp-values. It does this by calling drm_driver_legacy_fb_format().
Unfortunately drm_driver_legacy_fb_format() can return formats not
supported by the underlying
Switch to using drm_driver_legacy_fb_format() instead of
drm_mode_legacy_fb_format() to use the same logic as for the
DRM_IOCTL_MODE_ADDFB ioctl when selecting a framebuffer format.
Signed-off-by: Frej Drejhammar
Cc: David Airlie
Cc: Daniel Vetter
Cc: amd-gfx@lists.freedesktop.org
---
This is
skip call ras_late_init if ras is not enabled.
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 7d4a1bc30277..4ea35648fdfe 100644
-
[AMD Official Use Only - General]
Hi Alex
> Does the IB test take care of this? I just want to confirm that we aren't
> leaving it powered up unless a user runs a VPE workload which might not
> happen.
Yes, the IB test take care of this.
The flow is like this:
amdgpu_device_gpu_recover->amdg
Hi Christian,
On 3/15/2024 3:16 PM, Christian König wrote:
> Am 15.03.24 um 06:17 schrieb Ma Jun:
>> Setting the rmmio pointer to NULL to fix the following
>> iounmap error and calltrace.
>> iounmap: bad address d0b3631f
>>
>> Fixes: 923f7a82d2e1 ("drm/amd/amdgpu: Fix potential ioremap() m
[AMD Official Use Only - General]
Let's not rely on ras_enabled flags. It mixed with hw & sw ras caps. There is
case that sw ras is disabled, but hardware is still ras capable.
The function actually relies on ras block list to decide if it does anything.
If ras block is NULL, then it will be sk
add ras event id support for ACA.
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c | 29 ++---
drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 11 +-
3 files changed, 23 insertions(+), 19 deletions(-)
dif
[AMD Official Use Only - General]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Wang, Yang(Kevin)
Sent: Monday, March 18, 2024 10:25
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Zhou1, Tao ;
Wang, Yang(Kevin)
Subject: [PATCH] drm/amdgpu: add ras event
[AMD Official Use Only - General]
Reviewed-by: Tao Zhou
> -Original Message-
> From: Wang, Yang(Kevin)
> Sent: Monday, March 18, 2024 10:25 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking ; Zhou1, Tao
> ; Wang, Yang(Kevin)
> Subject: [PATCH] drm/amdgpu: add ras event id sup
[AMD Official Use Only - General]
I can remove the support for SOC15_IH_CLIENTID_VMC from v10, but the reset type
should be changed from bool to uint32 for all versions.
Regards,
Tao
> -Original Message-
> From: Zhang, Hawking
> Sent: Sunday, March 17, 2024 6:10 PM
> To: Zhou1, Tao ; a
[AMD Official Use Only - General]
That's fine. It can be in another set of patches. But we should remove the
incorrect implementation which is copied from previous version. So people will
not apply changes to an incorrect base.
Regards,
Hawking
-Original Message-
From: Zhou1, Tao
Sent
if reading pf2vf data failed 30 times continuously, it means something is
wrong. Need to trigger flr_work to recover the issue.
also use dev_err to print the error message to get which device has
issue and add warning message if waiting IDH_FLR_NOTIFICATION_CMPL
timeout.
Signed-off-by: Zhigang Lu
[AMD Official Use Only - General]
Acked-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Luo, Zhigang
Sent: Monday, March 18, 2024 11:38
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Saye, Sashank
; Chan, Hing Pong ; Luo, Zhigang
Subject: [PATCH] drm/amdgpu: trigg
[Public]
Reviewed-by: Lijo Lazar
Thanks,
Lijo
-Original Message-
From: SHANMUGAM, SRINIVASAN
Sent: Saturday, March 16, 2024 10:20 PM
To: Koenig, Christian ; Deucher, Alexander
Cc: amd-gfx@lists.freedesktop.org; SHANMUGAM, SRINIVASAN
; Lazar, Lijo
Subject: [PATCH] drm/amdgpu: Fix tru
[AMD Official Use Only - General]
Got it. Thanks for reported that. Sent the patch for review.
Regards
Sunil khatri
-Original Message-
From: Dan Carpenter
Sent: Saturday, March 16, 2024 2:42 PM
To: Khatri, Sunil
Cc: Khatri, Sunil ; Koenig, Christian
; Deucher, Alexander ;
amd-gfx@lis
adev is a global data structure and isn't expected
to be NULL and hence removing the redundant adev
check from the devcoredump code.
CC: Dan Carpenter
Signed-off-by: Sunil Khatri
Suggested-by: Dan Carpenter
---
drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c | 57 ++-
1 file chan
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